64ac736ec5
Former-commit-id: f3cc9b82f3e5bd8f0fd3ebc098f789556b44e9cd
28 lines
1005 B
LLVM
28 lines
1005 B
LLVM
; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -mcpu=pwr8 -mtriple=powerpc64-unknown-linux-gnu \
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; RUN: -verify-machineinstrs < %s | FileCheck %s
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define <4 x i32> @test1(<4 x i32> %a) {
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entry:
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; CHECK-LABEL: test1
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; CHECK: xxswapd 34, 34
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%vecins6 = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
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ret <4 x i32> %vecins6
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}
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define <8 x i16> @test2(<8 x i16> %a) #0 {
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entry:
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; CHECK-LABEL: test2
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; CHECK: xxswapd 34, 34
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%vecins14 = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>
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ret <8 x i16> %vecins14
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}
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define <16 x i8> @test3(<16 x i8> %a) #0 {
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entry:
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; CHECK-LABEL: test3
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; CHECK: xxswapd 34, 34
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%vecins30 = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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ret <16 x i8> %vecins30
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}
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