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62 lines
2.2 KiB
LLVM
62 lines
2.2 KiB
LLVM
; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa -mattr=+half-rate-64-ops < %s | FileCheck -check-prefix=ALL -check-prefix=FAST64 %s
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; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileCheck -check-prefix=ALL -check-prefix=SLOW64 %s
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; ALL: 'shl_i32'
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; ALL: estimated cost of 1 for {{.*}} shl i32
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define amdgpu_kernel void @shl_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %vaddr, i32 %b) #0 {
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%vec = load i32, i32 addrspace(1)* %vaddr
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%or = shl i32 %vec, %b
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store i32 %or, i32 addrspace(1)* %out
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ret void
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}
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; ALL: 'shl_i64'
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; FAST64: estimated cost of 2 for {{.*}} shl i64
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; SLOW64: estimated cost of 3 for {{.*}} shl i64
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define amdgpu_kernel void @shl_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %vaddr, i64 %b) #0 {
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%vec = load i64, i64 addrspace(1)* %vaddr
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%or = shl i64 %vec, %b
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store i64 %or, i64 addrspace(1)* %out
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ret void
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}
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; ALL: 'lshr_i32'
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; ALL: estimated cost of 1 for {{.*}} lshr i32
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define amdgpu_kernel void @lshr_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %vaddr, i32 %b) #0 {
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%vec = load i32, i32 addrspace(1)* %vaddr
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%or = lshr i32 %vec, %b
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store i32 %or, i32 addrspace(1)* %out
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ret void
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}
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; ALL: 'lshr_i64'
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; FAST64: estimated cost of 2 for {{.*}} lshr i64
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; SLOW64: estimated cost of 3 for {{.*}} lshr i64
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define amdgpu_kernel void @lshr_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %vaddr, i64 %b) #0 {
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%vec = load i64, i64 addrspace(1)* %vaddr
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%or = lshr i64 %vec, %b
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store i64 %or, i64 addrspace(1)* %out
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ret void
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}
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; ALL: 'ashr_i32'
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; ALL: estimated cost of 1 for {{.*}} ashr i32
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define amdgpu_kernel void @ashr_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %vaddr, i32 %b) #0 {
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%vec = load i32, i32 addrspace(1)* %vaddr
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%or = ashr i32 %vec, %b
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store i32 %or, i32 addrspace(1)* %out
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ret void
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}
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; ALL: 'ashr_i64'
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; FAST64: estimated cost of 2 for {{.*}} ashr i64
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; SLOW64: estimated cost of 3 for {{.*}} ashr i64
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define amdgpu_kernel void @ashr_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %vaddr, i64 %b) #0 {
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%vec = load i64, i64 addrspace(1)* %vaddr
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%or = ashr i64 %vec, %b
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store i64 %or, i64 addrspace(1)* %out
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ret void
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}
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attributes #0 = { nounwind }
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