# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s

--- |
  target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"

  define void @inttoptr_p0_s64() { ret void }
  define void @ptrtoint_s64_p0() { ret void }
  define void @ptrtoint_s32_p0() { ret void }
  define void @ptrtoint_s16_p0() { ret void }
  define void @ptrtoint_s8_p0() { ret void }
  define void @ptrtoint_s1_p0() { ret void }
...

---
name:            inttoptr_p0_s64
legalized:       true
regBankSelected: true

registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }
body:             |
  bb.0:
    liveins: %x0
    ; CHECK-LABEL: name: inttoptr_p0_s64
    ; CHECK: [[COPY:%[0-9]+]]:gpr64all = COPY %x0
    ; CHECK: [[COPY1:%[0-9]+]]:gpr64all = COPY [[COPY]]
    ; CHECK: %x0 = COPY [[COPY1]]
    %0(s64) = COPY %x0
    %1(p0) = G_INTTOPTR %0
    %x0 = COPY %1(p0)
...

---
name:            ptrtoint_s64_p0
legalized:       true
regBankSelected: true

registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }
body:             |
  bb.0:
    liveins: %x0
    ; CHECK-LABEL: name: ptrtoint_s64_p0
    ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY %x0
    ; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY [[COPY]]
    ; CHECK: %x0 = COPY [[COPY1]]
    %0(p0) = COPY %x0
    %1(s64) = G_PTRTOINT %0
    %x0 = COPY %1(s64)
...

---
name:            ptrtoint_s32_p0
legalized:       true
regBankSelected: true

registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }
body:             |
  bb.0:
    liveins: %x0
    ; CHECK-LABEL: name: ptrtoint_s32_p0
    ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY %x0
    ; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]].sub_32
    ; CHECK: %w0 = COPY [[COPY1]]
    %0(p0) = COPY %x0
    %1(s32) = G_PTRTOINT %0
    %w0 = COPY %1(s32)
...

---
name:            ptrtoint_s16_p0
legalized:       true
regBankSelected: true

registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }
body:             |
  bb.0:
    liveins: %x0
    ; CHECK-LABEL: name: ptrtoint_s16_p0
    ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY %x0
    ; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]].sub_32
    ; CHECK: [[COPY2:%[0-9]+]]:gpr32all = COPY [[COPY1]]
    ; CHECK: %w0 = COPY [[COPY2]]
    %0(p0) = COPY %x0
    %1(s16) = G_PTRTOINT %0
    %2:gpr(s32) = G_ANYEXT %1
    %w0 = COPY %2(s32)
...

---
name:            ptrtoint_s8_p0
legalized:       true
regBankSelected: true

registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }
body:             |
  bb.0:
    liveins: %x0
    ; CHECK-LABEL: name: ptrtoint_s8_p0
    ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY %x0
    ; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]].sub_32
    ; CHECK: [[COPY2:%[0-9]+]]:gpr32all = COPY [[COPY1]]
    ; CHECK: %w0 = COPY [[COPY2]]
    %0(p0) = COPY %x0
    %1(s8) = G_PTRTOINT %0
    %2:gpr(s32) = G_ANYEXT %1
    %w0 = COPY %2(s32)
...

---
name:            ptrtoint_s1_p0
legalized:       true
regBankSelected: true

registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }
body:             |
  bb.0:
    liveins: %x0
    ; CHECK-LABEL: name: ptrtoint_s1_p0
    ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY %x0
    ; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]].sub_32
    ; CHECK: [[COPY2:%[0-9]+]]:gpr32all = COPY [[COPY1]]
    ; CHECK: %w0 = COPY [[COPY2]]
    %0(p0) = COPY %x0
    %1(s1) = G_PTRTOINT %0
    %2:gpr(s32) = G_ANYEXT %1
    %w0 = COPY %2(s32)
...