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Imported Upstream version 5.18.0.225

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Former-commit-id: 10196d987d5fc5564b9d3b33b1fdf13190f4d0b5
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Xamarin Public Jenkins (auto-signing)
2018-12-21 19:01:49 +00:00
parent 32d52ae4ca
commit f32dbaf0b2
28477 changed files with 3866961 additions and 38 deletions
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15
external/llvm/test/CodeGen/Hexagon/base-offset-addr.ll vendored Normal file
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@ -0,0 +1,15 @@
; RUN: llc -march=hexagon -enable-aa-sched-mi < %s
; REQUIRES: asserts
; Make sure the base is a register and not an address.
define fastcc void @Get_lsp_pol(i32* nocapture %f) #0 {
entry:
%f5 = alloca i32, align 4
%arrayidx103 = getelementptr inbounds i32, i32* %f, i32 4
store i32 0, i32* %arrayidx103, align 4
%f5.0.load185 = load volatile i32, i32* %f5, align 4
ret void
}
attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }