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Imported Upstream version 5.18.0.207

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Former-commit-id: 3b152f462918d427ce18620a2cbe4f8b79650449
This commit is contained in:
Xamarin Public Jenkins (auto-signing)
2018-11-17 08:23:10 +00:00
parent 8e12397d70
commit eb85e2fc17
28480 changed files with 72 additions and 3866936 deletions
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94
external/llvm/test/MC/AMDGPU/add-sub-no-carry.s vendored
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// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefixes=GFX9 %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji %s 2>&1 | FileCheck -check-prefixes=ERR-SICIVI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck -check-prefixes=ERR-SICIVI %s
// FIXME: pre-gfx9 errors should be more useful
v_add_u32 v1, v2, v3
// GFX9: v_add_u32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x68]
// ERR-SICIVI: error: instruction not supported on this GPU
v_add_u32 v1, v2, s1
// GFX9: v_add_u32_e64 v1, v2, s1 ; encoding: [0x01,0x00,0x34,0xd1,0x02,0x03,0x00,0x00]
// ERR-SICIVI: error: instruction not supported on this GPU
v_add_u32 v1, s1, v2
// GFX9: v_add_u32_e32 v1, s1, v2 ; encoding: [0x01,0x04,0x02,0x68]
// ERR-SICIVI: error: instruction not supported on this GPU
v_add_u32 v1, 4.0, v2
// GFX9: v_add_u32_e32 v1, 4.0, v2 ; encoding: [0xf6,0x04,0x02,0x68]
// ERR-SICIVI: error: instruction not supported on this GPU
v_add_u32 v1, v2, 4.0
// GFX9: v_add_u32_e64 v1, v2, 4.0 ; encoding: [0x01,0x00,0x34,0xd1,0x02,0xed,0x01,0x00]
// ERR-SICIVI: error: instruction not supported on this GPU
v_add_u32_e32 v1, v2, v3
// GFX9: v_add_u32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x68]
// ERR-SICIVI: error: instruction not supported on this GPU
v_add_u32_e32 v1, s1, v3
// GFX9: v_add_u32_e32 v1, s1, v3 ; encoding: [0x01,0x06,0x02,0x68]
// ERR-SICIVI: error: instruction not supported on this GPU
v_sub_u32 v1, v2, v3
// GFX9: v_sub_u32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x6a]
// ERR-SICIVI: error: instruction not supported on this GPU
v_sub_u32 v1, v2, s1
// GFX9: v_sub_u32_e64 v1, v2, s1 ; encoding: [0x01,0x00,0x35,0xd1,0x02,0x03,0x00,0x00]
// ERR-SICIVI: error: instruction not supported on this GPU
v_sub_u32 v1, s1, v2
// GFX9: v_sub_u32_e32 v1, s1, v2 ; encoding: [0x01,0x04,0x02,0x6a]
// ERR-SICIVI: error: instruction not supported on this GPU
v_sub_u32 v1, 4.0, v2
// GFX9: v_sub_u32_e32 v1, 4.0, v2 ; encoding: [0xf6,0x04,0x02,0x6a]
// ERR-SICIVI: error: instruction not supported on this GPU
v_sub_u32 v1, v2, 4.0
// GFX9: v_sub_u32_e64 v1, v2, 4.0 ; encoding: [0x01,0x00,0x35,0xd1,0x02,0xed,0x01,0x00]
// ERR-SICIVI: error: instruction not supported on this GPU
v_sub_u32_e32 v1, v2, v3
// GFX9: v_sub_u32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x6a]
// ERR-SICIVI: error: instruction not supported on this GPU
v_sub_u32_e32 v1, s1, v3
// GFX9: v_sub_u32_e32 v1, s1, v3 ; encoding: [0x01,0x06,0x02,0x6a]
// ERR-SICIVI: error: instruction not supported on this GPU
v_subrev_u32 v1, v2, v3
// GFX9: v_subrev_u32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x6c]
// ERR-SICIVI: error: instruction not supported on this GPU
v_subrev_u32 v1, v2, s1
// GFX9: v_subrev_u32_e64 v1, v2, s1 ; encoding: [0x01,0x00,0x36,0xd1,0x02,0x03,0x00,0x00]
// ERR-SICIVI: error: instruction not supported on this GPU
v_subrev_u32 v1, s1, v2
// GFX9: v_subrev_u32_e32 v1, s1, v2 ; encoding: [0x01,0x04,0x02,0x6c]
// ERR-SICIVI: error: instruction not supported on this GPU
v_subrev_u32 v1, 4.0, v2
// GFX9: v_subrev_u32_e32 v1, 4.0, v2 ; encoding: [0xf6,0x04,0x02,0x6c]
// ERR-SICIVI: error: instruction not supported on this GPU
v_subrev_u32 v1, v2, 4.0
// GFX9: v_subrev_u32_e64 v1, v2, 4.0 ; encoding: [0x01,0x00,0x36,0xd1,0x02,0xed,0x01,0x00]
// ERR-SICIVI: error: instruction not supported on this GPU
v_subrev_u32_e32 v1, v2, v3
// GFX9: v_subrev_u32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x6c]
// ERR-SICIVI: error: instruction not supported on this GPU
v_subrev_u32_e32 v1, s1, v3
// GFX9: v_subrev_u32_e32 v1, s1, v3 ; encoding: [0x01,0x06,0x02,0x6c]
// ERR-SICIVI: error: instruction not supported on this GPU

4
external/llvm/test/MC/AMDGPU/buffer_wbinv1l_vol_vi.s vendored
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// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=VI %s
buffer_wbinvl1_vol
// VI: buffer_wbinvl1_vol ; encoding: [0x00,0x00,0xfc,0xe0,0x00,0x00,0x00,0x00]

113
external/llvm/test/MC/AMDGPU/ds-err.s vendored
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// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s
// offset too big
// CHECK: error: invalid operand for instruction
ds_add_u32 v2, v4 offset:1000000000
// offset0 twice
// CHECK: error: invalid operand for instruction
ds_write2_b32 v2, v4, v6 offset0:4 offset0:8
// offset1 twice
// CHECK: error: invalid operand for instruction
ds_write2_b32 v2, v4, v6 offset1:4 offset1:8
// offset0 too big
// CHECK: invalid operand for instruction
ds_write2_b32 v2, v4, v6 offset0:1000000000
// offset1 too big
// CHECK: invalid operand for instruction
ds_write2_b32 v2, v4, v6 offset1:1000000000
//===----------------------------------------------------------------------===//
// swizzle
//===----------------------------------------------------------------------===//
// CHECK: error: expected a colon
ds_swizzle_b32 v8, v2 offset
// CHECK: error: failed parsing operand
ds_swizzle_b32 v8, v2 offset:
// CHECK: error: expected a colon
ds_swizzle_b32 v8, v2 offset-
// CHECK: error: expected absolute expression
ds_swizzle_b32 v8, v2 offset:SWIZZLE(QUAD_PERM, 0, 1, 2, 3)
// CHECK: error: expected a swizzle mode
ds_swizzle_b32 v8, v2 offset:swizzle(quad_perm, 0, 1, 2, 3)
// CHECK: error: expected a swizzle mode
ds_swizzle_b32 v8, v2 offset:swizzle(XXX,1)
// CHECK: error: expected a comma
ds_swizzle_b32 v8, v2 offset:swizzle(QUAD_PERM
// CHECK: error: expected a comma
ds_swizzle_b32 v8, v2 offset:swizzle(QUAD_PERM, 0, 1, 2)
// CHECK: error: expected a closing parentheses
ds_swizzle_b32 v8, v2 offset:swizzle(QUAD_PERM, 0, 1, 2, 3
// CHECK: error: expected a closing parentheses
ds_swizzle_b32 v8, v2 offset:swizzle(QUAD_PERM, 0, 1, 2, 3, 4)
// CHECK: error: expected a 2-bit lane id
ds_swizzle_b32 v8, v2 offset:swizzle(QUAD_PERM, -1, 1, 2, 3)
// CHECK: error: expected a 2-bit lane id
ds_swizzle_b32 v8, v2 offset:swizzle(QUAD_PERM, 4, 1, 2, 3)
// CHECK: error: group size must be in the interval [1,16]
ds_swizzle_b32 v8, v2 offset:swizzle(SWAP,0)
// CHECK: error: group size must be a power of two
ds_swizzle_b32 v8, v2 offset:swizzle(SWAP,3)
// CHECK: error: group size must be in the interval [1,16]
ds_swizzle_b32 v8, v2 offset:swizzle(SWAP,17)
// CHECK: error: group size must be in the interval [1,16]
ds_swizzle_b32 v8, v2 offset:swizzle(SWAP,32)
// CHECK: error: group size must be in the interval [2,32]
ds_swizzle_b32 v8, v2 offset:swizzle(REVERSE,1)
// CHECK: error: group size must be a power of two
ds_swizzle_b32 v8, v2 offset:swizzle(REVERSE,3)
// CHECK: error: group size must be in the interval [2,32]
ds_swizzle_b32 v8, v2 offset:swizzle(REVERSE,33)
// CHECK: error: group size must be in the interval [2,32]
ds_swizzle_b32 v8, v2 offset:swizzle(BROADCAST,1,0)
// CHECK: error: group size must be a power of two
ds_swizzle_b32 v8, v2 offset:swizzle(BROADCAST,3,1)
// CHECK: error: group size must be in the interval [2,32]
ds_swizzle_b32 v8, v2 offset:swizzle(BROADCAST,33,1)
// CHECK: error: lane id must be in the interval [0,group size - 1]
ds_swizzle_b32 v8, v2 offset:swizzle(BROADCAST,2,-1)
// CHECK: error: lane id must be in the interval [0,group size - 1]
ds_swizzle_b32 v8, v2 offset:swizzle(BROADCAST,2,2)
// CHECK: error: expected a string
ds_swizzle_b32 v8, v2 offset:swizzle(BITMASK_PERM, pppii)
// CHECK: error: expected a 5-character mask
ds_swizzle_b32 v8, v2 offset:swizzle(BITMASK_PERM, "")
// CHECK: error: expected a 5-character mask
ds_swizzle_b32 v8, v2 offset:swizzle(BITMASK_PERM, "ppii")
// CHECK: error: expected a 5-character mask
ds_swizzle_b32 v8, v2 offset:swizzle(BITMASK_PERM, "pppiii")
// CHECK: invalid mask
ds_swizzle_b32 v8, v2 offset:swizzle(BITMASK_PERM, "pppi2")

42
external/llvm/test/MC/AMDGPU/ds-gfx9.s vendored
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// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX9 -check-prefix=GCN %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding 2>&1 %s | FileCheck -check-prefix=VI-ERR -check-prefix=GCNERR %s
ds_read_u8_d16 v8, v2
// GFX9: ds_read_u8_d16 v8, v2 ; encoding: [0x00,0x00,0xac,0xd8,0x02,0x00,0x00,0x08]
// VI-ERR: error: instruction not supported on this GPU
ds_read_u8_d16_hi v8, v2
// GFX9: ds_read_u8_d16_hi v8, v2 ; encoding: [0x00,0x00,0xae,0xd8,0x02,0x00,0x00,0x08]
// VI-ERR: error: instruction not supported on this GPU
ds_read_i8_d16 v8, v2
// GFX9: ds_read_i8_d16 v8, v2 ; encoding: [0x00,0x00,0xb0,0xd8,0x02,0x00,0x00,0x08]
// VI-ERR: error: instruction not supported on this GPU
ds_read_i8_d16_hi v8, v2
// GFX9: ds_read_i8_d16_hi v8, v2 ; encoding: [0x00,0x00,0xb2,0xd8,0x02,0x00,0x00,0x08]
// VI-ERR: error: instruction not supported on this GPU
ds_read_u16_d16 v8, v2
// GFX9: ds_read_u16_d16 v8, v2 ; encoding: [0x00,0x00,0xb4,0xd8,0x02,0x00,0x00,0x08]
// VI-ERR: error: instruction not supported on this GPU
ds_read_u16_d16_hi v8, v2
// GFX9: ds_read_u16_d16_hi v8, v2 ; encoding: [0x00,0x00,0xb6,0xd8,0x02,0x00,0x00,0x08]
// VI-ERR: error: instruction not supported on this GPU
ds_write_b8_d16_hi v8, v2
// VI-ERR: error: instruction not supported on this GPU
// GFX9: ds_write_b8_d16_hi v8, v2 ; encoding: [0x00,0x00,0xa8,0xd8,0x08,0x02,0x00,0x00]
ds_write_b16_d16_hi v8, v2
// VI-ERR: error: instruction not supported on this GPU
// GFX9: ds_write_b16_d16_hi v8, v2 ; encoding: [0x00,0x00,0xaa,0xd8,0x08,0x02,0x00,0x00]
ds_write_addtid_b32 v8, v2
// VI-ERR: error: instruction not supported on this GPU
// GFX9: ds_write_addtid_b32 v8, v2 ; encoding: [0x00,0x00,0x3a,0xd8,0x08,0x02,0x00,0x00]
ds_read_addtid_b32 v8, v2
// VI-ERR: error: instruction not supported on this GPU
// GFX9: ds_read_addtid_b32 v8, v2 ; encoding: [0x00,0x00,0x6c,0xd9,0x02,0x00,0x00,0x08]

648
external/llvm/test/MC/AMDGPU/ds.s vendored
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7
external/llvm/test/MC/AMDGPU/elf-notes-verify-amdgcn.s vendored
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// RUN: not llvm-mc -arch amdgcn %s 2>&1 | FileCheck --check-prefix=GCN %s
// GCN: error: .amd_amdgpu_hsa_metadata directive is not available on non-amdhsa OSes
.amd_amdgpu_hsa_metadata
// GCN: error: .amd_amdgpu_pal_metadata directive is not available on non-amdpal OSes
.amd_amdgpu_pal_metadata

10
external/llvm/test/MC/AMDGPU/elf-notes-verify-r600.s vendored
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// RUN: not llvm-mc -arch r600 %s 2>&1 | FileCheck --check-prefix=R600 %s
// R600: error: .amd_amdgpu_isa directive is not available on non-amdgcn architectures
.amd_amdgpu_isa "r600"
// R600: error: .amd_amdgpu_hsa_metadata directive is not available on non-amdhsa OSes
.amd_amdgpu_hsa_metadata
// R600: error: .amd_amdgpu_pal_metadata directive is not available on non-amdpal OSes
.amd_amdgpu_pal_metadata

107
external/llvm/test/MC/AMDGPU/exp-err.s vendored
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// RUN: not llvm-mc -arch=amdgcn -show-encoding %s 2>&1 | FileCheck -check-prefix=GCN %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s 2>&1 | FileCheck -check-prefix=GCN %s
exp mrt8 v3, v2, v1, v0
// GCN: :5: error: invalid exp target
exp pos4 v3, v2, v1, v0
// GCN: :5: error: invalid exp target
exp param32 v3, v2, v1, v0
// GCN: :5: error: invalid exp target
exp invalid_target_10 v3, v2, v1, v0
// GCN: :5: error: invalid exp target
exp invalid_target_10 v3, v2, v1, v0 done
// GCN: :5: error: invalid exp target
exp invalid_target_11 v3, v2, v1, v0
// GCN: :5: error: invalid exp target
exp invalid_target_11 v3, v2, v1, v0 done
// GCN: :5: error: invalid exp target
exp mrt-1 v3, v2, v1, v0
// GCN: :5: error: failed parsing operand
exp mrtX v3, v2, v1, v0
// GCN: :5: error: failed parsing operand
exp pos-1 v3, v2, v1, v0
// GCN: :5: error: failed parsing operand
exp posX v3, v2, v1, v0
// GCN: :5: error: failed parsing operand
exp param-1 v3, v2, v1, v0
// GCN: :5: error: failed parsing operand
exp paramX v3, v2, v1, v0
// GCN: :5: error: failed parsing operand
exp invalid_target_-1 v3, v2, v1, v0
// GCN: :5: error: failed parsing operand
exp invalid_target_X v3, v2, v1, v0
// GCN: :5: error: failed parsing operand
exp mrt0 s0, v0, v0, v0
// GCN: 10: error: invalid operand for instruction
exp mrt0 v0, s0, v0, v0
// GCN: 14: error: invalid operand for instruction
exp mrt0 v0, v0, s0, v0
// GCN: 18: error: invalid operand for instruction
exp mrt0 v0, v0, v0, s0
// GCN: 22: error: invalid operand for instruction
exp mrt0 v[0:1], v0, v0, v0
// GCN: 10: error: invalid operand for instruction
exp mrt0 v0, v[0:1], v0, v0
// GCN: 14: error: invalid operand for instruction
exp mrt0 v0, v0, v[0:1], v0
// GCN: 18: error: invalid operand for instruction
exp mrt0 v0, v0, v0, v[0:1]
// GCN: 22: error: invalid operand for instruction
exp mrt0 1.0, v0, v0, v0
// GCN: 10: error: invalid operand for instruction
exp mrt0 v0, 1.0, v0, v0
// GCN: 14: error: invalid operand for instruction
exp mrt0 v0, v0, 1.0, v0
// GCN: 18: error: invalid operand for instruction
exp mrt0 v0, v0, v0, 1.0
// GCN: 22: error: invalid operand for instruction
exp mrt0 7, v0, v0, v0
// GCN: 10: error: invalid operand for instruction
exp mrt0 v0, 7, v0, v0
// GCN: 14: error: invalid operand for instruction
exp mrt0 v0, v0, 7, v0
// GCN: 18: error: invalid operand for instruction
exp mrt0 v0, v0, v0, 7
// GCN: 22: error: invalid operand for instruction
exp mrt0 0x12345678, v0, v0, v0
// GCN: 10: error: invalid operand for instruction
exp mrt0 v0, 0x12345678, v0, v0
// GCN: 14: error: invalid operand for instruction
exp mrt0 v0, v0, 0x12345678, v0
// GCN: 18: error: invalid operand for instruction
exp mrt0 v0, v0, v0, 0x12345678
// GCN: 22: error: invalid operand for instruction

126
external/llvm/test/MC/AMDGPU/exp.s vendored
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// RUN: llvm-mc -arch=amdgcn -show-encoding %s | FileCheck -check-prefix=SI %s
// RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=VI %s
exp mrt0 off, off, off, off
// SI: exp mrt0 off, off, off, off ; encoding: [0x00,0x00,0x00,0xf8,0x00,0x00,0x00,0x00]
// VI: exp mrt0 off, off, off, off ; encoding: [0x00,0x00,0x00,0xc4,0x00,0x00,0x00,0x00]
exp mrt0 off, off, off, off done
// SI: exp mrt0 off, off, off, off done ; encoding: [0x00,0x08,0x00,0xf8,0x00,0x00,0x00,0x00]
// VI: exp mrt0 off, off, off, off done ; encoding: [0x00,0x08,0x00,0xc4,0x00,0x00,0x00,0x00]
exp mrt0 v4, off, off, off done
// SI: exp mrt0 v4, off, off, off done ; encoding: [0x01,0x08,0x00,0xf8,0x04,0x00,0x00,0x00]
// VI: exp mrt0 v4, off, off, off done ; encoding: [0x01,0x08,0x00,0xc4,0x04,0x00,0x00,0x00]
exp mrt0 off, v3, off, off done
// SI: exp mrt0 off, v3, off, off done ; encoding: [0x02,0x08,0x00,0xf8,0x00,0x03,0x00,0x00]
// VI: exp mrt0 off, v3, off, off done ; encoding: [0x02,0x08,0x00,0xc4,0x00,0x03,0x00,0x00]
exp mrt0 off, off, v2, off done
// SI: exp mrt0 off, off, v2, off done ; encoding: [0x04,0x08,0x00,0xf8,0x00,0x00,0x02,0x00]
// VI: exp mrt0 off, off, v2, off done ; encoding: [0x04,0x08,0x00,0xc4,0x00,0x00,0x02,0x00]
exp mrt0 off, off, off, v1 done
// SI: exp mrt0 off, off, off, v1 done ; encoding: [0x08,0x08,0x00,0xf8,0x00,0x00,0x00,0x01]
// VI: exp mrt0 off, off, off, v1 done ; encoding: [0x08,0x08,0x00,0xc4,0x00,0x00,0x00,0x01]
exp mrt0 v4, v3, off, off done
// SI: exp mrt0 v4, v3, off, off done ; encoding: [0x03,0x08,0x00,0xf8,0x04,0x03,0x00,0x00]
// VI: exp mrt0 v4, v3, off, off done ; encoding: [0x03,0x08,0x00,0xc4,0x04,0x03,0x00,0x00]
exp mrt0 v4, off, v2, off done
// SI: exp mrt0 v4, off, v2, off done ; encoding: [0x05,0x08,0x00,0xf8,0x04,0x00,0x02,0x00]
// VI: exp mrt0 v4, off, v2, off done ; encoding: [0x05,0x08,0x00,0xc4,0x04,0x00,0x02,0x00]
exp mrt0 v4, off, off, v1
// SI: exp mrt0 v4, off, off, v1 ; encoding: [0x09,0x00,0x00,0xf8,0x04,0x00,0x00,0x01]
// VI: exp mrt0 v4, off, off, v1 ; encoding: [0x09,0x00,0x00,0xc4,0x04,0x00,0x00,0x01]
exp mrt0 v4, off, off, v1 done
// SI: exp mrt0 v4, off, off, v1 done ; encoding: [0x09,0x08,0x00,0xf8,0x04,0x00,0x00,0x01]
// VI: exp mrt0 v4, off, off, v1 done ; encoding: [0x09,0x08,0x00,0xc4,0x04,0x00,0x00,0x01]
exp mrt0 v4, v3, v2, v1
// SI: exp mrt0 v4, v3, v2, v1 ; encoding: [0x0f,0x00,0x00,0xf8,0x04,0x03,0x02,0x01]
// VI: exp mrt0 v4, v3, v2, v1 ; encoding: [0x0f,0x00,0x00,0xc4,0x04,0x03,0x02,0x01]
exp mrt0 v4, v3, v2, v1 done
// SI: exp mrt0 v4, v3, v2, v1 done ; encoding: [0x0f,0x08,0x00,0xf8,0x04,0x03,0x02,0x01]
// VI: exp mrt0 v4, v3, v2, v1 done ; encoding: [0x0f,0x08,0x00,0xc4,0x04,0x03,0x02,0x01]
exp mrt7 v1, v1, v1, v1
// SI: exp mrt7 v1, v1, v1, v1 ; encoding: [0x7f,0x00,0x00,0xf8,0x01,0x01,0x01,0x01]
// VI: exp mrt7 v1, v1, v1, v1 ; encoding: [0x7f,0x00,0x00,0xc4,0x01,0x01,0x01,0x01]
exp mrt7 v1, v1, v1, v1 done
// SI: exp mrt7 v1, v1, v1, v1 done ; encoding: [0x7f,0x08,0x00,0xf8,0x01,0x01,0x01,0x01]
// VI: exp mrt7 v1, v1, v1, v1 done ; encoding: [0x7f,0x08,0x00,0xc4,0x01,0x01,0x01,0x01]
exp mrtz v4, v3, v2, v1
// SI: exp mrtz v4, v3, v2, v1 ; encoding: [0x8f,0x00,0x00,0xf8,0x04,0x03,0x02,0x01]
// VI: exp mrtz v4, v3, v2, v1 ; encoding: [0x8f,0x00,0x00,0xc4,0x04,0x03,0x02,0x01]
exp mrtz v4, v3, v2, v1 done
// SI: exp mrtz v4, v3, v2, v1 done ; encoding: [0x8f,0x08,0x00,0xf8,0x04,0x03,0x02,0x01]
// VI: exp mrtz v4, v3, v2, v1 done ; encoding: [0x8f,0x08,0x00,0xc4,0x04,0x03,0x02,0x01]
exp null v4, v3, v2, v1
// SI: exp null v4, v3, v2, v1 ; encoding: [0x9f,0x00,0x00,0xf8,0x04,0x03,0x02,0x01]
// VI: exp null v4, v3, v2, v1 ; encoding: [0x9f,0x00,0x00,0xc4,0x04,0x03,0x02,0x01]
exp null v4, v3, v2, v1 done
// SI: exp null v4, v3, v2, v1 done ; encoding: [0x9f,0x08,0x00,0xf8,0x04,0x03,0x02,0x01]
// VI: exp null v4, v3, v2, v1 done ; encoding: [0x9f,0x08,0x00,0xc4,0x04,0x03,0x02,0x01]
exp pos0 v4, v3, v2, v1
// SI: exp pos0 v4, v3, v2, v1 ; encoding: [0xcf,0x00,0x00,0xf8,0x04,0x03,0x02,0x01]
// VI: exp pos0 v4, v3, v2, v1 ; encoding: [0xcf,0x00,0x00,0xc4,0x04,0x03,0x02,0x01]
exp pos0 v4, v3, v2, v1 done
// SI: exp pos0 v4, v3, v2, v1 done ; encoding: [0xcf,0x08,0x00,0xf8,0x04,0x03,0x02,0x01]
// VI: exp pos0 v4, v3, v2, v1 done ; encoding: [0xcf,0x08,0x00,0xc4,0x04,0x03,0x02,0x01]
exp pos3 v4, v3, v2, v1
// SI: exp pos3 v4, v3, v2, v1 ; encoding: [0xff,0x00,0x00,0xf8,0x04,0x03,0x02,0x01]
// VI: exp pos3 v4, v3, v2, v1 ; encoding: [0xff,0x00,0x00,0xc4,0x04,0x03,0x02,0x01]
exp pos3 v4, v3, v2, v1 done
// SI: exp pos3 v4, v3, v2, v1 done ; encoding: [0xff,0x08,0x00,0xf8,0x04,0x03,0x02,0x01]
// VI: exp pos3 v4, v3, v2, v1 done ; encoding: [0xff,0x08,0x00,0xc4,0x04,0x03,0x02,0x01]
exp param0 v4, v3, v2, v1
// SI: exp param0 v4, v3, v2, v1 ; encoding: [0x0f,0x02,0x00,0xf8,0x04,0x03,0x02,0x01]
// VI: exp param0 v4, v3, v2, v1 ; encoding: [0x0f,0x02,0x00,0xc4,0x04,0x03,0x02,0x01]
exp param0 v4, v3, v2, v1 done
// SI: exp param0 v4, v3, v2, v1 done ; encoding: [0x0f,0x0a,0x00,0xf8,0x04,0x03,0x02,0x01]
// VI: exp param0 v4, v3, v2, v1 done ; encoding: [0x0f,0x0a,0x00,0xc4,0x04,0x03,0x02,0x01]
exp param31 v4, v3, v2, v1
// SI: exp param31 v4, v3, v2, v1 ; encoding: [0xff,0x03,0x00,0xf8,0x04,0x03,0x02,0x01]
// VI: exp param31 v4, v3, v2, v1 ; encoding: [0xff,0x03,0x00,0xc4,0x04,0x03,0x02,0x01]
exp param31 v4, v3, v2, v1 done
// SI: exp param31 v4, v3, v2, v1 done ; encoding: [0xff,0x0b,0x00,0xf8,0x04,0x03,0x02,0x01]
// VI: exp param31 v4, v3, v2, v1 done ; encoding: [0xff,0x0b,0x00,0xc4,0x04,0x03,0x02,0x01]
exp mrt0 v4, v3, v2, v1 vm
// SI: exp mrt0 v4, v3, v2, v1 vm ; encoding: [0x0f,0x10,0x00,0xf8,0x04,0x03,0x02,0x01]
// VI: exp mrt0 v4, v3, v2, v1 vm ; encoding: [0x0f,0x10,0x00,0xc4,0x04,0x03,0x02,0x01]
exp mrt0 v4, v3, v2, v1 done vm
// SI: exp mrt0 v4, v3, v2, v1 done vm ; encoding: [0x0f,0x18,0x00,0xf8,0x04,0x03,0x02,0x01]
// VI: exp mrt0 v4, v3, v2, v1 done vm ; encoding: [0x0f,0x18,0x00,0xc4,0x04,0x03,0x02,0x01]
exp mrtz, v3, v3, v7, v7 compr
// SI: exp mrtz v3, v3, v7, v7 compr ; encoding: [0x8f,0x04,0x00,0xf8,0x03,0x07,0x00,0x00]
// VI: exp mrtz v3, v3, v7, v7 compr ; encoding: [0x8f,0x04,0x00,0xc4,0x03,0x07,0x00,0x00]
exp mrtz, off, off, v7, v7 compr
// SI: exp mrtz off, off, v7, v7 compr ; encoding: [0x8c,0x04,0x00,0xf8,0x00,0x07,0x00,0x00]
// VI: exp mrtz off, off, v7, v7 compr ; encoding: [0x8c,0x04,0x00,0xc4,0x00,0x07,0x00,0x00]
exp mrtz, v3, v3, off, off compr
// SI: exp mrtz v3, v3, off, off compr ; encoding: [0x83,0x04,0x00,0xf8,0x03,0x00,0x00,0x00]
// VI: exp mrtz v3, v3, off, off compr ; encoding: [0x83,0x04,0x00,0xc4,0x03,0x00,0x00,0x00]

56
external/llvm/test/MC/AMDGPU/expressions.s vendored
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@ -1,56 +0,0 @@
// RUN: llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck %s --check-prefix=VI
.globl global
.globl gds
// Parse a global expression
s_mov_b32 s0, global
// VI: s_mov_b32 s0, global ; encoding: [0xff,0x00,0x80,0xbe,A,A,A,A]
// VI-NEXT: ; fixup A - offset: 4, value: global, kind: FK_PCRel_4
// Use a token with the same name as a global
ds_gws_init v2 gds
// VI: ds_gws_init v2 gds ; encoding: [0x00,0x00,0x33,0xd9,0x00,0x02,0x00,0x00]
// Use a global with the same name as a token
s_mov_b32 s0, gds
// VI: s_mov_b32 s0, gds ; encoding: [0xff,0x00,0x80,0xbe,A,A,A,A]
// VI-NEXT: ; fixup A - offset: 4, value: gds, kind: FK_PCRel_4
// Use a binary expression
s_mov_b32 s0, gds+4
// VI: s_mov_b32 s0, gds+4 ; encoding: [0xff,0x00,0x80,0xbe,A,A,A,A]
// VI-NEXT: ; fixup A - offset: 4, value: gds+4, kind: FK_PCRel_4
// Consecutive instructions with no blank line in between to make sure we
// don't call Lex() too many times.
s_add_u32 s0, s0, global+4
s_addc_u32 s1, s1, 0
// VI: s_add_u32 s0, s0, global+4
// VI: s_addc_u32 s1, s1, 0
// Use a computed expression that results in an inline immediate.
.set foo, 4
s_mov_b32 s0, foo+2
// VI: s_mov_b32 s0, 6 ; encoding: [0x86,0x00,0x80,0xbe]
// Use a computed expression that results in a non-inline immediate.
.set foo, 512
s_mov_b32 s0, foo+2
// VI: s_mov_b32 s0, 514 ; encoding: [0xff,0x00,0x80,0xbe,0x02,0x02,0x00,0x00]
BB1:
v_nop_e64
BB2:
s_sub_u32 vcc_lo, vcc_lo, (BB2+4)-BB1
// VI: s_sub_u32 vcc_lo, vcc_lo, (BB2+4)-BB1 ; encoding: [0x6a,0xff,0xea,0x80,A,A,A,A]
// VI-NEXT: ; fixup A - offset: 4, value: (BB2+4)-BB1, kind: FK_Data_4
t=1
s_sub_u32 s0, s0, -t
// VI: s_sub_u32 s0, s0, -1 ; encoding: [0x00,0xc1,0x80,0x80]
t=-1
s_sub_u32 s0, s0, -t
// VI: s_sub_u32 s0, s0, 1 ; encoding: [0x00,0x81,0x80,0x80]

148
external/llvm/test/MC/AMDGPU/flat-gfx9.s vendored
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@ -1,148 +0,0 @@
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX9 -check-prefix=GCN %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=VI -check-prefix=GCN %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding 2>&1 %s | FileCheck -check-prefix=GFX9-ERR -check-prefix=GCNERR %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding 2>&1 %s | FileCheck -check-prefix=VI-ERR -check-prefix=GCNERR %s
flat_load_dword v1, v[3:4] offset:0
// GCN: flat_load_dword v1, v[3:4] ; encoding: [0x00,0x00,0x50,0xdc,0x03,0x00,0x00,0x01]
flat_load_dword v1, v[3:4] offset:-1
// GCN-ERR: :35: error: failed parsing operand.
// FIXME: Error on VI in wrong column
flat_load_dword v1, v[3:4] offset:4095
// GFX9: flat_load_dword v1, v[3:4] offset:4095 ; encoding: [0xff,0x0f,0x50,0xdc,0x03,0x00,0x00,0x01]
// VIERR: :1: error: invalid operand for instruction
flat_load_dword v1, v[3:4] offset:4096
// GCNERR: :28: error: invalid operand for instruction
flat_load_dword v1, v[3:4] offset:4 glc
// GFX9: flat_load_dword v1, v[3:4] offset:4 glc ; encoding: [0x04,0x00,0x51,0xdc,0x03,0x00,0x00,0x01]
// VIERR: :1: error: invalid operand for instruction
flat_load_dword v1, v[3:4] offset:4 glc slc
// GFX9: flat_load_dword v1, v[3:4] offset:4 glc slc ; encoding: [0x04,0x00,0x53,0xdc,0x03,0x00,0x00,0x01]
// VIERR: :1: error: invalid operand for instruction
flat_atomic_add v[3:4], v5 offset:8 slc
// GFX9: flat_atomic_add v[3:4], v5 offset:8 slc ; encoding: [0x08,0x00,0x0a,0xdd,0x03,0x05,0x00,0x00]
// VIERR: :1: error: invalid operand for instruction
flat_atomic_add v[3:4], v5 inst_offset:8 slc
// GFX9: flat_atomic_add v[3:4], v5 offset:8 slc ; encoding: [0x08,0x00,0x0a,0xdd,0x03,0x05,0x00,0x00]
// VIERR: :1: error: invalid operand for instruction
flat_atomic_cmpswap v[1:2], v[3:4] offset:4095
// GFX9: flat_atomic_cmpswap v[1:2], v[3:4] offset:4095 ; encoding: [0xff,0x0f,0x04,0xdd,0x01,0x03,0x00,0x00]
// VIERR: :1: error: invalid operand for instruction
flat_atomic_cmpswap v[1:2], v[3:4] offset:4095 slc
// GFX9: flat_atomic_cmpswap v[1:2], v[3:4] offset:4095 slc ; encoding: [0xff,0x0f,0x06,0xdd,0x01,0x03,0x00,0x00]
// VIERR: :1: error: invalid operand for instruction
flat_atomic_cmpswap v[1:2], v[3:4]
// GFX9: flat_atomic_cmpswap v[1:2], v[3:4] ; encoding: [0x00,0x00,0x04,0xdd,0x01,0x03,0x00,0x00]
// VI: flat_atomic_cmpswap v[1:2], v[3:4] ; encoding: [0x00,0x00,0x04,0xdd,0x01,0x03,0x00,0x00]
flat_atomic_cmpswap v[1:2], v[3:4] slc
// GFX9: flat_atomic_cmpswap v[1:2], v[3:4] slc ; encoding: [0x00,0x00,0x06,0xdd,0x01,0x03,0x00,0x00]
// VI: flat_atomic_cmpswap v[1:2], v[3:4] slc ; encoding: [0x00,0x00,0x06,0xdd,0x01,0x03,0x00,0x00]
flat_atomic_cmpswap v[1:2], v[3:4] offset:4095 glc
// GCNERR: error: invalid operand for instruction
flat_atomic_cmpswap v[1:2], v[3:4] glc
// GCNERR: error: invalid operand for instruction
flat_atomic_cmpswap v0, v[1:2], v[3:4] offset:4095 glc
// GFX9: flat_atomic_cmpswap v0, v[1:2], v[3:4] offset:4095 glc ; encoding: [0xff,0x0f,0x05,0xdd,0x01,0x03,0x00,0x00]
// VIERR: :1: error: invalid operand for instruction
flat_atomic_cmpswap v0, v[1:2], v[3:4] offset:4095 glc slc
// GFX9: flat_atomic_cmpswap v0, v[1:2], v[3:4] offset:4095 glc slc ; encoding: [0xff,0x0f,0x07,0xdd,0x01,0x03,0x00,0x00]
// VIERR: :1: error: invalid operand for instruction
flat_atomic_cmpswap v0, v[1:2], v[3:4] glc
// GFX9: flat_atomic_cmpswap v0, v[1:2], v[3:4] glc ; encoding: [0x00,0x00,0x05,0xdd,0x01,0x03,0x00,0x00]
// VI: flat_atomic_cmpswap v0, v[1:2], v[3:4] glc ; encoding: [0x00,0x00,0x05,0xdd,0x01,0x03,0x00,0x00]
flat_atomic_cmpswap v0, v[1:2], v[3:4] glc slc
// GFX9: flat_atomic_cmpswap v0, v[1:2], v[3:4] glc slc ; encoding: [0x00,0x00,0x07,0xdd,0x01,0x03,0x00,0x00]
// VI: flat_atomic_cmpswap v0, v[1:2], v[3:4] glc slc ; encoding: [0x00,0x00,0x07,0xdd,0x01,0x03,0x00,0x00]
flat_atomic_cmpswap v0, v[1:2], v[3:4]
// GFX9: flat_atomic_cmpswap v0, v[1:2], v[3:4] glc ; encoding: [0x00,0x00,0x05,0xdd,0x01,0x03,0x00,0x00]
// VI: flat_atomic_cmpswap v0, v[1:2], v[3:4] glc ; encoding: [0x00,0x00,0x05,0xdd,0x01,0x03,0x00,0x00]
flat_atomic_cmpswap v0, v[1:2], v[3:4] offset:4095
// GCNERR: error: too few operands for instruction
flat_atomic_cmpswap v0, v[1:2], v[3:4] slc
// GCNERR: error: invalid operand for instruction
flat_atomic_swap v[3:4], v5 offset:16
// GFX9: flat_atomic_swap v[3:4], v5 offset:16 ; encoding: [0x10,0x00,0x00,0xdd,0x03,0x05,0x00,0x00]
// VIERR: :1: error: invalid operand for instruction
flat_store_dword v[3:4], v1 offset:16
// GFX9: flat_store_dword v[3:4], v1 offset:16 ; encoding: [0x10,0x00,0x70,0xdc,0x03,0x01,0x00,0x00]
// VIERR: :1: error: invalid operand for instruction
flat_store_dword v[3:4], v1, off
// GCNERR: :30: error: invalid operand for instruction
flat_store_dword v[3:4], v1, s[0:1]
// GCNERR: :30: error: invalid operand for instruction
flat_store_dword v[3:4], v1, s0
// GCNERR: :30: error: invalid operand for instruction
flat_load_dword v1, v[3:4], off
// GCNERR: :29: error: invalid operand for instruction
flat_load_dword v1, v[3:4], s[0:1]
// GCNERR: :29: error: invalid operand for instruction
flat_load_dword v1, v[3:4], s0
// GCNERR: :29: error: invalid operand for instruction
flat_load_dword v1, v[3:4], exec_hi
// GCNERR: :29: error: invalid operand for instruction
flat_store_dword v[3:4], v1, exec_hi
// GCNERR: :30: error: invalid operand for instruction
flat_load_ubyte_d16 v1, v[3:4]
// GFX9: flat_load_ubyte_d16 v1, v[3:4] ; encoding: [0x00,0x00,0x80,0xdc,0x03,0x00,0x00,0x01]
// VI-ERR: error: instruction not supported on this GPU
flat_load_ubyte_d16_hi v1, v[3:4]
// GFX9: flat_load_ubyte_d16_hi v1, v[3:4] ; encoding: [0x00,0x00,0x84,0xdc,0x03,0x00,0x00,0x01]
// VI-ERR: error: instruction not supported on this GPU
flat_load_sbyte_d16 v1, v[3:4]
// GFX9: flat_load_sbyte_d16 v1, v[3:4] ; encoding: [0x00,0x00,0x88,0xdc,0x03,0x00,0x00,0x01]
// VI-ERR: error: instruction not supported on this GPU
flat_load_sbyte_d16_hi v1, v[3:4]
// GFX9: flat_load_sbyte_d16_hi v1, v[3:4] ; encoding: [0x00,0x00,0x8c,0xdc,0x03,0x00,0x00,0x01]
// VI-ERR: error: instruction not supported on this GPU
flat_load_short_d16 v1, v[3:4]
// GFX9: flat_load_short_d16 v1, v[3:4] ; encoding: [0x00,0x00,0x90,0xdc,0x03,0x00,0x00,0x01]
// VI-ERR: error: instruction not supported on this GPU
flat_load_short_d16_hi v1, v[3:4]
// GFX9: flat_load_short_d16_hi v1, v[3:4] ; encoding: [0x00,0x00,0x94,0xdc,0x03,0x00,0x00,0x01]
// VI-ERR: error: instruction not supported on this GPU
flat_store_byte_d16_hi v[3:4], v1
// GFX9: flat_store_byte_d16_hi v[3:4], v1 ; encoding: [0x00,0x00,0x64,0xdc,0x03,0x01,0x00,0x00]
// VI-ERR: error: instruction not supported on this GPU
flat_store_short_d16_hi v[3:4], v1
// GFX9: flat_store_short_d16_hi v[3:4], v1 ; encoding: [0x00,0x00,0x6c,0xdc,0x03,0x01,0x00,0x00
// VI-ERR: error: instruction not supported on this GPU

365
external/llvm/test/MC/AMDGPU/flat-global.s vendored
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@ -1,365 +0,0 @@
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX9 -check-prefix=GCN %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding 2>&1 %s | FileCheck -check-prefix=GFX9-ERR -check-prefix=GCNERR %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding 2>&1 %s | FileCheck -check-prefix=VI-ERR -check-prefix=GCNERR %s
global_load_ubyte v1, v[3:4], off
// GFX9: global_load_ubyte v1, v[3:4], off ; encoding: [0x00,0x80,0x40,0xdc,0x03,0x00,0x7f,0x01]
// VI-ERR: instruction not supported on this GPU
global_load_sbyte v1, v[3:4], off
// GFX9: global_load_sbyte v1, v[3:4], off ; encoding: [0x00,0x80,0x44,0xdc,0x03,0x00,0x7f,0x01]
// VI-ERR: instruction not supported on this GPU
global_load_ushort v1, v[3:4], off
// GFX9: global_load_ushort v1, v[3:4], off ; encoding: [0x00,0x80,0x48,0xdc,0x03,0x00,0x7f,0x01]
// VI-ERR: instruction not supported on this GPU
global_load_sshort v1, v[3:4], off
// GFX9: global_load_sshort v1, v[3:4], off ; encoding: [0x00,0x80,0x4c,0xdc,0x03,0x00,0x7f,0x01]
// VI-ERR: instruction not supported on this GPU
global_load_dword v1, v[3:4], off
// GFX9: global_load_dword v1, v[3:4], off ; encoding: [0x00,0x80,0x50,0xdc,0x03,0x00,0x7f,0x01]
// VI-ERR: instruction not supported on this GPU
global_load_dwordx2 v[1:2], v[3:4], off
// GFX9: global_load_dwordx2 v[1:2], v[3:4], off ; encoding: [0x00,0x80,0x54,0xdc,0x03,0x00,0x7f,0x01]
// VI-ERR: instruction not supported on this GPU
global_load_dwordx3 v[1:3], v[3:4], off
// GFX9: global_load_dwordx3 v[1:3], v[3:4], off ; encoding: [0x00,0x80,0x58,0xdc,0x03,0x00,0x7f,0x01]
// VI-ERR: instruction not supported on this GPU
global_load_dwordx4 v[1:4], v[3:4], off
// GFX9: global_load_dwordx4 v[1:4], v[3:4], off ; encoding: [0x00,0x80,0x5c,0xdc,0x03,0x00,0x7f,0x01]
// VI-ERR: instruction not supported on this GPU
// FIXME: VI error should be instruction nto supported
global_load_dword v1, v[3:4], off offset:0
// GFX9: global_load_dword v1, v[3:4], off ; encoding: [0x00,0x80,0x50,0xdc,0x03,0x00,0x7f,0x01]
// VI-ERR: :41: error: not a valid operand.
global_load_dword v1, v[3:4], off offset:4095
// GFX9: global_load_dword v1, v[3:4], off offset:4095 ; encoding: [0xff,0x8f,0x50,0xdc,0x03,0x00,0x7f,0x01]
// VI-ERR: :41: error: not a valid operand.
global_load_dword v1, v[3:4], off offset:-1
// GFX9: global_load_dword v1, v[3:4], off offset:-1 ; encoding: [0xff,0x9f,0x50,0xdc,0x03,0x00,0x7f,0x01]
// VI-ERR: :41: error: not a valid operand.
global_load_dword v1, v[3:4], off offset:-4096
// GFX9: global_load_dword v1, v[3:4], off offset:-4096 ; encoding: [0x00,0x90,0x50,0xdc,0x03,0x00,0x7f,0x01]
// VI-ERR: :41: error: not a valid operand.
global_load_dword v1, v[3:4], off offset:4096
// GFX9-ERR: :35: error: invalid operand for instruction
// VI-ERR: :41: error: not a valid operand.
global_load_dword v1, v[3:4] off, offset:-4097
// GFX9-ERR: :35: error: invalid operand for instruction
// VI-ERR: :41: error: not a valid operand.
global_store_byte v[3:4], v1, off
// GFX9: global_store_byte v[3:4], v1, off ; encoding: [0x00,0x80,0x60,0xdc,0x03,0x01,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
global_store_short v[3:4], v1, off
// GFX9: global_store_short v[3:4], v1, off ; encoding: [0x00,0x80,0x68,0xdc,0x03,0x01,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
global_store_dword v[3:4], v1, off
// GFX9: global_store_dword v[3:4], v1, off ; encoding: [0x00,0x80,0x70,0xdc,0x03,0x01,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
global_store_dwordx2 v[3:4], v[1:2], off
// GFX9: global_store_dwordx2 v[3:4], v[1:2], off ; encoding: [0x00,0x80,0x74,0xdc,0x03,0x01,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
global_store_dwordx3 v[3:4], v[1:3], off
// GFX9: global_store_dwordx3 v[3:4], v[1:3], off ; encoding: [0x00,0x80,0x78,0xdc,0x03,0x01,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
global_store_dwordx4 v[3:4], v[1:4], off
// GFX9: global_store_dwordx4 v[3:4], v[1:4], off ; encoding: [0x00,0x80,0x7c,0xdc,0x03,0x01,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
global_store_dword v[3:4], v1, off offset:12
// GFX9: global_store_dword v[3:4], v1, off offset:12 ; encoding: [0x0c,0x80,0x70,0xdc,0x03,0x01,0x7f,0x00]
// VI-ERR: :42: error: not a valid operand
global_load_dword v1, v[3:4], s[2:3]
// GFX9: global_load_dword v1, v[3:4], s[2:3] ; encoding: [0x00,0x80,0x50,0xdc,0x03,0x00,0x02,0x01]
// VI-ERR: instruction not supported on this GPU
global_load_dword v1, v[3:4], s[2:3] offset:24
// GFX9: global_load_dword v1, v[3:4], s[2:3] offset:24 ; encoding: [0x18,0x80,0x50,0xdc,0x03,0x00,0x02,0x01]
// VI-ERR: :44: error: not a valid operand.
global_load_dword v1, v[3:4], s[2:3] offset:-8
// GFX9: global_load_dword v1, v[3:4], s[2:3] offset:-8 ; encoding: [0xf8,0x9f,0x50,0xdc,0x03,0x00,0x02,0x01]
// VI-ERR: :44: error: not a valid operand.
global_store_dword v[3:4], v1, s[2:3]
// GFX9: global_store_dword v[3:4], v1, s[2:3] ; encoding: [0x00,0x80,0x70,0xdc,0x03,0x01,0x02,0x00]
// VI-ERR: instruction not supported on this GPU
global_store_dword v[3:4], v1, s[2:3] offset:24
// GFX9: global_store_dword v[3:4], v1, s[2:3] offset:24 ; encoding: [0x18,0x80,0x70,0xdc,0x03,0x01,0x02,0x00]
// VI-ERR: :45: error: not a valid operand.
global_store_dword v[3:4], v1, s[2:3] offset:-8
// GFX9: global_store_dword v[3:4], v1, s[2:3] offset:-8 ; encoding: [0xf8,0x9f,0x70,0xdc,0x03,0x01,0x02,0x00]
// VI-ERR: :45: error: not a valid operand.
// XXX: Is this valid?
global_store_dword v[3:4], v1, exec
// GFX9: global_store_dword v[3:4], v1, exec ; encoding: [0x00,0x80,0x70,0xdc,0x03,0x01,0x7e,0x00]
// VI-ERR: instruction not supported on this GPU
global_load_dword v1, v[3:4], s2
// GFX9-ERR: :31: error: invalid operand for instruction
// VI-ERR: :31: error: invalid operand for instruction
global_load_dword v1, v[3:4], exec_hi
// GFX9-ERR: :31: error: invalid operand for instruction
// VI-ERR: :31: error: invalid operand for instruction
global_atomic_cmpswap v[3:4], v[5:6], off
// GFX9: global_atomic_cmpswap v[3:4], v[5:6], off ; encoding: [0x00,0x80,0x04,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: error: instruction not supported on this GPU
global_atomic_cmpswap_x2 v[3:4], v[5:8], off
// GFX9: global_atomic_cmpswap_x2 v[3:4], v[5:8], off ; encoding: [0x00,0x80,0x84,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: error: instruction not supported on this GPU
global_atomic_swap v[3:4], v5, off
// GFX9: global_atomic_swap v[3:4], v5, off ; encoding: [0x00,0x80,0x00,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: error: instruction not supported on this GPU
global_atomic_swap_x2 v[3:4], v[5:6], off
// GFX9: global_atomic_swap_x2 v[3:4], v[5:6], off ; encoding: [0x00,0x80,0x80,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: error: instruction not supported on this GPU
global_atomic_add v[3:4], v5, off
// GFX9: global_atomic_add v[3:4], v5, off ; encoding: [0x00,0x80,0x08,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
global_atomic_sub v[3:4], v5, off
// GFX9: global_atomic_sub v[3:4], v5, off ; encoding: [0x00,0x80,0x0c,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
global_atomic_smin v[3:4], v5, off
// GFX9: global_atomic_smin v[3:4], v5, off ; encoding: [0x00,0x80,0x10,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
global_atomic_umin v[3:4], v5, off
// GFX9: global_atomic_umin v[3:4], v5, off ; encoding: [0x00,0x80,0x14,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
global_atomic_smax v[3:4], v5, off
// GFX9: global_atomic_smax v[3:4], v5, off ; encoding: [0x00,0x80,0x18,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
global_atomic_umax v[3:4], v5, off
// GFX9: global_atomic_umax v[3:4], v5, off ; encoding: [0x00,0x80,0x1c,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
global_atomic_and v[3:4], v5, off
// GFX9: global_atomic_and v[3:4], v5, off ; encoding: [0x00,0x80,0x20,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
global_atomic_or v[3:4], v5, off
// GFX9: global_atomic_or v[3:4], v5, off ; encoding: [0x00,0x80,0x24,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
global_atomic_xor v[3:4], v5, off
// GFX9: global_atomic_xor v[3:4], v5, off ; encoding: [0x00,0x80,0x28,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
global_atomic_inc v[3:4], v5, off
// GFX9: global_atomic_inc v[3:4], v5, off ; encoding: [0x00,0x80,0x2c,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
global_atomic_dec v[3:4], v5, off
// GFX9: global_atomic_dec v[3:4], v5, off ; encoding: [0x00,0x80,0x30,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
global_atomic_add_x2 v[3:4], v[5:6], off
// GFX9: global_atomic_add_x2 v[3:4], v[5:6], off ; encoding: [0x00,0x80,0x88,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
global_atomic_sub_x2 v[3:4], v[5:6], off
// GFX9: global_atomic_sub_x2 v[3:4], v[5:6], off ; encoding: [0x00,0x80,0x8c,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
global_atomic_smin_x2 v[3:4], v[5:6], off
// GFX9: global_atomic_smin_x2 v[3:4], v[5:6], off ; encoding: [0x00,0x80,0x90,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
global_atomic_umin_x2 v[3:4], v[5:6], off
// GFX9: global_atomic_umin_x2 v[3:4], v[5:6], off ; encoding: [0x00,0x80,0x94,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
global_atomic_smax_x2 v[3:4], v[5:6], off
// GFX9: global_atomic_smax_x2 v[3:4], v[5:6], off ; encoding: [0x00,0x80,0x98,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
global_atomic_umax_x2 v[3:4], v[5:6], off
// GFX9: global_atomic_umax_x2 v[3:4], v[5:6], off ; encoding: [0x00,0x80,0x9c,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
global_atomic_and_x2 v[3:4], v[5:6], off
// GFX9: global_atomic_and_x2 v[3:4], v[5:6], off ; encoding: [0x00,0x80,0xa0,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
global_atomic_or_x2 v[3:4], v[5:6], off
// GFX9: global_atomic_or_x2 v[3:4], v[5:6], off ; encoding: [0x00,0x80,0xa4,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
global_atomic_xor_x2 v[3:4], v[5:6], off
// GFX9: global_atomic_xor_x2 v[3:4], v[5:6], off ; encoding: [0x00,0x80,0xa8,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
global_atomic_inc_x2 v[3:4], v[5:6], off
// GFX9: global_atomic_inc_x2 v[3:4], v[5:6], off ; encoding: [0x00,0x80,0xac,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
global_atomic_dec_x2 v[3:4], v[5:6], off
// GFX9: global_atomic_dec_x2 v[3:4], v[5:6], off ; encoding: [0x00,0x80,0xb0,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: error: instruction not supported on this GPU
global_atomic_cmpswap v[3:4], v[5:6], off offset:-16
// GFX9: global_atomic_cmpswap v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0x04,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: :49: error: not a valid operand.
global_atomic_cmpswap_x2 v[3:4], v[5:8], off offset:-16
// GFX9: global_atomic_cmpswap_x2 v[3:4], v[5:8], off offset:-16 ; encoding: [0xf0,0x9f,0x84,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: :52: error: not a valid operand.
global_atomic_swap v[3:4], v5, off offset:-16
// GFX9: global_atomic_swap v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x00,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: :42: error: not a valid operand
global_atomic_swap_x2 v[3:4], v[5:6], off offset:-16
// GFX9: global_atomic_swap_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0x80,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: :49: error: not a valid operand
global_atomic_add v[3:4], v5, off offset:-16
// GFX9: global_atomic_add v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x08,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: :41: error: not a valid operand
global_atomic_sub v[3:4], v5, off offset:-16
// GFX9: global_atomic_sub v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x0c,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: :41: error: not a valid operand
global_atomic_smin v[3:4], v5, off offset:-16
// GFX9: global_atomic_smin v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x10,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: :42: error: not a valid operand
global_atomic_umin v[3:4], v5, off offset:-16
// GFX9: global_atomic_umin v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x14,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: :42: error: not a valid operand
global_atomic_smax v[3:4], v5, off offset:-16
// GFX9: global_atomic_smax v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x18,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: :42: error: not a valid operand
global_atomic_umax v[3:4], v5, off offset:-16
// GFX9: global_atomic_umax v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x1c,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: :42: error: not a valid operand
global_atomic_and v[3:4], v5, off offset:-16
// GFX9: global_atomic_and v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x20,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: :41: error: not a valid operand
global_atomic_or v[3:4], v5, off offset:-16
// GFX9: global_atomic_or v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x24,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: :40: error: not a valid operand
global_atomic_xor v[3:4], v5, off offset:-16
// GFX9: global_atomic_xor v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x28,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: :41: error: not a valid operand
global_atomic_inc v[3:4], v5, off offset:-16
// GFX9: global_atomic_inc v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x2c,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: :41: error: not a valid operand
global_atomic_dec v[3:4], v5, off offset:-16
// GFX9: global_atomic_dec v[3:4], v5, off offset:-16 ; encoding: [0xf0,0x9f,0x30,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: :41: error: not a valid operand
global_atomic_add_x2 v[3:4], v[5:6], off offset:-16
// GFX9: global_atomic_add_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0x88,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: :48: error: not a valid operand
global_atomic_sub_x2 v[3:4], v[5:6], off offset:-16
// GFX9: global_atomic_sub_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0x8c,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: :48: error: not a valid operand
global_atomic_smin_x2 v[3:4], v[5:6], off offset:-16
// GFX9: global_atomic_smin_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0x90,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: :49: error: not a valid operand
global_atomic_umin_x2 v[3:4], v[5:6], off offset:-16
// GFX9: global_atomic_umin_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0x94,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: :49: error: not a valid operand
global_atomic_smax_x2 v[3:4], v[5:6], off offset:-16
// GFX9: global_atomic_smax_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0x98,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: :49: error: not a valid operand
global_atomic_umax_x2 v[3:4], v[5:6], off offset:-16
// GFX9: global_atomic_umax_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0x9c,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: :49: error: not a valid operand
global_atomic_and_x2 v[3:4], v[5:6], off offset:-16
// GFX9: global_atomic_and_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0xa0,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: :48: error: not a valid operand
global_atomic_or_x2 v[3:4], v[5:6], off offset:-16
// GFX9: global_atomic_or_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0xa4,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: :47: error: not a valid operand
global_atomic_xor_x2 v[3:4], v[5:6], off offset:-16
// GFX9: global_atomic_xor_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0xa8,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: :48: error: not a valid operand
global_atomic_inc_x2 v[3:4], v[5:6], off offset:-16
// GFX9: global_atomic_inc_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0xac,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: :48: error: not a valid operand
global_atomic_dec_x2 v[3:4], v[5:6], off offset:-16
// GFX9: global_atomic_dec_x2 v[3:4], v[5:6], off offset:-16 ; encoding: [0xf0,0x9f,0xb0,0xdd,0x03,0x05,0x7f,0x00]
// VI-ERR: :48: error: not a valid operand
global_load_ubyte_d16 v1, v[3:4], off
// GFX9: global_load_ubyte_d16 v1, v[3:4], off ; encoding: [0x00,0x80,0x80,0xdc,0x03,0x00,0x7f,0x01]
// VI-ERR: instruction not supported on this GPU
global_load_ubyte_d16_hi v1, v[3:4], off
// GFX9: global_load_ubyte_d16_hi v1, v[3:4], off ; encoding: [0x00,0x80,0x84,0xdc,0x03,0x00,0x7f,0x01]
// VI-ERR: instruction not supported on this GPU
global_load_sbyte_d16 v1, v[3:4], off
// GFX9: global_load_sbyte_d16 v1, v[3:4], off ; encoding: [0x00,0x80,0x88,0xdc,0x03,0x00,0x7f,0x01]
// VI-ERR: instruction not supported on this GPU
global_load_sbyte_d16_hi v1, v[3:4], off
// GFX9: global_load_sbyte_d16_hi v1, v[3:4], off ; encoding: [0x00,0x80,0x8c,0xdc,0x03,0x00,0x7f,0x01]
// VI-ERR: instruction not supported on this GPU
global_load_short_d16 v1, v[3:4], off
// GFX9: global_load_short_d16 v1, v[3:4], off ; encoding: [0x00,0x80,0x90,0xdc,0x03,0x00,0x7f,0x01]
// VI-ERR: instruction not supported on this GPU
global_load_short_d16_hi v1, v[3:4], off
// GFX9: global_load_short_d16_hi v1, v[3:4], off ; encoding: [0x00,0x80,0x94,0xdc,0x03,0x00,0x7f,0x01]
// VI-ERR: instruction not supported on this GPU
global_store_byte_d16_hi v[3:4], v1, off
// GFX9: global_store_byte_d16_hi v[3:4], v1, off ; encoding: [0x00,0x80,0x64,0xdc,0x03,0x01,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
global_store_short_d16_hi v[3:4], v1, off
// GFX9: global_store_short_d16_hi v[3:4], v1, off ; encoding: [0x00,0x80,0x6c,0xdc,0x03,0x01,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU

177
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// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX9 -check-prefix=GCN %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding 2>&1 %s | FileCheck -check-prefix=GFX9-ERR -check-prefix=GCNERR %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding 2>&1 %s | FileCheck -check-prefix=VI-ERR -check-prefix=GCNERR %s
scratch_load_ubyte v1, v2, off
// GFX9: scratch_load_ubyte v1, v2, off ; encoding: [0x00,0x40,0x40,0xdc,0x02,0x00,0x7f,0x01]
// VI-ERR: instruction not supported on this GPU
scratch_load_sbyte v1, v2, off
// GFX9: scratch_load_sbyte v1, v2, off ; encoding: [0x00,0x40,0x44,0xdc,0x02,0x00,0x7f,0x01]
// VI-ERR: instruction not supported on this GPU
scratch_load_ushort v1, v2, off
// GFX9: scratch_load_ushort v1, v2, off ; encoding: [0x00,0x40,0x48,0xdc,0x02,0x00,0x7f,0x01]
// VI-ERR: instruction not supported on this GPU
scratch_load_sshort v1, v2, off
// GFX9: scratch_load_sshort v1, v2, off ; encoding: [0x00,0x40,0x4c,0xdc,0x02,0x00,0x7f,0x01]
// VI-ERR: instruction not supported on this GPU
scratch_load_dword v1, v2, off
// GFX9: scratch_load_dword v1, v2, off ; encoding: [0x00,0x40,0x50,0xdc,0x02,0x00,0x7f,0x01]
// VI-ERR: instruction not supported on this GPU
scratch_load_dwordx2 v[1:2], v3, off
// GFX9: scratch_load_dwordx2 v[1:2], v3, off ; encoding: [0x00,0x40,0x54,0xdc,0x03,0x00,0x7f,0x01]
// VI-ERR: instruction not supported on this GPU
scratch_load_dwordx3 v[1:3], v4, off
// GFX9: scratch_load_dwordx3 v[1:3], v4, off ; encoding: [0x00,0x40,0x58,0xdc,0x04,0x00,0x7f,0x01]
// VI-ERR: instruction not supported on this GPU
scratch_load_dwordx4 v[1:4], v5, off
// GFX9: scratch_load_dwordx4 v[1:4], v5, off ; encoding: [0x00,0x40,0x5c,0xdc,0x05,0x00,0x7f,0x01]
// VI-ERR: instruction not supported on this GPU
// FIXME: VI error should be instruction nto supported
scratch_load_dword v1, v2, off offset:0
// GFX9: scratch_load_dword v1, v2, off ; encoding: [0x00,0x40,0x50,0xdc,0x02,0x00,0x7f,0x01]
// VI-ERR: error: not a valid operand.
scratch_load_dword v1, v2, off offset:4095
// GFX9: scratch_load_dword v1, v2, off offset:4095 ; encoding: [0xff,0x4f,0x50,0xdc,0x02,0x00,0x7f,0x01]
// VI-ERR: error: not a valid operand.
scratch_load_dword v1, v2, off offset:-1
// GFX9: scratch_load_dword v1, v2, off offset:-1 ; encoding: [0xff,0x5f,0x50,0xdc,0x02,0x00,0x7f,0x01]
// VI-ERR: error: not a valid operand.
scratch_load_dword v1, v2, off offset:-4096
// GFX9: scratch_load_dword v1, v2, off offset:-4096 ; encoding: [0x00,0x50,0x50,0xdc,0x02,0x00,0x7f,0x01]
// VI-ERR: error: not a valid operand.
scratch_load_dword v1, v2, off offset:4096
// GFX9-ERR: error: invalid operand for instruction
// VI-ERR: error: not a valid operand.
scratch_load_dword v1, v2, off offset:-4097
// GFX9-ERR: error: invalid operand for instruction
// VI-ERR: error: not a valid operand.
scratch_store_byte v1, v2, off
// GFX9: scratch_store_byte v1, v2, off ; encoding: [0x00,0x40,0x60,0xdc,0x01,0x02,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
scratch_store_short v1, v2, off
// GFX9: scratch_store_short v1, v2, off ; encoding: [0x00,0x40,0x68,0xdc,0x01,0x02,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
scratch_store_dword v1, v2, off
// GFX9: scratch_store_dword v1, v2, off ; encoding: [0x00,0x40,0x70,0xdc,0x01,0x02,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
scratch_store_dwordx2 v1, v[2:3], off
// GFX9: scratch_store_dwordx2 v1, v[2:3], off ; encoding: [0x00,0x40,0x74,0xdc,0x01,0x02,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
scratch_store_dwordx3 v1, v[2:4], off
// GFX9: scratch_store_dwordx3 v1, v[2:4], off ; encoding: [0x00,0x40,0x78,0xdc,0x01,0x02,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
scratch_store_dwordx4 v1, v[2:5], off
// GFX9: scratch_store_dwordx4 v1, v[2:5], off ; encoding: [0x00,0x40,0x7c,0xdc,0x01,0x02,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
scratch_store_dword v1, v2, off offset:12
// GFX9: scratch_store_dword v1, v2, off offset:12 ; encoding: [0x0c,0x40,0x70,0xdc,0x01,0x02,0x7f,0x00]
// VI-ERR: error: not a valid operand
scratch_load_dword v1, off, s1
// GFX9: scratch_load_dword v1, off, s1 ; encoding: [0x00,0x40,0x50,0xdc,0x00,0x00,0x01,0x01]
// VI-ERR: instruction not supported on this GPU
scratch_load_dword v1, off, s1 offset:32
// GFX9: scratch_load_dword v1, off, s1 offset:32 ; encoding: [0x20,0x40,0x50,0xdc,0x00,0x00,0x01,0x01]
// VI-ERR: error: not a valid operand
scratch_store_dword off, v2, s1
// GFX9: scratch_store_dword off, v2, s1 ; encoding: [0x00,0x40,0x70,0xdc,0x00,0x02,0x01,0x00]
// VI-ERR: instruction not supported on this GPU
scratch_store_dword off, v2, s1 offset:12
// GFX9: scratch_store_dword off, v2, s1 offset:12 ; encoding: [0x0c,0x40,0x70,0xdc,0x00,0x02,0x01,0x00]
// VI-ERR: error: not a valid operand
// FIXME: Should error about multiple offsets
scratch_load_dword v1, v2, s1
// GFX9-ERR: error: invalid operand for instruction
// VI-ERR: error: invalid operand for instruction
scratch_load_dword v1, v2, s1 offset:32
// GFX9-ERR: error: invalid operand for instruction
// VI-ERR: error: not a valid operand
scratch_store_dword v1, v2, s1
// GFX9-ERR: error: invalid operand for instruction
// VI-ERR: error: invalid operand for instruction
scratch_store_dword v1, v2, s1 offset:32
// GFX9-ERR: error: invalid operand for instruction
// VI-ERR: error: not a valid operand
scratch_load_dword v1, off, exec_hi
// GFX9-ERR: error: invalid operand for instruction
// VI-ERR: error: invalid operand for instruction
scratch_store_dword off, v2, exec_hi
// GFX9-ERR: error: invalid operand for instruction
// VI-ERR: error: invalid operand for instruction
scratch_load_dword v1, off, exec_lo
// GFX9: scratch_load_dword v1, off, exec_lo ; encoding: [0x00,0x40,0x50,0xdc,0x00,0x00,0x7e,0x01]
// VI-ERR: instruction not supported on this GPU
scratch_store_dword off, v2, exec_lo
// GFX9: scratch_store_dword off, v2, exec_lo ; encoding: [0x00,0x40,0x70,0xdc,0x00,0x02,0x7e,0x00]
// VI-ERR: instruction not supported on this GPU
scratch_load_dword v1, off, m0
// GFX9: scratch_load_dword v1, off, m0 ; encoding: [0x00,0x40,0x50,0xdc,0x00,0x00,0x7c,0x01]
// VI-ERR: instruction not supported on this GPU
scratch_store_dword off, v2, m0
// GFX9: scratch_store_dword off, v2, m0 ; encoding: [0x00,0x40,0x70,0xdc,0x00,0x02,0x7c,0x00]
// VI-ERR: instruction not supported on this GPU
scratch_load_ubyte_d16 v1, v2, off
// GFX9: scratch_load_ubyte_d16 v1, v2, off ; encoding: [0x00,0x40,0x80,0xdc,0x02,0x00,0x7f,0x01]
// VI-ERR: instruction not supported on this GPU
scratch_load_ubyte_d16_hi v1, v2, off
// GFX9: scratch_load_ubyte_d16_hi v1, v2, off ; encoding: [0x00,0x40,0x84,0xdc,0x02,0x00,0x7f,0x01]
// VI-ERR: instruction not supported on this GPU
scratch_load_sbyte_d16 v1, v2, off
// GFX9: scratch_load_sbyte_d16 v1, v2, off ; encoding: [0x00,0x40,0x88,0xdc,0x02,0x00,0x7f,0x01]
// VI-ERR: instruction not supported on this GPU
scratch_load_sbyte_d16_hi v1, v2, off
// GFX9: scratch_load_sbyte_d16_hi v1, v2, off ; encoding: [0x00,0x40,0x8c,0xdc,0x02,0x00,0x7f,0x01]
// VI-ERR: instruction not supported on this GPU
scratch_load_short_d16 v1, v2, off
// GFX9: scratch_load_short_d16 v1, v2, off ; encoding: [0x00,0x40,0x90,0xdc,0x02,0x00,0x7f,0x01]
// VI-ERR: instruction not supported on this GPU
scratch_load_short_d16_hi v1, v2, off
// GFX9: scratch_load_short_d16_hi v1, v2, off ; encoding: [0x00,0x40,0x94,0xdc,0x02,0x00,0x7f,0x01]
// VI-ERR: instruction not supported on this GPU
scratch_store_byte_d16_hi off, v2, s1
// GFX9: scratch_store_byte_d16_hi off, v2, s1 ; encoding: [0x00,0x40,0x64,0xdc,0x00,0x02,0x01,0x00]
// VI-ERR: instruction not supported on this GPU
scratch_store_short_d16_hi off, v2, s1
// GFX9: scratch_store_short_d16_hi off, v2, s1 ; encoding: [0x00,0x40,0x6c,0xdc,0x00,0x02,0x01,0x00]
// VI-ERR: instruction not supported on this GPU

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@ -1,36 +0,0 @@
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s 2>&1 | FileCheck -check-prefix=NOSI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=hawaii -show-encoding %s 2>&1 | FileCheck -check-prefix=NOCI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s 2>&1 | FileCheck -check-prefix=NOVI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=hawaii -show-encoding %s | FileCheck -check-prefix=CI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefix=VI %s
s_mov_b64 flat_scratch, -1
// NOSI: error: not a valid operand.
// CI: s_mov_b64 flat_scratch, -1 ; encoding: [0xc1,0x04,0xe8,0xbe]
// VI: s_mov_b64 flat_scratch, -1 ; encoding: [0xc1,0x01,0xe6,0xbe]
s_mov_b32 flat_scratch_lo, -1
// NOSI: error: not a valid operand.
// CI: s_mov_b32 flat_scratch_lo, -1 ; encoding: [0xc1,0x03,0xe8,0xbe]
// VI: s_mov_b32 flat_scratch_lo, -1 ; encoding: [0xc1,0x00,0xe6,0xbe]
s_mov_b32 flat_scratch_hi, -1
// NOSI: error: not a valid operand.
// CI: s_mov_b32 flat_scratch_hi, -1 ; encoding: [0xc1,0x03,0xe9,0xbe]
// VI: s_mov_b32 flat_scratch_hi, -1 ; encoding: [0xc1,0x00,0xe7,0xbe]
s_mov_b64 flat_scratch_lo, -1
// NOSI: error: not a valid operand.
// NOCI: error: invalid operand for instruction
// NOVI: error: invalid operand for instruction
s_mov_b64 flat_scratch_hi, -1
// NOSI: error: not a valid operand.
// NOCI: error: invalid operand for instruction
// NOVI: error: invalid operand for instruction
s_mov_b32 flat_scratch, -1
// NOSI: error: not a valid operand.
// NOCI: error: invalid operand for instruction
// NOVI: error: invalid operand for instruction

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@ -1,433 +0,0 @@
// RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefix=CIVI --check-prefix=CI
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=CIVI --check-prefix=VI
// FIXME: For missing instruction the error message is:
// error: too few operands for instruction
// It should be:
// error: instruction not supported on this GPU
//
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOVI
// RUN: not llvm-mc -arch=amdgcn -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSI
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSI
//===----------------------------------------------------------------------===//
// Operands
//===----------------------------------------------------------------------===//
flat_load_dword v1, v[3:4]
// NOSI: error:
// CI: flat_load_dword v1, v[3:4] ; encoding: [0x00,0x00,0x30,0xdc,0x03,0x00,0x00,0x01]
// VI: flat_load_dword v1, v[3:4] ; encoding: [0x00,0x00,0x50,0xdc,0x03,0x00,0x00,0x01]
flat_load_dword v1, v[3:4] glc
// NOSI: error:
// CI: flat_load_dword v1, v[3:4] glc ; encoding: [0x00,0x00,0x31,0xdc,0x03,0x00,0x00,0x01]
// VI: flat_load_dword v1, v[3:4] glc ; encoding: [0x00,0x00,0x51,0xdc,0x03,0x00,0x00,0x01]
flat_load_dword v1, v[3:4] glc slc
// NOSI: error:
// CI: flat_load_dword v1, v[3:4] glc slc ; encoding: [0x00,0x00,0x33,0xdc,0x03,0x00,0x00,0x01]
// VI: flat_load_dword v1, v[3:4] glc slc ; encoding: [0x00,0x00,0x53,0xdc,0x03,0x00,0x00,0x01]
flat_store_dword v[3:4], v1
// NOSI: error:
// CIVI: flat_store_dword v[3:4], v1 ; encoding: [0x00,0x00,0x70,0xdc,0x03,0x01,0x00,0x00]
flat_store_dword v[3:4], v1 glc
// NOSI: error:
// CIVI: flat_store_dword v[3:4], v1 glc ; encoding: [0x00,0x00,0x71,0xdc,0x03,0x01,0x00,0x00]
flat_store_dword v[3:4], v1 glc slc
// NOSI: error:
// CIVI: flat_store_dword v[3:4], v1 glc slc ; encoding: [0x00,0x00,0x73,0xdc,0x03,0x01,0x00,0x00]
flat_store_dword v[3:4], v1 slc
// NOSI: error:
// CIVI: flat_store_dword v[3:4], v1 slc ; encoding: [0x00,0x00,0x72,0xdc,0x03,0x01,0x00,0x00]
// FIXME: For atomic instructions, glc must be placed immediately following
// the data regiser. These forms aren't currently supported:
// FIXME: offset:0 required
// flat_atomic_add v1, v[3:4], v5 slc glc
flat_atomic_add v1, v[3:4], v5 offset:0 glc slc
// NOSI: error:
// CI: flat_atomic_add v1, v[3:4], v5 glc slc ; encoding: [0x00,0x00,0xcb,0xdc,0x03,0x05,0x00,0x01]
// VI: flat_atomic_add v1, v[3:4], v5 glc slc ; encoding: [0x00,0x00,0x0b,0xdd,0x03,0x05,0x00,0x01]
flat_atomic_add v[3:4], v5 slc
// NOSI: error:
// CI: flat_atomic_add v[3:4], v5 slc ; encoding: [0x00,0x00,0xca,0xdc,0x03,0x05,0x00,0x00]
// VI: flat_atomic_add v[3:4], v5 slc ; encoding: [0x00,0x00,0x0a,0xdd,0x03,0x05,0x00,0x00]
//===----------------------------------------------------------------------===//
// Instructions
//===----------------------------------------------------------------------===//
flat_load_ubyte v1, v[3:4]
// NOSI: error:
// CI: flat_load_ubyte v1, v[3:4] ; encoding: [0x00,0x00,0x20,0xdc,0x03,0x00,0x00,0x01]
// VI: flat_load_ubyte v1, v[3:4] ; encoding: [0x00,0x00,0x40,0xdc,0x03,0x00,0x00,0x01]
flat_load_sbyte v1, v[3:4]
// NOSI: error:
// CI: flat_load_sbyte v1, v[3:4] ; encoding: [0x00,0x00,0x24,0xdc,0x03,0x00,0x00,0x01]
// VI: flat_load_sbyte v1, v[3:4] ; encoding: [0x00,0x00,0x44,0xdc,0x03,0x00,0x00,0x01]
flat_load_ushort v1, v[3:4]
// NOSI: error:
// CI: flat_load_ushort v1, v[3:4] ; encoding: [0x00,0x00,0x28,0xdc,0x03,0x00,0x00,0x01]
// VI: flat_load_ushort v1, v[3:4] ; encoding: [0x00,0x00,0x48,0xdc,0x03,0x00,0x00,0x01]
flat_load_sshort v1, v[3:4]
// NOSI: error:
// CI: flat_load_sshort v1, v[3:4] ; encoding: [0x00,0x00,0x2c,0xdc,0x03,0x00,0x00,0x01]
// VI: flat_load_sshort v1, v[3:4] ; encoding: [0x00,0x00,0x4c,0xdc,0x03,0x00,0x00,0x01]
flat_load_dword v1, v[3:4]
// NOSI: error:
// CI: flat_load_dword v1, v[3:4] ; encoding: [0x00,0x00,0x30,0xdc,0x03,0x00,0x00,0x01]
// VI: flat_load_dword v1, v[3:4] ; encoding: [0x00,0x00,0x50,0xdc,0x03,0x00,0x00,0x01]
flat_load_dwordx2 v[1:2], v[3:4]
// NOSI: error:
// CI: flat_load_dwordx2 v[1:2], v[3:4] ; encoding: [0x00,0x00,0x34,0xdc,0x03,0x00,0x00,0x01]
// VI: flat_load_dwordx2 v[1:2], v[3:4] ; encoding: [0x00,0x00,0x54,0xdc,0x03,0x00,0x00,0x01]
flat_load_dwordx4 v[5:8], v[3:4]
// NOSI: error:
// CI: flat_load_dwordx4 v[5:8], v[3:4] ; encoding: [0x00,0x00,0x38,0xdc,0x03,0x00,0x00,0x05]
// VI: flat_load_dwordx4 v[5:8], v[3:4] ; encoding: [0x00,0x00,0x5c,0xdc,0x03,0x00,0x00,0x05]
flat_load_dwordx3 v[5:7], v[3:4]
// NOSI: error:
// CI: flat_load_dwordx3 v[5:7], v[3:4] ; encoding: [0x00,0x00,0x3c,0xdc,0x03,0x00,0x00,0x05]
// VI: flat_load_dwordx3 v[5:7], v[3:4] ; encoding: [0x00,0x00,0x58,0xdc,0x03,0x00,0x00,0x05]
flat_store_byte v[3:4], v1
// NOSI: error:
// CIVI: flat_store_byte v[3:4], v1 ; encoding: [0x00,0x00,0x60,0xdc,0x03,0x01,0x00,0x00]
flat_store_short v[3:4], v1
// NOSI: error:
// CIVI: flat_store_short v[3:4], v1 ; encoding: [0x00,0x00,0x68,0xdc,0x03,0x01,0x00,0x00]
flat_store_dword v[3:4], v1
// NOSI: error:
// CIVI: flat_store_dword v[3:4], v1 ; encoding: [0x00,0x00,0x70,0xdc,0x03,0x01,0x00,0x00]
flat_store_dwordx2 v[3:4], v[1:2]
// NOSI: error:
// CIVI: flat_store_dwordx2 v[3:4], v[1:2] ; encoding: [0x00,0x00,0x74,0xdc,0x03,0x01,0x00,0x00]
flat_store_dwordx4 v[3:4], v[5:8]
// NOSI: error:
// CI: flat_store_dwordx4 v[3:4], v[5:8] ; encoding: [0x00,0x00,0x78,0xdc,0x03,0x05,0x00,0x00]
// VI: flat_store_dwordx4 v[3:4], v[5:8] ; encoding: [0x00,0x00,0x7c,0xdc,0x03,0x05,0x00,0x00]
flat_store_dwordx3 v[3:4], v[5:7]
// NOSI: error:
// CI: flat_store_dwordx3 v[3:4], v[5:7] ; encoding: [0x00,0x00,0x7c,0xdc,0x03,0x05,0x00,0x00]
// VI: flat_store_dwordx3 v[3:4], v[5:7] ; encoding: [0x00,0x00,0x78,0xdc,0x03,0x05,0x00,0x00]
flat_atomic_swap v[3:4], v5
// NOSI: error:
// CI: flat_atomic_swap v[3:4], v5 ; encoding: [0x00,0x00,0xc0,0xdc,0x03,0x05,0x00,0x00]
// VI: flat_atomic_swap v[3:4], v5 ; encoding: [0x00,0x00,0x00,0xdd,0x03,0x05,0x00,0x00]
flat_atomic_swap v1, v[3:4], v5 glc
// NOSI: error:
// CI: flat_atomic_swap v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0xc1,0xdc,0x03,0x05,0x00,0x01]
// VI: flat_atomic_swap v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0x01,0xdd,0x03,0x05,0x00,0x01]
flat_atomic_cmpswap v[3:4], v[5:6]
// NOSI: error:
// CI: flat_atomic_cmpswap v[3:4], v[5:6] ; encoding: [0x00,0x00,0xc4,0xdc,0x03,0x05,0x00,0x00]
// VI: flat_atomic_cmpswap v[3:4], v[5:6] ; encoding: [0x00,0x00,0x04,0xdd,0x03,0x05,0x00,0x00]
flat_atomic_cmpswap v1, v[3:4], v[5:6] glc
// NOSI: error:
// CI: flat_atomic_cmpswap v1, v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0xc5,0xdc,0x03,0x05,0x00,0x01]
// VI: flat_atomic_cmpswap v1, v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x05,0xdd,0x03,0x05,0x00,0x01]
flat_atomic_add v[3:4], v5
// NOSI: error:
// CI: flat_atomic_add v[3:4], v5 ; encoding: [0x00,0x00,0xc8,0xdc,0x03,0x05,0x00,0x00]
// VI: flat_atomic_add v[3:4], v5 ; encoding: [0x00,0x00,0x08,0xdd,0x03,0x05,0x00,0x00]
flat_atomic_add v1, v[3:4], v5 glc
// NOSI: error:
// CI: flat_atomic_add v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0xc9,0xdc,0x03,0x05,0x00,0x01]
// VI: flat_atomic_add v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0x09,0xdd,0x03,0x05,0x00,0x01]
flat_atomic_sub v[3:4], v5
// NOSI: error:
// CI: flat_atomic_sub v[3:4], v5 ; encoding: [0x00,0x00,0xcc,0xdc,0x03,0x05,0x00,0x00]
// VI: flat_atomic_sub v[3:4], v5 ; encoding: [0x00,0x00,0x0c,0xdd,0x03,0x05,0x00,0x00]
flat_atomic_sub v1, v[3:4], v5 glc
// NOSI: error:
// CI: flat_atomic_sub v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0xcd,0xdc,0x03,0x05,0x00,0x01]
// VI: flat_atomic_sub v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0x0d,0xdd,0x03,0x05,0x00,0x01]
flat_atomic_smin v[3:4], v5
// NOSI: error:
// CI: flat_atomic_smin v[3:4], v5 ; encoding: [0x00,0x00,0xd4,0xdc,0x03,0x05,0x00,0x00]
// VI: flat_atomic_smin v[3:4], v5 ; encoding: [0x00,0x00,0x10,0xdd,0x03,0x05,0x00,0x00]
flat_atomic_smin v1, v[3:4], v5 glc
// NOSI: error:
// CI: flat_atomic_smin v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0xd5,0xdc,0x03,0x05,0x00,0x01]
// VI: flat_atomic_smin v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0x11,0xdd,0x03,0x05,0x00,0x01]
flat_atomic_umin v[3:4], v5
// NOSI: error:
// CI: flat_atomic_umin v[3:4], v5 ; encoding: [0x00,0x00,0xd8,0xdc,0x03,0x05,0x00,0x00]
// VI: flat_atomic_umin v[3:4], v5 ; encoding: [0x00,0x00,0x14,0xdd,0x03,0x05,0x00,0x00]
flat_atomic_umin v1, v[3:4], v5 glc
// NOSI: error:
// CI: flat_atomic_umin v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0xd9,0xdc,0x03,0x05,0x00,0x01]
// VI: flat_atomic_umin v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0x15,0xdd,0x03,0x05,0x00,0x01]
flat_atomic_smax v[3:4], v5,
// NOSI: error:
// CI: flat_atomic_smax v[3:4], v5 ; encoding: [0x00,0x00,0xdc,0xdc,0x03,0x05,0x00,0x00]
// VI: flat_atomic_smax v[3:4], v5 ; encoding: [0x00,0x00,0x18,0xdd,0x03,0x05,0x00,0x00]
flat_atomic_smax v1, v[3:4], v5 glc
// NOSI: error:
// CI: flat_atomic_smax v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0xdd,0xdc,0x03,0x05,0x00,0x01]
// VI: flat_atomic_smax v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0x19,0xdd,0x03,0x05,0x00,0x01]
flat_atomic_umax v[3:4], v5
// NOSI: error:
// CI: flat_atomic_umax v[3:4], v5 ; encoding: [0x00,0x00,0xe0,0xdc,0x03,0x05,0x00,0x00]
// VI: flat_atomic_umax v[3:4], v5 ; encoding: [0x00,0x00,0x1c,0xdd,0x03,0x05,0x00,0x00]
flat_atomic_umax v1, v[3:4], v5 glc
// NOSI: error:
// CI: flat_atomic_umax v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0xe1,0xdc,0x03,0x05,0x00,0x01]
// VI: flat_atomic_umax v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0x1d,0xdd,0x03,0x05,0x00,0x01]
flat_atomic_and v[3:4], v5
// NOSI: error:
// CI: flat_atomic_and v[3:4], v5 ; encoding: [0x00,0x00,0xe4,0xdc,0x03,0x05,0x00,0x00]
// VI: flat_atomic_and v[3:4], v5 ; encoding: [0x00,0x00,0x20,0xdd,0x03,0x05,0x00,0x00]
flat_atomic_and v1, v[3:4], v5 glc
// NOSI: error:
// CI: flat_atomic_and v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0xe5,0xdc,0x03,0x05,0x00,0x01]
// VI: flat_atomic_and v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0x21,0xdd,0x03,0x05,0x00,0x01]
flat_atomic_or v[3:4], v5
// NOSI: error:
// CI: flat_atomic_or v[3:4], v5 ; encoding: [0x00,0x00,0xe8,0xdc,0x03,0x05,0x00,0x00]
// VI: flat_atomic_or v[3:4], v5 ; encoding: [0x00,0x00,0x24,0xdd,0x03,0x05,0x00,0x00]
flat_atomic_or v1, v[3:4], v5 glc
// NOSI: error:
// CI: flat_atomic_or v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0xe9,0xdc,0x03,0x05,0x00,0x01]
// VI: flat_atomic_or v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0x25,0xdd,0x03,0x05,0x00,0x01]
flat_atomic_xor v[3:4], v5
// NOSI: error:
// CI: flat_atomic_xor v[3:4], v5 ; encoding: [0x00,0x00,0xec,0xdc,0x03,0x05,0x00,0x00]
// VI: flat_atomic_xor v[3:4], v5 ; encoding: [0x00,0x00,0x28,0xdd,0x03,0x05,0x00,0x00]
flat_atomic_xor v1, v[3:4], v5 glc
// NOSI: error:
// CI: flat_atomic_xor v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0xed,0xdc,0x03,0x05,0x00,0x01]
// VI: flat_atomic_xor v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0x29,0xdd,0x03,0x05,0x00,0x01]
flat_atomic_inc v[3:4], v5
// NOSI: error:
// CI: flat_atomic_inc v[3:4], v5 ; encoding: [0x00,0x00,0xf0,0xdc,0x03,0x05,0x00,0x00]
// VI: flat_atomic_inc v[3:4], v5 ; encoding: [0x00,0x00,0x2c,0xdd,0x03,0x05,0x00,0x00]
flat_atomic_inc v1, v[3:4], v5 glc
// NOSI: error:
// CI: flat_atomic_inc v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0xf1,0xdc,0x03,0x05,0x00,0x01]
// VI: flat_atomic_inc v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0x2d,0xdd,0x03,0x05,0x00,0x01]
flat_atomic_dec v[3:4], v5
// NOSI: error:
// CI: flat_atomic_dec v[3:4], v5 ; encoding: [0x00,0x00,0xf4,0xdc,0x03,0x05,0x00,0x00]
// VI: flat_atomic_dec v[3:4], v5 ; encoding: [0x00,0x00,0x30,0xdd,0x03,0x05,0x00,0x00]
flat_atomic_dec v1, v[3:4], v5 glc
// NOSI: error:
// CI: flat_atomic_dec v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0xf5,0xdc,0x03,0x05,0x00,0x01]
// VI: flat_atomic_dec v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0x31,0xdd,0x03,0x05,0x00,0x01]
flat_atomic_fcmpswap v[3:4], v[5:6]
// NOSI: error:
// CI: flat_atomic_fcmpswap v[3:4], v[5:6] ; encoding: [0x00,0x00,0xf8,0xdc,0x03,0x05,0x00,0x00]
// NOVI: error:
flat_atomic_fcmpswap v1, v[3:4], v[5:6] glc
// NOSI: error:
// CI: flat_atomic_fcmpswap v1, v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0xf9,0xdc,0x03,0x05,0x00,0x01]
// NOVI: error:
flat_atomic_swap_x2 v[3:4], v[5:6]
// NOSI: error:
// CI: flat_atomic_swap_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x40,0xdd,0x03,0x05,0x00,0x00]
// VI: flat_atomic_swap_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x80,0xdd,0x03,0x05,0x00,0x00]
flat_atomic_swap_x2 v[1:2], v[3:4], v[5:6] glc
// NOSI: error:
// CI: flat_atomic_swap_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x41,0xdd,0x03,0x05,0x00,0x01]
// VI: flat_atomic_swap_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x81,0xdd,0x03,0x05,0x00,0x01]
flat_atomic_cmpswap_x2 v[3:4], v[5:8]
// NOSI: error:
// CI: flat_atomic_cmpswap_x2 v[3:4], v[5:8] ; encoding: [0x00,0x00,0x44,0xdd,0x03,0x05,0x00,0x00]
// VI: flat_atomic_cmpswap_x2 v[3:4], v[5:8] ; encoding: [0x00,0x00,0x84,0xdd,0x03,0x05,0x00,0x00]
flat_atomic_cmpswap_x2 v[1:2], v[3:4], v[5:8] glc
// NOSI: error:
// CI: flat_atomic_cmpswap_x2 v[1:2], v[3:4], v[5:8] glc ; encoding: [0x00,0x00,0x45,0xdd,0x03,0x05,0x00,0x01]
// VI: flat_atomic_cmpswap_x2 v[1:2], v[3:4], v[5:8] glc ; encoding: [0x00,0x00,0x85,0xdd,0x03,0x05,0x00,0x01]
flat_atomic_add_x2 v[3:4], v[5:6]
// NOSI: error:
// CI: flat_atomic_add_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x48,0xdd,0x03,0x05,0x00,0x00]
// VI: flat_atomic_add_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x88,0xdd,0x03,0x05,0x00,0x00]
flat_atomic_add_x2 v[1:2], v[3:4], v[5:6] glc
// NOSI: error:
// CI: flat_atomic_add_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x49,0xdd,0x03,0x05,0x00,0x01]
// VI: flat_atomic_add_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x89,0xdd,0x03,0x05,0x00,0x01]
flat_atomic_sub_x2 v[3:4], v[5:6]
// NOSI: error:
// CI: flat_atomic_sub_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x4c,0xdd,0x03,0x05,0x00,0x00]
// VI: flat_atomic_sub_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x8c,0xdd,0x03,0x05,0x00,0x00]
flat_atomic_sub_x2 v[1:2], v[3:4], v[5:6] glc
// NOSI: error:
// CI: flat_atomic_sub_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x4d,0xdd,0x03,0x05,0x00,0x01]
// VI: flat_atomic_sub_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x8d,0xdd,0x03,0x05,0x00,0x01]
flat_atomic_smin_x2 v[3:4], v[5:6]
// NOSI: error:
// CI: flat_atomic_smin_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x54,0xdd,0x03,0x05,0x00,0x00]
// VI: flat_atomic_smin_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x90,0xdd,0x03,0x05,0x00,0x00]
flat_atomic_smin_x2 v[1:2], v[3:4], v[5:6] glc
// NOSI: error:
// CI: flat_atomic_smin_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x55,0xdd,0x03,0x05,0x00,0x01]
// VI: flat_atomic_smin_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x91,0xdd,0x03,0x05,0x00,0x01]
flat_atomic_umin_x2 v[3:4], v[5:6]
// NOSI: error:
// CI: flat_atomic_umin_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x58,0xdd,0x03,0x05,0x00,0x00]
// VI: flat_atomic_umin_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x94,0xdd,0x03,0x05,0x00,0x00]
flat_atomic_umin_x2 v[1:2], v[3:4], v[5:6] glc
// NOSI: error:
// CI: flat_atomic_umin_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x59,0xdd,0x03,0x05,0x00,0x01]
// VI: flat_atomic_umin_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x95,0xdd,0x03,0x05,0x00,0x01]
flat_atomic_smax_x2 v[3:4], v[5:6]
// NOSI: error:
// CI: flat_atomic_smax_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x5c,0xdd,0x03,0x05,0x00,0x00]
// VI: flat_atomic_smax_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x98,0xdd,0x03,0x05,0x00,0x00]
flat_atomic_smax_x2 v[1:2], v[3:4], v[5:6] glc
// NOSI: error:
// CI: flat_atomic_smax_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x5d,0xdd,0x03,0x05,0x00,0x01]
// VI: flat_atomic_smax_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x99,0xdd,0x03,0x05,0x00,0x01]
flat_atomic_umax_x2 v[3:4], v[5:6]
// NOSI: error:
// CI: flat_atomic_umax_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x60,0xdd,0x03,0x05,0x00,0x00]
// VI: flat_atomic_umax_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x9c,0xdd,0x03,0x05,0x00,0x00]
flat_atomic_umax_x2 v[1:2], v[3:4], v[5:6] glc
// NOSI: error:
// CI: flat_atomic_umax_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x61,0xdd,0x03,0x05,0x00,0x01]
// VI: flat_atomic_umax_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x9d,0xdd,0x03,0x05,0x00,0x01]
flat_atomic_and_x2 v[3:4], v[5:6]
// NOSI: error:
// CI: flat_atomic_and_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x64,0xdd,0x03,0x05,0x00,0x00]
// VI: flat_atomic_and_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0xa0,0xdd,0x03,0x05,0x00,0x00]
flat_atomic_and_x2 v[1:2], v[3:4], v[5:6] glc
// NOSI: error:
// CI: flat_atomic_and_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x65,0xdd,0x03,0x05,0x00,0x01]
// VI: flat_atomic_and_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0xa1,0xdd,0x03,0x05,0x00,0x01]
flat_atomic_or_x2 v[3:4], v[5:6]
// NOSI: error:
// CI: flat_atomic_or_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x68,0xdd,0x03,0x05,0x00,0x00]
// VI: flat_atomic_or_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0xa4,0xdd,0x03,0x05,0x00,0x00]
flat_atomic_or_x2 v[1:2], v[3:4], v[5:6] glc
// NOSI: error:
// CI: flat_atomic_or_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x69,0xdd,0x03,0x05,0x00,0x01]
// VI: flat_atomic_or_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0xa5,0xdd,0x03,0x05,0x00,0x01]
flat_atomic_xor_x2 v[3:4], v[5:6]
// NOSI: error:
// CI: flat_atomic_xor_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x6c,0xdd,0x03,0x05,0x00,0x00]
// VI: flat_atomic_xor_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0xa8,0xdd,0x03,0x05,0x00,0x00]
flat_atomic_xor_x2 v[1:2], v[3:4], v[5:6] glc
// NOSI: error:
// CI: flat_atomic_xor_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x6d,0xdd,0x03,0x05,0x00,0x01]
// VI: flat_atomic_xor_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0xa9,0xdd,0x03,0x05,0x00,0x01]
flat_atomic_inc_x2 v[3:4], v[5:6]
// NOSI: error:
// CI: flat_atomic_inc_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x70,0xdd,0x03,0x05,0x00,0x00]
// VI: flat_atomic_inc_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0xac,0xdd,0x03,0x05,0x00,0x00]
flat_atomic_inc_x2 v[1:2], v[3:4], v[5:6] glc
// NOSI: error:
// CI: flat_atomic_inc_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x71,0xdd,0x03,0x05,0x00,0x01]
// VI: flat_atomic_inc_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0xad,0xdd,0x03,0x05,0x00,0x01]
flat_atomic_dec_x2 v[3:4], v[5:6]
// NOSI: error:
// CI: flat_atomic_dec_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x74,0xdd,0x03,0x05,0x00,0x00]
// VI: flat_atomic_dec_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0xb0,0xdd,0x03,0x05,0x00,0x00]
flat_atomic_dec_x2 v[1:2], v[3:4], v[5:6] glc
// NOSI: error:
// CI: flat_atomic_dec_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x75,0xdd,0x03,0x05,0x00,0x01]
// VI: flat_atomic_dec_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0xb1,0xdd,0x03,0x05,0x00,0x01]
flat_atomic_fcmpswap_x2 v[3:4], v[5:8]
// NOSI: error:
// CI: flat_atomic_fcmpswap_x2 v[3:4], v[5:8] ; encoding: [0x00,0x00,0x78,0xdd,0x03,0x05,0x00,0x00]
// NOVI: error:
flat_atomic_fcmpswap_x2 v[1:2], v[3:4], v[5:8] glc
// NOSI: error:
// CI: flat_atomic_fcmpswap_x2 v[1:2], v[3:4], v[5:8] glc ; encoding: [0x00,0x00,0x79,0xdd,0x03,0x05,0x00,0x01]
// NOVI: error:
flat_atomic_fmin_x2 v[3:4], v[5:6]
// NOSI: error:
// CI: flat_atomic_fmin_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x7c,0xdd,0x03,0x05,0x00,0x00]
// NOVI: error:
flat_atomic_fmin_x2 v[1:2], v[3:4], v[5:6] glc
// NOSI: error:
// CI: flat_atomic_fmin_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x7d,0xdd,0x03,0x05,0x00,0x01]
// NOVI: error:
flat_atomic_fmax_x2 v[3:4], v[5:6]
// NOSI: error:
// CI: flat_atomic_fmax_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x80,0xdd,0x03,0x05,0x00,0x00]
// NOVI: error:
flat_atomic_fmax_x2 v[1:2], v[3:4], v[5:6] glc
// NOSI: error:
// CI: flat_atomic_fmax_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x81,0xdd,0x03,0x05,0x00,0x01]
// NOVI: error:

1
external/llvm/test/MC/AMDGPU/gfx7_asm_all.s.REMOVED.git-id vendored
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@ -1 +0,0 @@
a4669f3ed85ec638fdccbc4ae03c6493dc5a2b21

1
external/llvm/test/MC/AMDGPU/gfx8_asm_all.s.REMOVED.git-id vendored
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@ -1 +0,0 @@
2711a4a1ce5d28289f3761cad105a44ccc8fc1c3

1
external/llvm/test/MC/AMDGPU/gfx9_asm_all.s.REMOVED.git-id vendored
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@ -1 +0,0 @@
5073badbd95a5e2c71e19bc24a29168eafcdd589

129
external/llvm/test/MC/AMDGPU/hsa-exp.s vendored
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@ -1,129 +0,0 @@
// RUN: llvm-mc -triple amdgcn--amdhsa -mcpu=kaveri -show-encoding %s | FileCheck %s --check-prefix=ASM
// RUN: llvm-mc -filetype=obj -triple amdgcn--amdhsa -mcpu=kaveri -show-encoding %s | llvm-readobj -symbols -s -sd | FileCheck %s --check-prefix=ELF
// ELF: Section {
// ELF: Name: .text
// ELF: Type: SHT_PROGBITS (0x1)
// ELF: Flags [ (0x6)
// ELF: SHF_ALLOC (0x2)
// ELF: SHF_EXECINSTR (0x4)
// ELF: SHT_NOTE
// ELF: 0000: 04000000 08000000 01000000 414D4400
// ELF: 0010: 02000000 00000000 04000000 1B000000
// ELF: 0020: 03000000 414D4400 04000700 07000000
// ELF: 0030: 00000000 00000000 414D4400 414D4447
// ELF: 0040: 50550000
// ELF: Symbol {
// ELF: Name: amd_kernel_code_t_minimal
// ELF: Type: AMDGPU_HSA_KERNEL (0xA)
// ELF: Section: .text
// ELF: }
.text
// ASM: .text
.hsa_code_object_version 2,0
// ASM: .hsa_code_object_version 2,0
.hsa_code_object_isa 7,0,0,"AMD","AMDGPU"
// ASM: .hsa_code_object_isa 7,0,0,"AMD","AMDGPU"
.amdgpu_hsa_kernel amd_kernel_code_t_minimal
.set my_is_ptr64, 1
.if my_is_ptr64 == 0
.set my_kernarg_segment_byte_size, 32
.else
.set my_kernarg_segment_byte_size, 16
.endif
.set my_sgpr, 8
amd_kernel_code_t_minimal:
.amd_kernel_code_t
amd_code_version_major = .option.machine_version_major
enable_sgpr_kernarg_segment_ptr = 1
is_ptr64 = my_is_ptr64
granulated_workitem_vgpr_count = 1
granulated_wavefront_sgpr_count = 1+(my_sgpr-1)/8
user_sgpr_count = 2
kernarg_segment_byte_size = my_kernarg_segment_byte_size
wavefront_sgpr_count = my_sgpr
// wavefront_sgpr_count = 7
; wavefront_sgpr_count = 7
// Make sure a blank line won't break anything:
// Make sure a line with whitespace won't break anything:
workitem_vgpr_count = 16
.end_amd_kernel_code_t
// ASM-LABEL: {{^}}amd_kernel_code_t_minimal:
// ASM: .amd_kernel_code_t
// ASM: amd_code_version_major = 7
// ASM: amd_code_version_minor = 1
// ASM: amd_machine_kind = 1
// ASM: amd_machine_version_major = 7
// ASM: amd_machine_version_minor = 0
// ASM: amd_machine_version_stepping = 0
// ASM: kernel_code_entry_byte_offset = 256
// ASM: kernel_code_prefetch_byte_size = 0
// ASM: max_scratch_backing_memory_byte_size = 0
// ASM: granulated_workitem_vgpr_count = 1
// ASM: granulated_wavefront_sgpr_count = 1
// ASM: priority = 0
// ASM: float_mode = 0
// ASM: priv = 0
// ASM: enable_dx10_clamp = 0
// ASM: debug_mode = 0
// ASM: enable_ieee_mode = 0
// ASM: enable_sgpr_private_segment_wave_byte_offset = 0
// ASM: user_sgpr_count = 2
// ASM: enable_sgpr_workgroup_id_x = 0
// ASM: enable_sgpr_workgroup_id_y = 0
// ASM: enable_sgpr_workgroup_id_z = 0
// ASM: enable_sgpr_workgroup_info = 0
// ASM: enable_vgpr_workitem_id = 0
// ASM: enable_exception_msb = 0
// ASM: granulated_lds_size = 0
// ASM: enable_exception = 0
// ASM: enable_sgpr_private_segment_buffer = 0
// ASM: enable_sgpr_dispatch_ptr = 0
// ASM: enable_sgpr_queue_ptr = 0
// ASM: enable_sgpr_kernarg_segment_ptr = 1
// ASM: enable_sgpr_dispatch_id = 0
// ASM: enable_sgpr_flat_scratch_init = 0
// ASM: enable_sgpr_private_segment_size = 0
// ASM: enable_sgpr_grid_workgroup_count_x = 0
// ASM: enable_sgpr_grid_workgroup_count_y = 0
// ASM: enable_sgpr_grid_workgroup_count_z = 0
// ASM: enable_ordered_append_gds = 0
// ASM: private_element_size = 0
// ASM: is_ptr64 = 1
// ASM: is_dynamic_callstack = 0
// ASM: is_debug_enabled = 0
// ASM: is_xnack_enabled = 0
// ASM: workitem_private_segment_byte_size = 0
// ASM: workgroup_group_segment_byte_size = 0
// ASM: gds_segment_byte_size = 0
// ASM: kernarg_segment_byte_size = 16
// ASM: workgroup_fbarrier_count = 0
// ASM: wavefront_sgpr_count = 8
// ASM: workitem_vgpr_count = 16
// ASM: reserved_vgpr_first = 0
// ASM: reserved_vgpr_count = 0
// ASM: reserved_sgpr_first = 0
// ASM: reserved_sgpr_count = 0
// ASM: debug_wavefront_private_segment_offset_sgpr = 0
// ASM: debug_private_segment_buffer_sgpr = 0
// ASM: kernarg_segment_alignment = 4
// ASM: group_segment_alignment = 4
// ASM: private_segment_alignment = 4
// ASM: wavefront_size = 6
// ASM: call_convention = -1
// ASM: runtime_loader_kernel_symbol = 0
// ASM: .end_amd_kernel_code_t

72
external/llvm/test/MC/AMDGPU/hsa-metadata-kernel-args.s vendored
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@ -1,72 +0,0 @@
// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx700 -show-encoding %s | FileCheck --check-prefix=CHECK --check-prefix=GFX700 %s
// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx800 -show-encoding %s | FileCheck --check-prefix=CHECK --check-prefix=GFX800 %s
// RUN: llvm-mc -triple=amdgcn-amd-amdhsa -mcpu=gfx900 -show-encoding %s | FileCheck --check-prefix=CHECK --check-prefix=GFX900 %s
// CHECK: .amd_amdgpu_hsa_metadata
// CHECK: Version: [ 1, 0 ]
// CHECK: Printf:
// CHECK: - '1:1:4:%d\n'
// CHECK: - '2:1:8:%g\n'
// CHECK: Kernels:
// CHECK: - Name: test_kernel
// CHECK: SymbolName: 'test_kernel@kd'
// CHECK: Language: OpenCL C
// CHECK: LanguageVersion: [ 2, 0 ]
// CHECK: Args:
// CHECK: - TypeName: char
// CHECK: Size: 1
// CHECK: Align: 1
// CHECK: ValueKind: ByValue
// CHECK: ValueType: I8
// CHECK: AccQual: Default
// CHECK: - Size: 8
// CHECK: Align: 8
// CHECK: ValueKind: HiddenGlobalOffsetX
// CHECK: ValueType: I64
// CHECK: - Size: 8
// CHECK: Align: 8
// CHECK: ValueKind: HiddenGlobalOffsetY
// CHECK: ValueType: I64
// CHECK: - Size: 8
// CHECK: Align: 8
// CHECK: ValueKind: HiddenGlobalOffsetZ
// CHECK: ValueType: I64
// CHECK: - Size: 8
// CHECK: Align: 8
// CHECK: ValueKind: HiddenPrintfBuffer
// CHECK: ValueType: I8
// CHECK: AddrSpaceQual: Global
// CHECK: .end_amd_amdgpu_hsa_metadata
.amd_amdgpu_hsa_metadata
Version: [ 1, 0 ]
Printf: [ '1:1:4:%d\n', '2:1:8:%g\n' ]
Kernels:
- Name: test_kernel
SymbolName: test_kernel@kd
Language: OpenCL C
LanguageVersion: [ 2, 0 ]
Args:
- TypeName: char
Size: 1
Align: 1
ValueKind: ByValue
ValueType: I8
AccQual: Default
- Size: 8
Align: 8
ValueKind: HiddenGlobalOffsetX
ValueType: I64
- Size: 8
Align: 8
ValueKind: HiddenGlobalOffsetY
ValueType: I64
- Size: 8
Align: 8
ValueKind: HiddenGlobalOffsetZ
ValueType: I64
- Size: 8
Align: 8
ValueKind: HiddenPrintfBuffer
ValueType: I8
AddrSpaceQual: Global
.end_amd_amdgpu_hsa_metadata

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