You've already forked linux-packaging-mono
Imported Upstream version 5.18.0.207
Former-commit-id: 3b152f462918d427ce18620a2cbe4f8b79650449
This commit is contained in:
Xamarin Public Jenkins (auto-signing)
parent
8e12397d70
commit
eb85e2fc17
@ -1,21 +0,0 @@
|
||||
; REQUIRES: asserts
|
||||
; The old instruction selector used to load all arguments to a call up in
|
||||
; registers, then start pushing them all onto the stack. This is bad news as
|
||||
; it makes a ton of annoying overlapping live ranges. This code should not
|
||||
; cause spills!
|
||||
;
|
||||
; RUN: llc < %s -mtriple=i686-- -stats 2>&1 | FileCheck %s
|
||||
|
||||
; CHECK-NOT: spilled
|
||||
|
||||
target datalayout = "e-p:32:32"
|
||||
|
||||
define i32 @test(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) {
|
||||
ret i32 0
|
||||
}
|
||||
|
||||
define i32 @main() {
|
||||
%X = call i32 @test( i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10 ) ; <i32> [#uses=1]
|
||||
ret i32 %X
|
||||
}
|
||||
|
||||
@ -1,12 +0,0 @@
|
||||
; RUN: llc < %s -mtriple=i686--
|
||||
|
||||
define i32 @test() {
|
||||
entry:
|
||||
ret i32 7
|
||||
Test: ; No predecessors!
|
||||
%A = call i32 @test( ) ; <i32> [#uses=1]
|
||||
%B = call i32 @test( ) ; <i32> [#uses=1]
|
||||
%C = add i32 %A, %B ; <i32> [#uses=1]
|
||||
ret i32 %C
|
||||
}
|
||||
|
||||
@ -1,4 +0,0 @@
|
||||
; RUN: llc < %s -mtriple=i686-- | FileCheck %s
|
||||
|
||||
@X = global i1 true
|
||||
; CHECK-NOT: .byte true
|
||||
@ -1,23 +0,0 @@
|
||||
; RUN: llc < %s -mtriple=i686-- | FileCheck %s
|
||||
|
||||
declare i8* @llvm.returnaddress(i32)
|
||||
|
||||
declare i8* @llvm.frameaddress(i32)
|
||||
|
||||
define i8* @test1() {
|
||||
; CHECK-LABEL: test1:
|
||||
entry:
|
||||
%X = call i8* @llvm.returnaddress( i32 0 )
|
||||
ret i8* %X
|
||||
; CHECK: movl {{.*}}(%esp), %eax
|
||||
}
|
||||
|
||||
define i8* @test2() {
|
||||
; CHECK-LABEL: test2:
|
||||
entry:
|
||||
%X = call i8* @llvm.frameaddress( i32 0 )
|
||||
ret i8* %X
|
||||
; CHECK: pushl %ebp
|
||||
; CHECK: popl %ebp
|
||||
}
|
||||
|
||||
@ -1,10 +0,0 @@
|
||||
; RUN: llc < %s | FileCheck %s
|
||||
|
||||
target triple = "i686-unknown-unknown"
|
||||
|
||||
define i32 @test(i32 %X) {
|
||||
; CHECK-LABEL: test:
|
||||
entry:
|
||||
ret i32 %X
|
||||
; CHECK-NOT: subl %esp
|
||||
}
|
||||
@ -1,12 +0,0 @@
|
||||
; RUN: llc < %s -mtriple=i686--
|
||||
define i1 @test1(double %X) {
|
||||
%V = fcmp one double %X, 0.000000e+00 ; <i1> [#uses=1]
|
||||
ret i1 %V
|
||||
}
|
||||
|
||||
define double @test2(i64 %X) {
|
||||
%V = uitofp i64 %X to double ; <double> [#uses=1]
|
||||
ret double %V
|
||||
}
|
||||
|
||||
|
||||
@ -1,9 +0,0 @@
|
||||
; RUN: llc < %s -mtriple=i686-- -mcpu=yonah | FileCheck %s
|
||||
; CHECK-NOT: {{j[lgbe]}}
|
||||
|
||||
define i32 @max(i32 %A, i32 %B) nounwind {
|
||||
%gt = icmp sgt i32 %A, %B ; <i1> [#uses=1]
|
||||
%R = select i1 %gt, i32 %A, i32 %B ; <i32> [#uses=1]
|
||||
ret i32 %R
|
||||
}
|
||||
|
||||
@ -1,7 +0,0 @@
|
||||
; RUN: llc < %s -mtriple=i686--
|
||||
|
||||
define double @test(double %d) {
|
||||
%X = select i1 false, double %d, double %d ; <double> [#uses=1]
|
||||
ret double %X
|
||||
}
|
||||
|
||||
@ -1,6 +0,0 @@
|
||||
; RUN: llc < %s -mtriple=i686--
|
||||
|
||||
define i1 @T(double %X) {
|
||||
%V = fcmp oeq double %X, %X ; <i1> [#uses=1]
|
||||
ret i1 %V
|
||||
}
|
||||
@ -1,8 +0,0 @@
|
||||
; RUN: llc < %s -mtriple=i686--
|
||||
|
||||
define i1 @test(i1 %C, i1 %D, i32 %X, i32 %Y) {
|
||||
%E = icmp slt i32 %X, %Y ; <i1> [#uses=1]
|
||||
%F = select i1 %C, i1 %D, i1 %E ; <i1> [#uses=1]
|
||||
ret i1 %F
|
||||
}
|
||||
|
||||
@ -1,20 +0,0 @@
|
||||
; This testcase was distilled from 132.ijpeg. Bsaically we cannot fold the
|
||||
; load into the sub instruction here as it induces a cycle in the dag, which
|
||||
; is invalid code (there is no correct way to order the instruction). Check
|
||||
; that we do not fold the load into the sub.
|
||||
|
||||
; RUN: llc < %s -mtriple=i686-- | FileCheck %s
|
||||
|
||||
@GLOBAL = external global i32
|
||||
|
||||
define i32 @test(i32* %P1, i32* %P2, i32* %P3) nounwind {
|
||||
; CHECK-LABEL: test:
|
||||
entry:
|
||||
%L = load i32, i32* @GLOBAL
|
||||
store i32 12, i32* %P2
|
||||
%Y = load i32, i32* %P3
|
||||
%Z = sub i32 %Y, %L
|
||||
ret i32 %Z
|
||||
; CHECK-NOT: {{sub.*GLOBAL}}
|
||||
}
|
||||
|
||||
@ -1,6 +0,0 @@
|
||||
; RUN: llc < %s -mtriple=i686-- | FileCheck %s
|
||||
|
||||
@A = external global i32 ; <i32*> [#uses=1]
|
||||
@Y = global i32* getelementptr (i32, i32* @A, i32 -1) ; <i32**> [#uses=0]
|
||||
; CHECK-NOT: 18446744073709551612
|
||||
|
||||
@ -1,38 +0,0 @@
|
||||
; RUN: llc < %s -mtriple=i686-- -mcpu=generic
|
||||
; Make sure LLC doesn't crash in the stackifier due to FP PHI nodes.
|
||||
|
||||
define void @radfg_() {
|
||||
entry:
|
||||
br i1 false, label %no_exit.16.preheader, label %loopentry.0
|
||||
loopentry.0: ; preds = %entry
|
||||
ret void
|
||||
no_exit.16.preheader: ; preds = %entry
|
||||
br label %no_exit.16
|
||||
no_exit.16: ; preds = %no_exit.16, %no_exit.16.preheader
|
||||
br i1 false, label %loopexit.16.loopexit, label %no_exit.16
|
||||
loopexit.16.loopexit: ; preds = %no_exit.16
|
||||
br label %no_exit.18
|
||||
no_exit.18: ; preds = %loopexit.20, %loopexit.16.loopexit
|
||||
%tmp.882 = fadd float 0.000000e+00, 0.000000e+00 ; <float> [#uses=2]
|
||||
br i1 false, label %loopexit.19, label %no_exit.19.preheader
|
||||
no_exit.19.preheader: ; preds = %no_exit.18
|
||||
ret void
|
||||
loopexit.19: ; preds = %no_exit.18
|
||||
br i1 false, label %loopexit.20, label %no_exit.20
|
||||
no_exit.20: ; preds = %loopexit.21, %loopexit.19
|
||||
%ai2.1122.tmp.3 = phi float [ %tmp.958, %loopexit.21 ], [ %tmp.882, %loopexit.19 ] ; <float> [#uses=1]
|
||||
%tmp.950 = fmul float %tmp.882, %ai2.1122.tmp.3 ; <float> [#uses=1]
|
||||
%tmp.951 = fsub float 0.000000e+00, %tmp.950 ; <float> [#uses=1]
|
||||
%tmp.958 = fadd float 0.000000e+00, 0.000000e+00 ; <float> [#uses=1]
|
||||
br i1 false, label %loopexit.21, label %no_exit.21.preheader
|
||||
no_exit.21.preheader: ; preds = %no_exit.20
|
||||
ret void
|
||||
loopexit.21: ; preds = %no_exit.20
|
||||
br i1 false, label %loopexit.20, label %no_exit.20
|
||||
loopexit.20: ; preds = %loopexit.21, %loopexit.19
|
||||
%ar2.1124.tmp.2 = phi float [ 0.000000e+00, %loopexit.19 ], [ %tmp.951, %loopexit.21 ] ; <float> [#uses=0]
|
||||
br i1 false, label %loopexit.18.loopexit, label %no_exit.18
|
||||
loopexit.18.loopexit: ; preds = %loopexit.20
|
||||
ret void
|
||||
}
|
||||
|
||||
@ -1,31 +0,0 @@
|
||||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
||||
; RUN: llc < %s | FileCheck %s
|
||||
;
|
||||
; Check that the isel does not fold the shld, which already folds a load
|
||||
; and has two uses, into a store.
|
||||
|
||||
target triple = "i686-unknown-unknown"
|
||||
|
||||
@A = external global i32
|
||||
|
||||
define i32 @test5(i32 %B, i8 %C) {
|
||||
; CHECK-LABEL: test5:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: movb {{[0-9]+}}(%esp), %cl
|
||||
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; CHECK-NEXT: movl A, %eax
|
||||
; CHECK-NEXT: shldl %cl, %edx, %eax
|
||||
; CHECK-NEXT: movl %eax, A
|
||||
; CHECK-NEXT: retl
|
||||
entry:
|
||||
%tmp.1 = load i32, i32* @A
|
||||
%shift.upgrd.1 = zext i8 %C to i32
|
||||
%tmp.2 = shl i32 %tmp.1, %shift.upgrd.1
|
||||
%tmp.3 = sub i8 32, %C
|
||||
%shift.upgrd.2 = zext i8 %tmp.3 to i32
|
||||
%tmp.4 = lshr i32 %B, %shift.upgrd.2
|
||||
%tmp.5 = or i32 %tmp.4, %tmp.2
|
||||
store i32 %tmp.5, i32* @A
|
||||
ret i32 %tmp.5
|
||||
}
|
||||
|
||||
@ -1,24 +0,0 @@
|
||||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
||||
; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s
|
||||
|
||||
define i32 @f(i32 %a, i32 %b) {
|
||||
; CHECK-LABEL: f:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
||||
; CHECK-NEXT: movl %ecx, %edx
|
||||
; CHECK-NEXT: imull %edx, %edx
|
||||
; CHECK-NEXT: imull %eax, %ecx
|
||||
; CHECK-NEXT: imull %eax, %eax
|
||||
; CHECK-NEXT: addl %edx, %eax
|
||||
; CHECK-NEXT: leal (%eax,%ecx,2), %eax
|
||||
; CHECK-NEXT: retl
|
||||
%tmp.2 = mul i32 %a, %a
|
||||
%tmp.5 = shl i32 %a, 1
|
||||
%tmp.6 = mul i32 %tmp.5, %b
|
||||
%tmp.10 = mul i32 %b, %b
|
||||
%tmp.7 = add i32 %tmp.10, %tmp.2
|
||||
%tmp.11 = add i32 %tmp.7, %tmp.6
|
||||
ret i32 %tmp.11
|
||||
}
|
||||
|
||||
@ -1,14 +0,0 @@
|
||||
; REQUIRES: asserts
|
||||
; RUN: llc < %s -mtriple=i686-- -stats 2>&1 | FileCheck %s
|
||||
; CHECK: 7 asm-printer
|
||||
|
||||
define i32 @g(i32 %a, i32 %b) nounwind {
|
||||
entry:
|
||||
%tmp.1 = shl i32 %b, 1
|
||||
%tmp.3 = add i32 %tmp.1, %a
|
||||
%tmp.5 = mul i32 %tmp.3, %a
|
||||
%tmp.8 = mul i32 %b, %b
|
||||
%tmp.9 = add i32 %tmp.5, %tmp.8
|
||||
ret i32 %tmp.9
|
||||
}
|
||||
|
||||
@ -1,50 +0,0 @@
|
||||
; RUN: llc < %s -mcpu=yonah
|
||||
; END.
|
||||
|
||||
target datalayout = "e-p:32:32"
|
||||
target triple = "i686-apple-darwin8.6.1"
|
||||
%struct.GLTColor4 = type { float, float, float, float }
|
||||
%struct.GLTCoord3 = type { float, float, float }
|
||||
%struct.__GLIContextRec = type { { %struct.anon, { [24 x [16 x float]], [24 x [16 x float]] }, %struct.GLTColor4, { float, float, float, float, %struct.GLTCoord3, float } }, { float, float, float, float, float, float, float, float, [4 x i32], [4 x i32], [4 x i32] } }
|
||||
%struct.__GLvertex = type { %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTCoord3, float, %struct.GLTColor4, float, float, float, i8, i8, i8, i8, [4 x float], [2 x i8*], i32, i32, [16 x %struct.GLTColor4] }
|
||||
%struct.anon = type { float, float, float, float, float, float, float, float }
|
||||
|
||||
declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8)
|
||||
|
||||
declare <8 x i16> @llvm.x86.sse2.packssdw.128(<4 x i32>, <4 x i32>)
|
||||
|
||||
declare i32 @llvm.x86.sse2.pmovmskb.128(<16 x i8>)
|
||||
|
||||
define void @gleLLVMVecInterpolateClip() {
|
||||
entry:
|
||||
br i1 false, label %cond_false, label %cond_false183
|
||||
cond_false: ; preds = %entry
|
||||
br i1 false, label %cond_false183, label %cond_true69
|
||||
cond_true69: ; preds = %cond_false
|
||||
ret void
|
||||
cond_false183: ; preds = %cond_false, %entry
|
||||
%vuizmsk.0.1 = phi <4 x i32> [ < i32 -1, i32 -1, i32 -1, i32 0 >, %entry ], [ < i32 -1, i32 0, i32 0, i32 0 >, %cond_false ] ; <<4 x i32>> [#uses=2]
|
||||
%tmp192 = extractelement <4 x i32> %vuizmsk.0.1, i32 2 ; <i32> [#uses=1]
|
||||
%tmp193 = extractelement <4 x i32> %vuizmsk.0.1, i32 3 ; <i32> [#uses=2]
|
||||
%tmp195 = insertelement <4 x i32> zeroinitializer, i32 %tmp192, i32 1 ; <<4 x i32>> [#uses=1]
|
||||
%tmp196 = insertelement <4 x i32> %tmp195, i32 %tmp193, i32 2 ; <<4 x i32>> [#uses=1]
|
||||
%tmp197 = insertelement <4 x i32> %tmp196, i32 %tmp193, i32 3 ; <<4 x i32>> [#uses=1]
|
||||
%tmp336 = and <4 x i32> zeroinitializer, %tmp197 ; <<4 x i32>> [#uses=1]
|
||||
%tmp337 = bitcast <4 x i32> %tmp336 to <4 x float> ; <<4 x float>> [#uses=1]
|
||||
%tmp378 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp337, <4 x float> zeroinitializer, i8 1 ) ; <<4 x float>> [#uses=1]
|
||||
%tmp379 = bitcast <4 x float> %tmp378 to <4 x i32> ; <<4 x i32>> [#uses=1]
|
||||
%tmp388 = tail call <8 x i16> @llvm.x86.sse2.packssdw.128( <4 x i32> zeroinitializer, <4 x i32> %tmp379 ) ; <<4 x i32>> [#uses=1]
|
||||
%tmp392 = bitcast <8 x i16> %tmp388 to <8 x i16> ; <<8 x i16>> [#uses=1]
|
||||
%tmp399 = extractelement <8 x i16> %tmp392, i32 7 ; <i16> [#uses=1]
|
||||
%tmp423 = insertelement <8 x i16> zeroinitializer, i16 %tmp399, i32 7 ; <<8 x i16>> [#uses=1]
|
||||
%tmp427 = bitcast <8 x i16> %tmp423 to <16 x i8> ; <<16 x i8>> [#uses=1]
|
||||
%tmp428 = tail call i32 @llvm.x86.sse2.pmovmskb.128( <16 x i8> %tmp427 ) ; <i32> [#uses=1]
|
||||
%tmp432 = trunc i32 %tmp428 to i8 ; <i8> [#uses=1]
|
||||
%tmp = and i8 %tmp432, 42 ; <i8> [#uses=1]
|
||||
%tmp436 = bitcast i8 %tmp to i8 ; <i8> [#uses=1]
|
||||
%tmp446 = zext i8 %tmp436 to i32 ; <i32> [#uses=1]
|
||||
%tmp447 = shl i32 %tmp446, 24 ; <i32> [#uses=1]
|
||||
%tmp449 = or i32 0, %tmp447 ; <i32> [#uses=1]
|
||||
store i32 %tmp449, i32* null
|
||||
ret void
|
||||
}
|
||||
@ -1,29 +0,0 @@
|
||||
; RUN: llc < %s -mtriple=i686-apple-darwin8 -relocation-model=static > %t
|
||||
; RUN: grep "movl _last" %t | count 1
|
||||
; RUN: grep "cmpl.*_last" %t | count 1
|
||||
|
||||
@block = external global i8* ; <i8**> [#uses=1]
|
||||
@last = external global i32 ; <i32*> [#uses=3]
|
||||
|
||||
define i1 @loadAndRLEsource_no_exit_2E_1_label_2E_0(i32 %tmp.21.reload, i32 %tmp.8) {
|
||||
newFuncRoot:
|
||||
br label %label.0
|
||||
label.0.no_exit.1_crit_edge.exitStub: ; preds = %label.0
|
||||
ret i1 true
|
||||
codeRepl5.exitStub: ; preds = %label.0
|
||||
ret i1 false
|
||||
label.0: ; preds = %newFuncRoot
|
||||
%tmp.35 = load i32, i32* @last ; <i32> [#uses=1]
|
||||
%inc.1 = add i32 %tmp.35, 1 ; <i32> [#uses=2]
|
||||
store i32 %inc.1, i32* @last
|
||||
%tmp.36 = load i8*, i8** @block ; <i8*> [#uses=1]
|
||||
%tmp.38 = getelementptr i8, i8* %tmp.36, i32 %inc.1 ; <i8*> [#uses=1]
|
||||
%tmp.40 = trunc i32 %tmp.21.reload to i8 ; <i8> [#uses=1]
|
||||
store i8 %tmp.40, i8* %tmp.38
|
||||
%tmp.910 = load i32, i32* @last ; <i32> [#uses=1]
|
||||
%tmp.1111 = icmp slt i32 %tmp.910, %tmp.8 ; <i1> [#uses=1]
|
||||
%tmp.1412 = icmp ne i32 %tmp.21.reload, 257 ; <i1> [#uses=1]
|
||||
%tmp.1613 = and i1 %tmp.1111, %tmp.1412 ; <i1> [#uses=1]
|
||||
br i1 %tmp.1613, label %label.0.no_exit.1_crit_edge.exitStub, label %codeRepl5.exitStub
|
||||
}
|
||||
|
||||
@ -1,77 +0,0 @@
|
||||
; REQUIRES: asserts
|
||||
; RUN: llc < %s -mtriple=i686-- -mcpu=yonah -stats 2>&1 | \
|
||||
; RUN: not grep "Number of register spills"
|
||||
; END.
|
||||
|
||||
|
||||
define i32 @foo(<4 x float>* %a, <4 x float>* %b, <4 x float>* %c, <4 x float>* %d) {
|
||||
%tmp44 = load <4 x float>, <4 x float>* %a ; <<4 x float>> [#uses=9]
|
||||
%tmp46 = load <4 x float>, <4 x float>* %b ; <<4 x float>> [#uses=1]
|
||||
%tmp48 = load <4 x float>, <4 x float>* %c ; <<4 x float>> [#uses=1]
|
||||
%tmp50 = load <4 x float>, <4 x float>* %d ; <<4 x float>> [#uses=1]
|
||||
%tmp51 = bitcast <4 x float> %tmp44 to <4 x i32> ; <<4 x i32>> [#uses=1]
|
||||
%tmp = shufflevector <4 x i32> %tmp51, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2]
|
||||
%tmp52 = bitcast <4 x i32> %tmp to <4 x float> ; <<4 x float>> [#uses=1]
|
||||
%tmp60 = xor <4 x i32> %tmp, < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 > ; <<4 x i32>> [#uses=1]
|
||||
%tmp61 = bitcast <4 x i32> %tmp60 to <4 x float> ; <<4 x float>> [#uses=1]
|
||||
%tmp74 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp52, <4 x float> %tmp44, i8 1 ) ; <<4 x float>> [#uses=1]
|
||||
%tmp75 = bitcast <4 x float> %tmp74 to <4 x i32> ; <<4 x i32>> [#uses=1]
|
||||
%tmp88 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp61, i8 1 ) ; <<4 x float>> [#uses=1]
|
||||
%tmp89 = bitcast <4 x float> %tmp88 to <4 x i32> ; <<4 x i32>> [#uses=1]
|
||||
%tmp98 = tail call <8 x i16> @llvm.x86.sse2.packssdw.128( <4 x i32> %tmp75, <4 x i32> %tmp89 ) ; <<4 x i32>> [#uses=1]
|
||||
%tmp102 = bitcast <8 x i16> %tmp98 to <8 x i16> ; <<8 x i16>> [#uses=1]
|
||||
%tmp.upgrd.1 = shufflevector <8 x i16> %tmp102, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1]
|
||||
%tmp105 = shufflevector <8 x i16> %tmp.upgrd.1, <8 x i16> undef, <8 x i32> < i32 2, i32 1, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1]
|
||||
%tmp105.upgrd.2 = bitcast <8 x i16> %tmp105 to <4 x float> ; <<4 x float>> [#uses=1]
|
||||
store <4 x float> %tmp105.upgrd.2, <4 x float>* %a
|
||||
%tmp108 = bitcast <4 x float> %tmp46 to <4 x i32> ; <<4 x i32>> [#uses=1]
|
||||
%tmp109 = shufflevector <4 x i32> %tmp108, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2]
|
||||
%tmp109.upgrd.3 = bitcast <4 x i32> %tmp109 to <4 x float> ; <<4 x float>> [#uses=1]
|
||||
%tmp119 = xor <4 x i32> %tmp109, < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 > ; <<4 x i32>> [#uses=1]
|
||||
%tmp120 = bitcast <4 x i32> %tmp119 to <4 x float> ; <<4 x float>> [#uses=1]
|
||||
%tmp133 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp109.upgrd.3, <4 x float> %tmp44, i8 1 ) ; <<4 x float>> [#uses=1]
|
||||
%tmp134 = bitcast <4 x float> %tmp133 to <4 x i32> ; <<4 x i32>> [#uses=1]
|
||||
%tmp147 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp120, i8 1 ) ; <<4 x float>> [#uses=1]
|
||||
%tmp148 = bitcast <4 x float> %tmp147 to <4 x i32> ; <<4 x i32>> [#uses=1]
|
||||
%tmp159 = tail call <8 x i16> @llvm.x86.sse2.packssdw.128( <4 x i32> %tmp134, <4 x i32> %tmp148 ) ; <<4 x i32>> [#uses=1]
|
||||
%tmp163 = bitcast <8 x i16> %tmp159 to <8 x i16> ; <<8 x i16>> [#uses=1]
|
||||
%tmp164 = shufflevector <8 x i16> %tmp163, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1]
|
||||
%tmp166 = shufflevector <8 x i16> %tmp164, <8 x i16> undef, <8 x i32> < i32 2, i32 1, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1]
|
||||
%tmp166.upgrd.4 = bitcast <8 x i16> %tmp166 to <4 x float> ; <<4 x float>> [#uses=1]
|
||||
store <4 x float> %tmp166.upgrd.4, <4 x float>* %b
|
||||
%tmp169 = bitcast <4 x float> %tmp48 to <4 x i32> ; <<4 x i32>> [#uses=1]
|
||||
%tmp170 = shufflevector <4 x i32> %tmp169, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2]
|
||||
%tmp170.upgrd.5 = bitcast <4 x i32> %tmp170 to <4 x float> ; <<4 x float>> [#uses=1]
|
||||
%tmp180 = xor <4 x i32> %tmp170, < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 > ; <<4 x i32>> [#uses=1]
|
||||
%tmp181 = bitcast <4 x i32> %tmp180 to <4 x float> ; <<4 x float>> [#uses=1]
|
||||
%tmp194 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp170.upgrd.5, <4 x float> %tmp44, i8 1 ) ; <<4 x float>> [#uses=1]
|
||||
%tmp195 = bitcast <4 x float> %tmp194 to <4 x i32> ; <<4 x i32>> [#uses=1]
|
||||
%tmp208 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp181, i8 1 ) ; <<4 x float>> [#uses=1]
|
||||
%tmp209 = bitcast <4 x float> %tmp208 to <4 x i32> ; <<4 x i32>> [#uses=1]
|
||||
%tmp220 = tail call <8 x i16> @llvm.x86.sse2.packssdw.128( <4 x i32> %tmp195, <4 x i32> %tmp209 ) ; <<4 x i32>> [#uses=1]
|
||||
%tmp224 = bitcast <8 x i16> %tmp220 to <8 x i16> ; <<8 x i16>> [#uses=1]
|
||||
%tmp225 = shufflevector <8 x i16> %tmp224, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1]
|
||||
%tmp227 = shufflevector <8 x i16> %tmp225, <8 x i16> undef, <8 x i32> < i32 2, i32 1, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1]
|
||||
%tmp227.upgrd.6 = bitcast <8 x i16> %tmp227 to <4 x float> ; <<4 x float>> [#uses=1]
|
||||
store <4 x float> %tmp227.upgrd.6, <4 x float>* %c
|
||||
%tmp230 = bitcast <4 x float> %tmp50 to <4 x i32> ; <<4 x i32>> [#uses=1]
|
||||
%tmp231 = shufflevector <4 x i32> %tmp230, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2]
|
||||
%tmp231.upgrd.7 = bitcast <4 x i32> %tmp231 to <4 x float> ; <<4 x float>> [#uses=1]
|
||||
%tmp241 = xor <4 x i32> %tmp231, < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 > ; <<4 x i32>> [#uses=1]
|
||||
%tmp242 = bitcast <4 x i32> %tmp241 to <4 x float> ; <<4 x float>> [#uses=1]
|
||||
%tmp255 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp231.upgrd.7, <4 x float> %tmp44, i8 1 ) ; <<4 x float>> [#uses=1]
|
||||
%tmp256 = bitcast <4 x float> %tmp255 to <4 x i32> ; <<4 x i32>> [#uses=1]
|
||||
%tmp269 = tail call <4 x float> @llvm.x86.sse.cmp.ps( <4 x float> %tmp44, <4 x float> %tmp242, i8 1 ) ; <<4 x float>> [#uses=1]
|
||||
%tmp270 = bitcast <4 x float> %tmp269 to <4 x i32> ; <<4 x i32>> [#uses=1]
|
||||
%tmp281 = tail call <8 x i16> @llvm.x86.sse2.packssdw.128( <4 x i32> %tmp256, <4 x i32> %tmp270 ) ; <<4 x i32>> [#uses=1]
|
||||
%tmp285 = bitcast <8 x i16> %tmp281 to <8 x i16> ; <<8 x i16>> [#uses=1]
|
||||
%tmp286 = shufflevector <8 x i16> %tmp285, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1]
|
||||
%tmp288 = shufflevector <8 x i16> %tmp286, <8 x i16> undef, <8 x i32> < i32 2, i32 1, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1]
|
||||
%tmp288.upgrd.8 = bitcast <8 x i16> %tmp288 to <4 x float> ; <<4 x float>> [#uses=1]
|
||||
store <4 x float> %tmp288.upgrd.8, <4 x float>* %d
|
||||
ret i32 0
|
||||
}
|
||||
|
||||
declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8)
|
||||
|
||||
declare <8 x i16> @llvm.x86.sse2.packssdw.128(<4 x i32>, <4 x i32>)
|
||||
@ -1,26 +0,0 @@
|
||||
; REQUIRES: asserts
|
||||
; RUN: llc < %s -mtriple=i686-unknown-linux -relocation-model=static -stats 2>&1 | \
|
||||
; RUN: grep asm-printer | grep 14
|
||||
;
|
||||
; It's possible to schedule this in 14 instructions by avoiding
|
||||
; callee-save registers, but the scheduler isn't currently that
|
||||
; conervative with registers.
|
||||
@size20 = external global i32 ; <i32*> [#uses=1]
|
||||
@in5 = external global i8* ; <i8**> [#uses=1]
|
||||
|
||||
define i32 @compare(i8* %a, i8* %b) nounwind {
|
||||
%tmp = bitcast i8* %a to i32* ; <i32*> [#uses=1]
|
||||
%tmp1 = bitcast i8* %b to i32* ; <i32*> [#uses=1]
|
||||
%tmp.upgrd.1 = load i32, i32* @size20 ; <i32> [#uses=1]
|
||||
%tmp.upgrd.2 = load i8*, i8** @in5 ; <i8*> [#uses=2]
|
||||
%tmp3 = load i32, i32* %tmp1 ; <i32> [#uses=1]
|
||||
%gep.upgrd.3 = zext i32 %tmp3 to i64 ; <i64> [#uses=1]
|
||||
%tmp4 = getelementptr i8, i8* %tmp.upgrd.2, i64 %gep.upgrd.3 ; <i8*> [#uses=2]
|
||||
%tmp7 = load i32, i32* %tmp ; <i32> [#uses=1]
|
||||
%gep.upgrd.4 = zext i32 %tmp7 to i64 ; <i64> [#uses=1]
|
||||
%tmp8 = getelementptr i8, i8* %tmp.upgrd.2, i64 %gep.upgrd.4 ; <i8*> [#uses=2]
|
||||
%tmp.upgrd.5 = tail call i32 @memcmp( i8* %tmp8, i8* %tmp4, i32 %tmp.upgrd.1 ) ; <i32> [#uses=1]
|
||||
ret i32 %tmp.upgrd.5
|
||||
}
|
||||
|
||||
declare i32 @memcmp(i8*, i8*, i32)
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user