Imported Upstream version 5.18.0.207

Former-commit-id: 3b152f462918d427ce18620a2cbe4f8b79650449

external/llvm/test/CodeGen/PowerPC/testComparesllgtus.ll

@@ -1,127 +0,0 @@
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
-; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
-; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-
-@glob = common local_unnamed_addr global i16 0, align 2
-
-; Function Attrs: norecurse nounwind readnone
-define i64 @test_llgtus(i16 zeroext %a, i16 zeroext %b) {
-; CHECK-LABEL: test_llgtus:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    sub [[REG:r[0-9]+]], r4, r3
-; CHECK-NEXT:    rldicl r3, [[REG]], 1, 63
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp ugt i16 %a, %b
-  %conv3 = zext i1 %cmp to i64
-  ret i64 %conv3
-}
-
-; Function Attrs: norecurse nounwind readnone
-define i64 @test_llgtus_sext(i16 zeroext %a, i16 zeroext %b) {
-; CHECK-LABEL: test_llgtus_sext:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    sub [[REG:r[0-9]+]], r4, r3
-; CHECK-NEXT:    sradi r3, [[REG]], 63
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp ugt i16 %a, %b
-  %conv3 = sext i1 %cmp to i64
-  ret i64 %conv3
-}
-
-; Function Attrs: norecurse nounwind readnone
-define i64 @test_llgtus_z(i16 zeroext %a) {
-; CHECK-LABEL: test_llgtus_z:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    cntlzw r3, r3
-; CHECK-NEXT:    srwi r3, r3, 5
-; CHECK-NEXT:    xori r3, r3, 1
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp ne i16 %a, 0
-  %conv2 = zext i1 %cmp to i64
-  ret i64 %conv2
-}
-
-; Function Attrs: norecurse nounwind readnone
-define i64 @test_llgtus_sext_z(i16 zeroext %a) {
-; CHECK-LABEL: test_llgtus_sext_z:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    cntlzw r3, r3
-; CHECK-NEXT:    srwi r3, r3, 5
-; CHECK-NEXT:    xori r3, r3, 1
-; CHECK-NEXT:    neg r3, r3
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp ne i16 %a, 0
-  %conv2 = sext i1 %cmp to i64
-  ret i64 %conv2
-}
-
-; Function Attrs: norecurse nounwind
-define void @test_llgtus_store(i16 zeroext %a, i16 zeroext %b) {
-; CHECK-LABEL: test_llgtus_store:
-; CHECK:       # %bb.0: # %entry
-; CHECK:         sub [[REG:r[0-9]+]], r4, r3
-; CHECK:         rldicl {{r[0-9]+}}, [[REG]], 1, 63
-entry:
-  %cmp = icmp ugt i16 %a, %b
-  %conv3 = zext i1 %cmp to i16
-  store i16 %conv3, i16* @glob, align 2
-  ret void
-}
-
-; Function Attrs: norecurse nounwind
-define void @test_llgtus_sext_store(i16 zeroext %a, i16 zeroext %b) {
-; CHECK-LABEL: test_llgtus_sext_store:
-; CHECK:       # %bb.0: # %entry
-; CHECK:         sub [[REG:r[0-9]+]], r4, r3
-; CHECK:         sradi {{r[0-9]+}}, [[REG]], 63
-entry:
-  %cmp = icmp ugt i16 %a, %b
-  %conv3 = sext i1 %cmp to i16
-  store i16 %conv3, i16* @glob, align 2
-  ret void
-}
-
-; Function Attrs: norecurse nounwind
-define void @test_llgtus_z_store(i16 zeroext %a) {
-; CHECK-LABEL: test_llgtus_z_store:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    addis r4, r2, .LC0@toc@ha
-; CHECK-NEXT:    cntlzw r3, r3
-; CHECK-NEXT:    ld r4, .LC0@toc@l(r4)
-; CHECK-NEXT:    srwi r3, r3, 5
-; CHECK-NEXT:    xori r3, r3, 1
-; CHECK-NEXT:    sth r3, 0(r4)
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp ne i16 %a, 0
-  %conv2 = zext i1 %cmp to i16
-  store i16 %conv2, i16* @glob, align 2
-  ret void
-}
-
-; Function Attrs: norecurse nounwind
-define void @test_llgtus_sext_z_store(i16 zeroext %a) {
-; CHECK-LABEL: test_llgtus_sext_z_store:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    addis r4, r2, .LC0@toc@ha
-; CHECK-NEXT:    cntlzw r3, r3
-; CHECK-NEXT:    srwi r3, r3, 5
-; CHECK-NEXT:    ld r4, .LC0@toc@l(r4)
-; CHECK-NEXT:    xori r3, r3, 1
-; CHECK-NEXT:    neg r3, r3
-; CHECK-NEXT:    sth r3, 0(r4)
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp ne i16 %a, 0
-  %conv2 = sext i1 %cmp to i16
-  store i16 %conv2, i16* @glob, align 2
-  ret void
-}
-