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Imported Upstream version 5.18.0.207

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Former-commit-id: 3b152f462918d427ce18620a2cbe4f8b79650449
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Xamarin Public Jenkins (auto-signing)
2018-11-17 08:23:10 +00:00
parent 8e12397d70
commit eb85e2fc17
28480 changed files with 72 additions and 3866936 deletions
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41
external/llvm/test/CodeGen/PowerPC/pr24636.ll vendored
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@ -1,41 +0,0 @@
; RUN: llc -verify-machineinstrs < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-n32:64"
target triple = "powerpc64le-unknown-linux-gnu"
@c = external global i32, align 4
@b = external global [1 x i32], align 4
; Function Attrs: nounwind
define void @fn2() #0 align 4 {
br i1 undef, label %.lr.ph, label %4
; We used to crash because a bad DAGCombine was creating i32-typed SETCC nodes,
; even when crbits are enabled.
; CHECK-LABEL: @fn2
; CHECK: blr
.lr.ph: ; preds = %0
br i1 undef, label %.lr.ph.split, label %.preheader
.preheader: ; preds = %.preheader, %.lr.ph
br i1 undef, label %.lr.ph.split, label %.preheader
.lr.ph.split: ; preds = %.preheader, %.lr.ph
br i1 undef, label %._crit_edge, label %.lr.ph.split.split
.lr.ph.split.split: ; preds = %.lr.ph.split.split, %.lr.ph.split
%1 = phi i32 [ %2, %.lr.ph.split.split ], [ undef, %.lr.ph.split ]
%2 = and i32 %1, and (i32 and (i32 and (i32 and (i32 and (i32 and (i32 and (i32 zext (i1 select (i1 icmp eq ([1 x i32]* bitcast (i32* @c to [1 x i32]*), [1 x i32]* @b), i1 true, i1 false) to i32), i32 zext (i1 select (i1 icmp eq ([1 x i32]* bitcast (i32* @c to [1 x i32]*), [1 x i32]* @b), i1 true, i1 false) to i32)), i32 zext (i1 select (i1 icmp eq ([1 x i32]* bitcast (i32* @c to [1 x i32]*), [1 x i32]* @b), i1 true, i1 false) to i32)), i32 zext (i1 select (i1 icmp eq ([1 x i32]* bitcast (i32* @c to [1 x i32]*), [1 x i32]* @b), i1 true, i1 false) to i32)), i32 zext (i1 select (i1 icmp eq ([1 x i32]* bitcast (i32* @c to [1 x i32]*), [1 x i32]* @b), i1 true, i1 false) to i32)), i32 zext (i1 select (i1 icmp eq ([1 x i32]* bitcast (i32* @c to [1 x i32]*), [1 x i32]* @b), i1 true, i1 false) to i32)), i32 zext (i1 select (i1 icmp eq ([1 x i32]* bitcast (i32* @c to [1 x i32]*), [1 x i32]* @b), i1 true, i1 false) to i32)), i32 zext (i1 select (i1 icmp eq ([1 x i32]* bitcast (i32* @c to [1 x i32]*), [1 x i32]* @b), i1 true, i1 false) to i32))
%3 = icmp slt i32 undef, 4
br i1 %3, label %.lr.ph.split.split, label %._crit_edge
._crit_edge: ; preds = %.lr.ph.split.split, %.lr.ph.split
%.lcssa = phi i32 [ undef, %.lr.ph.split ], [ %2, %.lr.ph.split.split ]
br label %4
; <label>:4 ; preds = %._crit_edge, %0
ret void
}
attributes #0 = { nounwind "target-cpu"="ppc64le" }