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Imported Upstream version 5.18.0.207

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Former-commit-id: 3b152f462918d427ce18620a2cbe4f8b79650449
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Xamarin Public Jenkins (auto-signing)
2018-11-17 08:23:10 +00:00
parent 8e12397d70
commit eb85e2fc17
28480 changed files with 72 additions and 3866936 deletions
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29
external/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.dcache.wb.ll vendored
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@@ -1,29 +0,0 @@
; RUN: llc -march=amdgcn -mcpu=fiji -show-mc-encoding < %s | FileCheck -check-prefix=VI %s
declare void @llvm.amdgcn.s.dcache.wb() #0
declare void @llvm.amdgcn.s.waitcnt(i32) #0
; VI-LABEL: {{^}}test_s_dcache_wb:
; VI-NEXT: ; %bb.0:
; VI-NEXT: s_dcache_wb ; encoding: [0x00,0x00,0x84,0xc0,0x00,0x00,0x00,0x00]
; VI-NEXT: s_endpgm
define amdgpu_kernel void @test_s_dcache_wb() #0 {
call void @llvm.amdgcn.s.dcache.wb()
ret void
}
; VI-LABEL: {{^}}test_s_dcache_wb_insert_wait:
; VI-NEXT: ; %bb.0:
; VI-NEXT: s_dcache_wb
; VI: s_waitcnt lgkmcnt(0) ; encoding
define amdgpu_kernel void @test_s_dcache_wb_insert_wait() #0 {
call void @llvm.amdgcn.s.dcache.wb()
call void @llvm.amdgcn.s.waitcnt(i32 127)
br label %end
end:
store volatile i32 3, i32 addrspace(1)* undef
ret void
}
attributes #0 = { nounwind }