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Imported Upstream version 5.18.0.207
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//===-- DWARFExpression.cpp -----------------------------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/DebugInfo/DWARF/DWARFExpression.h"
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#include "llvm/BinaryFormat/Dwarf.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/Support/Format.h"
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#include <cassert>
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#include <cstdint>
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#include <vector>
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using namespace llvm;
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using namespace dwarf;
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namespace llvm {
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typedef std::vector<DWARFExpression::Operation::Description> DescVector;
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static DescVector getDescriptions() {
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DescVector Descriptions;
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typedef DWARFExpression::Operation Op;
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typedef Op::Description Desc;
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Descriptions.resize(0xff);
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Descriptions[DW_OP_addr] = Desc(Op::Dwarf2, Op::SizeAddr);
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Descriptions[DW_OP_deref] = Desc(Op::Dwarf2);
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Descriptions[DW_OP_const1u] = Desc(Op::Dwarf2, Op::Size1);
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Descriptions[DW_OP_const1s] = Desc(Op::Dwarf2, Op::SignedSize1);
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Descriptions[DW_OP_const2u] = Desc(Op::Dwarf2, Op::Size2);
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Descriptions[DW_OP_const2s] = Desc(Op::Dwarf2, Op::SignedSize2);
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Descriptions[DW_OP_const4u] = Desc(Op::Dwarf2, Op::Size4);
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Descriptions[DW_OP_const4s] = Desc(Op::Dwarf2, Op::SignedSize4);
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Descriptions[DW_OP_const8u] = Desc(Op::Dwarf2, Op::Size8);
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Descriptions[DW_OP_const8s] = Desc(Op::Dwarf2, Op::SignedSize8);
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Descriptions[DW_OP_constu] = Desc(Op::Dwarf2, Op::SizeLEB);
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Descriptions[DW_OP_consts] = Desc(Op::Dwarf2, Op::SignedSizeLEB);
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Descriptions[DW_OP_dup] = Desc(Op::Dwarf2);
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Descriptions[DW_OP_drop] = Desc(Op::Dwarf2);
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Descriptions[DW_OP_over] = Desc(Op::Dwarf2);
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Descriptions[DW_OP_pick] = Desc(Op::Dwarf2, Op::Size1);
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Descriptions[DW_OP_swap] = Desc(Op::Dwarf2);
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Descriptions[DW_OP_rot] = Desc(Op::Dwarf2);
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Descriptions[DW_OP_xderef] = Desc(Op::Dwarf2);
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Descriptions[DW_OP_abs] = Desc(Op::Dwarf2);
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Descriptions[DW_OP_and] = Desc(Op::Dwarf2);
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Descriptions[DW_OP_div] = Desc(Op::Dwarf2);
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Descriptions[DW_OP_minus] = Desc(Op::Dwarf2);
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Descriptions[DW_OP_mod] = Desc(Op::Dwarf2);
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Descriptions[DW_OP_mul] = Desc(Op::Dwarf2);
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Descriptions[DW_OP_neg] = Desc(Op::Dwarf2);
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Descriptions[DW_OP_not] = Desc(Op::Dwarf2);
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Descriptions[DW_OP_or] = Desc(Op::Dwarf2);
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Descriptions[DW_OP_plus] = Desc(Op::Dwarf2);
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Descriptions[DW_OP_plus_uconst] = Desc(Op::Dwarf2, Op::SizeLEB);
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Descriptions[DW_OP_shl] = Desc(Op::Dwarf2);
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Descriptions[DW_OP_shr] = Desc(Op::Dwarf2);
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Descriptions[DW_OP_shra] = Desc(Op::Dwarf2);
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Descriptions[DW_OP_xor] = Desc(Op::Dwarf2);
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Descriptions[DW_OP_skip] = Desc(Op::Dwarf2, Op::SignedSize2);
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Descriptions[DW_OP_bra] = Desc(Op::Dwarf2, Op::SignedSize2);
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Descriptions[DW_OP_eq] = Desc(Op::Dwarf2);
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Descriptions[DW_OP_ge] = Desc(Op::Dwarf2);
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Descriptions[DW_OP_gt] = Desc(Op::Dwarf2);
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Descriptions[DW_OP_le] = Desc(Op::Dwarf2);
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Descriptions[DW_OP_lt] = Desc(Op::Dwarf2);
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Descriptions[DW_OP_ne] = Desc(Op::Dwarf2);
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for (uint16_t LA = DW_OP_lit0; LA <= DW_OP_lit31; ++LA)
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Descriptions[LA] = Desc(Op::Dwarf2);
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for (uint16_t LA = DW_OP_reg0; LA <= DW_OP_reg31; ++LA)
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Descriptions[LA] = Desc(Op::Dwarf2);
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for (uint16_t LA = DW_OP_breg0; LA <= DW_OP_breg31; ++LA)
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Descriptions[LA] = Desc(Op::Dwarf2, Op::SignedSizeLEB);
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Descriptions[DW_OP_regx] = Desc(Op::Dwarf2, Op::SizeLEB);
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Descriptions[DW_OP_fbreg] = Desc(Op::Dwarf2, Op::SignedSizeLEB);
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Descriptions[DW_OP_bregx] = Desc(Op::Dwarf2, Op::SizeLEB, Op::SignedSizeLEB);
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Descriptions[DW_OP_piece] = Desc(Op::Dwarf2, Op::SizeLEB);
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Descriptions[DW_OP_deref_size] = Desc(Op::Dwarf2, Op::Size1);
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Descriptions[DW_OP_xderef_size] = Desc(Op::Dwarf2, Op::Size1);
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Descriptions[DW_OP_nop] = Desc(Op::Dwarf2);
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Descriptions[DW_OP_push_object_address] = Desc(Op::Dwarf3);
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Descriptions[DW_OP_call2] = Desc(Op::Dwarf3, Op::Size2);
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Descriptions[DW_OP_call4] = Desc(Op::Dwarf3, Op::Size4);
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Descriptions[DW_OP_call_ref] = Desc(Op::Dwarf3, Op::SizeRefAddr);
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Descriptions[DW_OP_form_tls_address] = Desc(Op::Dwarf3);
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Descriptions[DW_OP_call_frame_cfa] = Desc(Op::Dwarf3);
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Descriptions[DW_OP_bit_piece] = Desc(Op::Dwarf3, Op::SizeLEB, Op::SizeLEB);
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Descriptions[DW_OP_implicit_value] =
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Desc(Op::Dwarf3, Op::SizeLEB, Op::SizeBlock);
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Descriptions[DW_OP_stack_value] = Desc(Op::Dwarf3);
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Descriptions[DW_OP_GNU_push_tls_address] = Desc(Op::Dwarf3);
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Descriptions[DW_OP_GNU_addr_index] = Desc(Op::Dwarf4, Op::SizeLEB);
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Descriptions[DW_OP_GNU_const_index] = Desc(Op::Dwarf4, Op::SizeLEB);
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return Descriptions;
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}
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static DWARFExpression::Operation::Description getOpDesc(unsigned OpCode) {
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// FIXME: Make this constexpr once all compilers are smart enough to do it.
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static DescVector Descriptions = getDescriptions();
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// Handle possible corrupted or unsupported operation.
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if (OpCode >= Descriptions.size())
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return {};
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return Descriptions[OpCode];
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}
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static uint8_t getRefAddrSize(uint8_t AddrSize, uint16_t Version) {
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return (Version == 2) ? AddrSize : 4;
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}
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bool DWARFExpression::Operation::extract(DataExtractor Data, uint16_t Version,
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uint8_t AddressSize, uint32_t Offset) {
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Opcode = Data.getU8(&Offset);
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Desc = getOpDesc(Opcode);
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if (Desc.Version == Operation::DwarfNA) {
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EndOffset = Offset;
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return false;
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}
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for (unsigned Operand = 0; Operand < 2; ++Operand) {
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unsigned Size = Desc.Op[Operand];
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unsigned Signed = Size & Operation::SignBit;
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if (Size == Operation::SizeNA)
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break;
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switch (Size & ~Operation::SignBit) {
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case Operation::Size1:
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Operands[Operand] = Data.getU8(&Offset);
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if (Signed)
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Operands[Operand] = (int8_t)Operands[Operand];
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break;
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case Operation::Size2:
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Operands[Operand] = Data.getU16(&Offset);
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if (Signed)
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Operands[Operand] = (int16_t)Operands[Operand];
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break;
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case Operation::Size4:
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Operands[Operand] = Data.getU32(&Offset);
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if (Signed)
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Operands[Operand] = (int32_t)Operands[Operand];
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break;
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case Operation::Size8:
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Operands[Operand] = Data.getU64(&Offset);
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break;
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case Operation::SizeAddr:
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if (AddressSize == 8) {
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Operands[Operand] = Data.getU64(&Offset);
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} else {
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assert(AddressSize == 4);
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Operands[Operand] = Data.getU32(&Offset);
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}
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break;
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case Operation::SizeRefAddr:
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if (getRefAddrSize(AddressSize, Version) == 8) {
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Operands[Operand] = Data.getU64(&Offset);
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} else {
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assert(getRefAddrSize(AddressSize, Version) == 4);
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Operands[Operand] = Data.getU32(&Offset);
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}
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break;
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case Operation::SizeLEB:
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if (Signed)
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Operands[Operand] = Data.getSLEB128(&Offset);
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else
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Operands[Operand] = Data.getULEB128(&Offset);
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break;
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case Operation::SizeBlock:
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// We need a size, so this cannot be the first operand
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if (Operand == 0)
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return false;
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// Store the offset of the block as the value.
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Operands[Operand] = Offset;
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Offset += Operands[Operand - 1];
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break;
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default:
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llvm_unreachable("Unknown DWARFExpression Op size");
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}
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}
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EndOffset = Offset;
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return true;
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}
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static bool prettyPrintRegisterOp(raw_ostream &OS, uint8_t Opcode,
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uint64_t Operands[2],
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const MCRegisterInfo *MRI, bool isEH) {
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if (!MRI)
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return false;
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uint64_t DwarfRegNum;
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unsigned OpNum = 0;
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if (Opcode == DW_OP_bregx || Opcode == DW_OP_regx)
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DwarfRegNum = Operands[OpNum++];
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else if (Opcode >= DW_OP_breg0 && Opcode < DW_OP_bregx)
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DwarfRegNum = Opcode - DW_OP_breg0;
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else
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DwarfRegNum = Opcode - DW_OP_reg0;
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int LLVMRegNum = MRI->getLLVMRegNum(DwarfRegNum, isEH);
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if (LLVMRegNum >= 0) {
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if (const char *RegName = MRI->getName(LLVMRegNum)) {
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if ((Opcode >= DW_OP_breg0 && Opcode <= DW_OP_breg31) ||
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Opcode == DW_OP_bregx)
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OS << format(" %s%+" PRId64, RegName, Operands[OpNum]);
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else
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OS << ' ' << RegName;
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return true;
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}
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}
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return false;
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}
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bool DWARFExpression::Operation::print(raw_ostream &OS,
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const DWARFExpression *Expr,
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const MCRegisterInfo *RegInfo,
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bool isEH) {
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if (Error) {
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OS << "<decoding error>";
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return false;
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}
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StringRef Name = OperationEncodingString(Opcode);
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assert(!Name.empty() && "DW_OP has no name!");
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OS << Name;
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if ((Opcode >= DW_OP_breg0 && Opcode <= DW_OP_breg31) ||
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(Opcode >= DW_OP_reg0 && Opcode <= DW_OP_reg31) ||
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Opcode == DW_OP_bregx || Opcode == DW_OP_regx)
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if (prettyPrintRegisterOp(OS, Opcode, Operands, RegInfo, isEH))
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return true;
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for (unsigned Operand = 0; Operand < 2; ++Operand) {
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unsigned Size = Desc.Op[Operand];
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unsigned Signed = Size & Operation::SignBit;
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if (Size == Operation::SizeNA)
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break;
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if (Size == Operation::SizeBlock) {
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uint32_t Offset = Operands[Operand];
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for (unsigned i = 0; i < Operands[Operand - 1]; ++i)
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OS << format(" 0x%02x", Expr->Data.getU8(&Offset));
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} else {
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if (Signed)
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OS << format(" %+" PRId64, (int64_t)Operands[Operand]);
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else
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OS << format(" 0x%" PRIx64, Operands[Operand]);
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}
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}
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return true;
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}
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void DWARFExpression::print(raw_ostream &OS, const MCRegisterInfo *RegInfo) {
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for (auto &Op : *this) {
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if (!Op.print(OS, this, RegInfo, /* isEH */ false)) {
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uint32_t FailOffset = Op.getEndOffset();
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while (FailOffset < Data.getData().size())
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OS << format(" %02x", Data.getU8(&FailOffset));
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return;
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}
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if (Op.getEndOffset() < Data.getData().size())
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OS << ", ";
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}
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}
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} // namespace llvm
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