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//===- llvm/CodeGen/GlobalISel/InstructionSelect.cpp - InstructionSelect ---==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This file implements the InstructionSelect class.
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
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#include "llvm/ADT/PostOrderIterator.h"
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#include "llvm/ADT/ScopeExit.h"
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#include "llvm/ADT/Twine.h"
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#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
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#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
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#include "llvm/CodeGen/GlobalISel/Utils.h"
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#include "llvm/CodeGen/MachineOptimizationRemarkEmitter.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/TargetLowering.h"
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#include "llvm/CodeGen/TargetPassConfig.h"
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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#include "llvm/Config/config.h"
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#include "llvm/IR/Constants.h"
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#include "llvm/IR/Function.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/TargetRegistry.h"
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#define DEBUG_TYPE "instruction-select"
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using namespace llvm;
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#ifdef LLVM_GISEL_COV_PREFIX
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static cl::opt<std::string>
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CoveragePrefix("gisel-coverage-prefix", cl::init(LLVM_GISEL_COV_PREFIX),
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cl::desc("Record GlobalISel rule coverage files of this "
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"prefix if instrumentation was generated"));
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#else
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static const std::string CoveragePrefix = "";
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#endif
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char InstructionSelect::ID = 0;
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INITIALIZE_PASS_BEGIN(InstructionSelect, DEBUG_TYPE,
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"Select target instructions out of generic instructions",
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false, false)
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INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
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INITIALIZE_PASS_END(InstructionSelect, DEBUG_TYPE,
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"Select target instructions out of generic instructions",
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false, false)
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InstructionSelect::InstructionSelect() : MachineFunctionPass(ID) {
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initializeInstructionSelectPass(*PassRegistry::getPassRegistry());
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}
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void InstructionSelect::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addRequired<TargetPassConfig>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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bool InstructionSelect::runOnMachineFunction(MachineFunction &MF) {
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const MachineRegisterInfo &MRI = MF.getRegInfo();
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// No matter what happens, whether we successfully select the function or not,
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// nothing is going to use the vreg types after us. Make sure they disappear.
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auto ClearVRegTypesOnReturn =
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make_scope_exit([&]() { MRI.getVRegToType().clear(); });
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// If the ISel pipeline failed, do not bother running that pass.
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if (MF.getProperties().hasProperty(
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MachineFunctionProperties::Property::FailedISel))
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return false;
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DEBUG(dbgs() << "Selecting function: " << MF.getName() << '\n');
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const TargetPassConfig &TPC = getAnalysis<TargetPassConfig>();
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const InstructionSelector *ISel = MF.getSubtarget().getInstructionSelector();
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CodeGenCoverage CoverageInfo;
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assert(ISel && "Cannot work without InstructionSelector");
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// An optimization remark emitter. Used to report failures.
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MachineOptimizationRemarkEmitter MORE(MF, /*MBFI=*/nullptr);
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// FIXME: There are many other MF/MFI fields we need to initialize.
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#ifndef NDEBUG
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// Check that our input is fully legal: we require the function to have the
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// Legalized property, so it should be.
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// FIXME: This should be in the MachineVerifier, but it can't use the
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// LegalizerInfo as it's currently in the separate GlobalISel library.
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// The RegBankSelected property is already checked in the verifier. Note
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// that it has the same layering problem, but we only use inline methods so
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// end up not needing to link against the GlobalISel library.
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if (const LegalizerInfo *MLI = MF.getSubtarget().getLegalizerInfo())
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for (MachineBasicBlock &MBB : MF)
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for (MachineInstr &MI : MBB)
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if (isPreISelGenericOpcode(MI.getOpcode()) && !MLI->isLegal(MI, MRI)) {
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reportGISelFailure(MF, TPC, MORE, "gisel-select",
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"instruction is not legal", MI);
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return false;
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}
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#endif
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// FIXME: We could introduce new blocks and will need to fix the outer loop.
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// Until then, keep track of the number of blocks to assert that we don't.
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const size_t NumBlocks = MF.size();
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for (MachineBasicBlock *MBB : post_order(&MF)) {
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if (MBB->empty())
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continue;
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// Select instructions in reverse block order. We permit erasing so have
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// to resort to manually iterating and recognizing the begin (rend) case.
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bool ReachedBegin = false;
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for (auto MII = std::prev(MBB->end()), Begin = MBB->begin();
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!ReachedBegin;) {
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#ifndef NDEBUG
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// Keep track of the insertion range for debug printing.
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const auto AfterIt = std::next(MII);
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#endif
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// Select this instruction.
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MachineInstr &MI = *MII;
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// And have our iterator point to the next instruction, if there is one.
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if (MII == Begin)
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ReachedBegin = true;
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else
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--MII;
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DEBUG(dbgs() << "Selecting: \n " << MI);
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// We could have folded this instruction away already, making it dead.
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// If so, erase it.
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if (isTriviallyDead(MI, MRI)) {
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DEBUG(dbgs() << "Is dead; erasing.\n");
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MI.eraseFromParentAndMarkDBGValuesForRemoval();
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continue;
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}
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if (!ISel->select(MI, CoverageInfo)) {
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// FIXME: It would be nice to dump all inserted instructions. It's
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// not obvious how, esp. considering select() can insert after MI.
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reportGISelFailure(MF, TPC, MORE, "gisel-select", "cannot select", MI);
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return false;
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}
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// Dump the range of instructions that MI expanded into.
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DEBUG({
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auto InsertedBegin = ReachedBegin ? MBB->begin() : std::next(MII);
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dbgs() << "Into:\n";
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for (auto &InsertedMI : make_range(InsertedBegin, AfterIt))
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dbgs() << " " << InsertedMI;
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dbgs() << '\n';
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});
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}
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}
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const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
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// Now that selection is complete, there are no more generic vregs. Verify
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// that the size of the now-constrained vreg is unchanged and that it has a
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// register class.
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for (auto &VRegToType : MRI.getVRegToType()) {
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unsigned VReg = VRegToType.first;
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auto *RC = MRI.getRegClassOrNull(VReg);
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MachineInstr *MI = nullptr;
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if (!MRI.def_empty(VReg))
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MI = &*MRI.def_instr_begin(VReg);
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else if (!MRI.use_empty(VReg))
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MI = &*MRI.use_instr_begin(VReg);
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if (MI && !RC) {
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reportGISelFailure(MF, TPC, MORE, "gisel-select",
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"VReg has no regclass after selection", *MI);
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return false;
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} else if (!RC)
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continue;
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if (VRegToType.second.isValid() &&
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VRegToType.second.getSizeInBits() > TRI.getRegSizeInBits(*RC)) {
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reportGISelFailure(MF, TPC, MORE, "gisel-select",
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"VReg has explicit size different from class size",
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*MI);
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return false;
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}
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}
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if (MF.size() != NumBlocks) {
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MachineOptimizationRemarkMissed R("gisel-select", "GISelFailure",
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MF.getFunction().getSubprogram(),
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/*MBB=*/nullptr);
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R << "inserting blocks is not supported yet";
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reportGISelFailure(MF, TPC, MORE, R);
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return false;
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}
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auto &TLI = *MF.getSubtarget().getTargetLowering();
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TLI.finalizeLowering(MF);
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CoverageInfo.emit(CoveragePrefix,
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MF.getSubtarget()
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.getTargetLowering()
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->getTargetMachine()
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.getTarget()
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.getBackendName());
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// FIXME: Should we accurately track changes?
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return true;
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}
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