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Imported Upstream version 5.18.0.161

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Former-commit-id: 4db48158d3a35497b8f118ab21b5f08ac3d86d98
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Xamarin Public Jenkins (auto-signing)
2018-10-19 08:34:24 +00:00
parent 37fbf886a3
commit e19d552987
28702 changed files with 3868076 additions and 803 deletions
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24
external/llvm/test/CodeGen/SystemZ/vec-add-02.ll vendored Normal file
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@ -0,0 +1,24 @@
; Test vector addition on z14.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
; Test a v4f32 addition.
define <4 x float> @f1(<4 x float> %dummy, <4 x float> %val1,
<4 x float> %val2) {
; CHECK-LABEL: f1:
; CHECK: vfasb %v24, %v26, %v28
; CHECK: br %r14
%ret = fadd <4 x float> %val1, %val2
ret <4 x float> %ret
}
; Test an f32 addition that uses vector registers.
define float @f2(<4 x float> %val1, <4 x float> %val2) {
; CHECK-LABEL: f2:
; CHECK: wfasb %f0, %v24, %v26
; CHECK: br %r14
%scalar1 = extractelement <4 x float> %val1, i32 0
%scalar2 = extractelement <4 x float> %val2, i32 0
%ret = fadd float %scalar1, %scalar2
ret float %ret
}