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Imported Upstream version 5.18.0.161

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Former-commit-id: 4db48158d3a35497b8f118ab21b5f08ac3d86d98
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Xamarin Public Jenkins (auto-signing)
2018-10-19 08:34:24 +00:00
parent 37fbf886a3
commit e19d552987
28702 changed files with 3868076 additions and 803 deletions
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22
external/llvm/test/CodeGen/Mips/setltk.ll vendored Normal file
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; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
; RUN: llc -march=mips -mattr=micromips -mcpu=mips32r6 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=MMR6
@j = global i32 -5, align 4
@k = global i32 10, align 4
@l = global i32 20, align 4
@m = global i32 10, align 4
@r1 = common global i32 0, align 4
@r2 = common global i32 0, align 4
@r3 = common global i32 0, align 4
define void @test() nounwind {
entry:
%0 = load i32, i32* @j, align 4
%cmp = icmp slt i32 %0, 10
%conv = zext i1 %cmp to i32
store i32 %conv, i32* @r1, align 4
; 16: slti $[[REGISTER:[0-9]+]], 10
; MMR6: slti $[[REGISTER:[0-9]+]], $[[REGISTER:[0-9]+]], 10
; 16: move $[[REGISTER]], $24
ret void
}