Imported Upstream version 5.18.0.247

Former-commit-id: 2d6af2e4ed0eda5cbdc2946446ef7718456ad190

external/llvm/test/CodeGen/X86/vec_set-7.ll

@@ -1,23 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
-
-define <2 x i64> @test(<2 x i64>* %p) nounwind {
-; X86-LABEL: test:
-; X86:       # %bb.0:
-; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-NEXT:    retl
-;
-; X64-LABEL: test:
-; X64:       # %bb.0:
-; X64-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
-; X64-NEXT:    retq
-  %tmp = bitcast <2 x i64>* %p to double*
-  %tmp.upgrd.1 = load double, double* %tmp
-  %tmp.upgrd.2 = insertelement <2 x double> undef, double %tmp.upgrd.1, i32 0
-  %tmp5 = insertelement <2 x double> %tmp.upgrd.2, double 0.0, i32 1
-  %tmp.upgrd.3 = bitcast <2 x double> %tmp5 to <2 x i64>
-  ret <2 x i64> %tmp.upgrd.3
-}
-