Imported Upstream version 5.18.0.247

Former-commit-id: 2d6af2e4ed0eda5cbdc2946446ef7718456ad190

external/llvm/test/CodeGen/X86/GlobalISel/mul-scalar.ll

@@ -1,39 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
-
-;TODO: instruction selection not supported yet
-;define i8 @test_mul_i8(i8 %arg1, i8 %arg2) {
-;  %ret = mul i8 %arg1, %arg2
-;  ret i8 %ret
-;}
-
-define i16 @test_mul_i16(i16 %arg1, i16 %arg2) {
-; X64-LABEL: test_mul_i16:
-; X64:       # %bb.0:
-; X64-NEXT:    imulw %di, %si
-; X64-NEXT:    movl %esi, %eax
-; X64-NEXT:    retq
-  %ret = mul i16 %arg1, %arg2
-  ret i16 %ret
-}
-
-define i32 @test_mul_i32(i32 %arg1, i32 %arg2) {
-; X64-LABEL: test_mul_i32:
-; X64:       # %bb.0:
-; X64-NEXT:    imull %edi, %esi
-; X64-NEXT:    movl %esi, %eax
-; X64-NEXT:    retq
-  %ret = mul i32 %arg1, %arg2
-  ret i32 %ret
-}
-
-define i64 @test_mul_i64(i64 %arg1, i64 %arg2) {
-; X64-LABEL: test_mul_i64:
-; X64:       # %bb.0:
-; X64-NEXT:    imulq %rdi, %rsi
-; X64-NEXT:    movq %rsi, %rax
-; X64-NEXT:    retq
-  %ret = mul i64 %arg1, %arg2
-  ret i64 %ret
-}
-