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Imported Upstream version 5.18.0.247

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Former-commit-id: 2d6af2e4ed0eda5cbdc2946446ef7718456ad190
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Xamarin Public Jenkins (auto-signing)
2019-01-25 08:19:26 +00:00
parent 279aa8f685
commit ce8e504569
28478 changed files with 39 additions and 3866962 deletions
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47
external/llvm/test/CodeGen/AArch64/strqro.ll vendored
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@@ -1,47 +0,0 @@
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck --check-prefix=CHECK --check-prefix=CHECK-STRQRO %s
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mcpu=falkor | FileCheck --check-prefix=CHECK --check-prefix=CHECK-NOSTRQRO %s
; CHECK-LABEL: strqrox:
; CHECK-STRQRO: str q{{[0-9]+}}, [x{{[0-9]+}}, x
; CHECK-NOSTRQRO-NOT: str q{{[0-9]+}}, [x{{[0-9]+}}, x
define void @strqrox(fp128 %val64, i64 %base, i64 %offset) {
%addrint = add i64 %base, %offset
%addr = inttoptr i64 %addrint to fp128*
store volatile fp128 %val64, fp128* %addr
ret void
}
; Check that STRQro is generated for both cases if we're optimizing for code size.
; CHECK-LABEL: strqrox_optsize:
; CHECK-STRQRO: str q{{[0-9]+}}, [x{{[0-9]+}}, x
; CHECK-NOSTRQRO: str q{{[0-9]+}}, [x{{[0-9]+}}, x
define void @strqrox_optsize(fp128 %val64, i64 %base, i64 %offset) minsize {
%addrint = add i64 %base, %offset
%addr = inttoptr i64 %addrint to fp128*
store volatile fp128 %val64, fp128* %addr
ret void
}
; CHECK-LABEL: strqrow:
; CHECK-STRQRO: str q{{[0-9]+}}, [x{{[0-9]+}}, w
; CHECK-NOSTRQRO-NOT: str q{{[0-9]+}}, [x{{[0-9]+}}, w
define void @strqrow(fp128 %val64, i64 %base, i32 %offset) {
%offset64 = zext i32 %offset to i64
%addrint = add i64 %base, %offset64
%addr = inttoptr i64 %addrint to fp128*
store volatile fp128 %val64, fp128* %addr
ret void
}
; Check that STRQro is generated for both cases if we're optimizing for code size.
; CHECK-LABEL: strqrow_optsize:
; CHECK-STRQRO: str q{{[0-9]+}}, [x{{[0-9]+}}, w
; CHECK-NOSTRQRO: str q{{[0-9]+}}, [x{{[0-9]+}}, w
define void @strqrow_optsize(fp128 %val64, i64 %base, i32 %offset) minsize {
%offset64 = zext i32 %offset to i64
%addrint = add i64 %base, %offset64
%addr = inttoptr i64 %addrint to fp128*
store volatile fp128 %val64, fp128* %addr
ret void
}