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Imported Upstream version 5.18.0.167
Former-commit-id: 289509151e0fee68a1b591a20c9f109c3c789d3a
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@ -1,43 +0,0 @@
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; RUN: opt -S -simplifycfg -mtriple=arm -mattr=+v6t2 < %s | FileCheck %s
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define i32 @ctlz(i32 %A) {
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; CHECK-LABEL: @ctlz(
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; CHECK: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i32 %A, 0
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; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
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; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
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; CHECK-NEXT: ret i32 [[SEL]]
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entry:
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%tobool = icmp eq i32 %A, 0
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br i1 %tobool, label %cond.end, label %cond.true
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cond.true:
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%0 = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
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br label %cond.end
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cond.end:
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%cond = phi i32 [ %0, %cond.true ], [ 32, %entry ]
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ret i32 %cond
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}
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define i32 @cttz(i32 %A) {
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; CHECK-LABEL: @cttz(
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; CHECK: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i32 %A, 0
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; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
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; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
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; CHECK-NEXT: ret i32 [[SEL]]
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entry:
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%tobool = icmp eq i32 %A, 0
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br i1 %tobool, label %cond.end, label %cond.true
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cond.true:
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%0 = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
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br label %cond.end
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cond.end:
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%cond = phi i32 [ %0, %cond.true ], [ 32, %entry ]
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ret i32 %cond
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}
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declare i32 @llvm.ctlz.i32(i32, i1)
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declare i32 @llvm.cttz.i32(i32, i1)
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@ -1,5 +0,0 @@
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config.suffixes = ['.ll']
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targets = set(config.root.targets_to_build.split())
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if not 'ARM' in targets:
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config.unsupported = True
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@ -1,25 +0,0 @@
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;RUN: opt -S -simplifycfg -mtriple=arm < %s | FileCheck %s
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target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
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; CHECK-LABEL: select_trunc_i64
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; CHECK-NOT: br
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; CHECK: select
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; CHECK: select
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define arm_aapcscc i32 @select_trunc_i64(i32 %a, i32 %b) {
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entry:
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%conv = sext i32 %a to i64
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%conv1 = sext i32 %b to i64
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%add = add nsw i64 %conv1, %conv
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%cmp = icmp sgt i64 %add, 2147483647
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br i1 %cmp, label %cond.end7, label %cond.false
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cond.false: ; preds = %entry
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%0 = icmp sgt i64 %add, -2147483648
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%cond = select i1 %0, i64 %add, i64 -2147483648
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%extract.t = trunc i64 %cond to i32
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br label %cond.end7
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cond.end7: ; preds = %cond.false, %entry
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%cond8.off0 = phi i32 [ 2147483647, %entry ], [ %extract.t, %cond.false ]
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ret i32 %cond8.off0
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}
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@ -1,40 +0,0 @@
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; RUN: opt -S -simplifycfg < %s | FileCheck %s
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target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
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target triple = "armv7a--none-eabi"
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; One of the phi node's values is too complex to be represented by a global
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; variable, so we can't convert to a lookup table.
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; CHECK-NOT: @switch.table
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; CHECK-NOT: load
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@g1 = external global i32, align 4
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@g2 = external global i32, align 4
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@g3 = external global i32, align 4
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@g4 = external thread_local global i32, align 4
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define i32* @test3(i32 %n) {
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entry:
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switch i32 %n, label %sw.default [
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i32 0, label %sw.bb
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i32 1, label %sw.bb1
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i32 2, label %sw.bb2
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]
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sw.bb:
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br label %return
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sw.bb1:
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br label %return
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sw.bb2:
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br label %return
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sw.default:
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br label %return
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return:
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%retval.0 = phi i32* [ @g4, %sw.default ], [ getelementptr inbounds (i32, i32* inttoptr (i32 mul (i32 ptrtoint (i32* @g3 to i32), i32 2) to i32*), i32 1), %sw.bb2 ], [ @g2, %sw.bb1 ], [ @g1, %sw.bb ]
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ret i32* %retval.0
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}
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@ -1,132 +0,0 @@
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; RUN: opt -S -simplifycfg -switch-to-lookup -mtriple=arm -relocation-model=static < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ENABLE
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; RUN: opt -S -simplifycfg -switch-to-lookup -mtriple=arm -relocation-model=pic < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ENABLE
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; RUN: opt -S -simplifycfg -switch-to-lookup -mtriple=arm -relocation-model=ropi < %s | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLE
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; RUN: opt -S -simplifycfg -switch-to-lookup -mtriple=arm -relocation-model=rwpi < %s | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLE
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; RUN: opt -S -simplifycfg -switch-to-lookup -mtriple=arm -relocation-model=ropi-rwpi < %s | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLE
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; CHECK: @{{.*}} = private unnamed_addr constant [3 x i32] [i32 1234, i32 5678, i32 15532]
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; ENABLE: @{{.*}} = private unnamed_addr constant [3 x i32*] [i32* @c1, i32* @c2, i32* @c3]
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; DISABLE-NOT: @{{.*}} = private unnamed_addr constant [3 x i32*] [i32* @c1, i32* @c2, i32* @c3]
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; ENABLE: @{{.*}} = private unnamed_addr constant [3 x i32*] [i32* @g1, i32* @g2, i32* @g3]
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; DISABLE-NOT: @{{.*}} = private unnamed_addr constant [3 x i32*] [i32* @g1, i32* @g2, i32* @g3]
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; ENABLE: @{{.*}} = private unnamed_addr constant [3 x i32 (i32, i32)*] [i32 (i32, i32)* @f1, i32 (i32, i32)* @f2, i32 (i32, i32)* @f3]
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; DISABLE-NOT: @{{.*}} = private unnamed_addr constant [3 x i32 (i32, i32)*] [i32 (i32, i32)* @f1, i32 (i32, i32)* @f2, i32 (i32, i32)* @f3]
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target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
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target triple = "armv7a--none-eabi"
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define i32 @test1(i32 %n) {
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entry:
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switch i32 %n, label %sw.default [
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i32 0, label %sw.bb
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i32 1, label %sw.bb1
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i32 2, label %sw.bb2
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]
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sw.bb:
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br label %return
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sw.bb1:
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br label %return
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sw.bb2:
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br label %return
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sw.default:
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br label %return
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return:
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%retval.0 = phi i32 [ 15498, %sw.default ], [ 15532, %sw.bb2 ], [ 5678, %sw.bb1 ], [ 1234, %sw.bb ]
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ret i32 %retval.0
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}
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@c1 = external constant i32, align 4
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@c2 = external constant i32, align 4
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@c3 = external constant i32, align 4
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@c4 = external constant i32, align 4
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define i32* @test2(i32 %n) {
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entry:
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switch i32 %n, label %sw.default [
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i32 0, label %sw.bb
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i32 1, label %sw.bb1
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i32 2, label %sw.bb2
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]
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sw.bb:
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br label %return
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sw.bb1:
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br label %return
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sw.bb2:
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br label %return
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sw.default:
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br label %return
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return:
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%retval.0 = phi i32* [ @c4, %sw.default ], [ @c3, %sw.bb2 ], [ @c2, %sw.bb1 ], [ @c1, %sw.bb ]
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ret i32* %retval.0
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}
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@g1 = external global i32, align 4
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@g2 = external global i32, align 4
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@g3 = external global i32, align 4
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@g4 = external global i32, align 4
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define i32* @test3(i32 %n) {
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entry:
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switch i32 %n, label %sw.default [
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i32 0, label %sw.bb
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i32 1, label %sw.bb1
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i32 2, label %sw.bb2
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]
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sw.bb:
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br label %return
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sw.bb1:
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br label %return
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sw.bb2:
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br label %return
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sw.default:
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br label %return
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return:
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%retval.0 = phi i32* [ @g4, %sw.default ], [ @g3, %sw.bb2 ], [ @g2, %sw.bb1 ], [ @g1, %sw.bb ]
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ret i32* %retval.0
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}
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declare i32 @f1(i32, i32)
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declare i32 @f2(i32, i32)
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declare i32 @f3(i32, i32)
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declare i32 @f4(i32, i32)
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declare i32 @f5(i32, i32)
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define i32 @test4(i32 %a, i32 %b, i32 %c) {
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entry:
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%cmp = icmp eq i32 %a, 1
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br i1 %cmp, label %cond.end11, label %cond.false
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cond.false:
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%cmp1 = icmp eq i32 %a, 2
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br i1 %cmp1, label %cond.end11, label %cond.false3
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cond.false3:
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%cmp4 = icmp eq i32 %a, 3
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br i1 %cmp4, label %cond.end11, label %cond.false6
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cond.false6:
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%cmp7 = icmp eq i32 %a, 4
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%cond = select i1 %cmp7, i32 (i32, i32)* @f4, i32 (i32, i32)* @f5
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br label %cond.end11
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cond.end11:
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%cond12 = phi i32 (i32, i32)* [ @f1, %entry ], [ @f2, %cond.false ], [ %cond, %cond.false6 ], [ @f3, %cond.false3 ]
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%call = call i32 %cond12(i32 %b, i32 %c) #2
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ret i32 %call
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}
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