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Imported Upstream version 5.18.0.167
Former-commit-id: 289509151e0fee68a1b591a20c9f109c3c789d3a
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; RUN: opt -S -simplifycfg -mtriple=amdgcn-unknown-unknown -mcpu=tahiti < %s | FileCheck -check-prefix=SI -check-prefix=ALL %s
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; RUN: opt -S -simplifycfg -mtriple=amdgcn-unknown-unknown -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=ALL %s
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define i64 @test1(i64 %A) {
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; ALL-LABEL: @test1(
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; SI: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i64 %A, 0
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; SI-NEXT: [[CTLZ:%[A-Za-z0-9]+]] = tail call i64 @llvm.ctlz.i64(i64 %A, i1 true)
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; SI-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i64 64, i64 [[CTLZ]]
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; SI-NEXT: ret i64 [[SEL]]
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entry:
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%tobool = icmp eq i64 %A, 0
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br i1 %tobool, label %cond.end, label %cond.true
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cond.true: ; preds = %entry
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%0 = tail call i64 @llvm.ctlz.i64(i64 %A, i1 true)
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br label %cond.end
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cond.end: ; preds = %entry, %cond.true
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%cond = phi i64 [ %0, %cond.true ], [ 64, %entry ]
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ret i64 %cond
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}
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define i32 @test2(i32 %A) {
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; ALL-LABEL: @test2(
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; SI: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i32 %A, 0
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; SI-NEXT: [[CTLZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
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; SI-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTLZ]]
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; SI-NEXT: ret i32 [[SEL]]
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entry:
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%tobool = icmp eq i32 %A, 0
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br i1 %tobool, label %cond.end, label %cond.true
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cond.true: ; preds = %entry
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%0 = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
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br label %cond.end
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cond.end: ; preds = %entry, %cond.true
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%cond = phi i32 [ %0, %cond.true ], [ 32, %entry ]
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ret i32 %cond
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}
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define signext i16 @test3(i16 signext %A) {
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; ALL-LABEL: @test3(
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; SI: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i16 %A, 0
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; SI-NEXT: [[CTLZ:%[A-Za-z0-9]+]] = tail call i16 @llvm.ctlz.i16(i16 %A, i1 true)
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; SI-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i16 16, i16 [[CTLZ]]
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; SI-NEXT: ret i16 [[SEL]]
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entry:
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%tobool = icmp eq i16 %A, 0
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br i1 %tobool, label %cond.end, label %cond.true
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cond.true: ; preds = %entry
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%0 = tail call i16 @llvm.ctlz.i16(i16 %A, i1 true)
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br label %cond.end
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cond.end: ; preds = %entry, %cond.true
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%cond = phi i16 [ %0, %cond.true ], [ 16, %entry ]
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ret i16 %cond
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}
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define i64 @test1b(i64 %A) {
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; ALL-LABEL: @test1b(
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; SI: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i64 %A, 0
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; SI-NEXT: [[CTTZ:%[A-Za-z0-9]+]] = tail call i64 @llvm.cttz.i64(i64 %A, i1 true)
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; SI-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i64 64, i64 [[CTTZ]]
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; SI-NEXT: ret i64 [[SEL]]
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entry:
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%tobool = icmp eq i64 %A, 0
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br i1 %tobool, label %cond.end, label %cond.true
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cond.true: ; preds = %entry
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%0 = tail call i64 @llvm.cttz.i64(i64 %A, i1 true)
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br label %cond.end
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cond.end: ; preds = %entry, %cond.true
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%cond = phi i64 [ %0, %cond.true ], [ 64, %entry ]
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ret i64 %cond
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}
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define i32 @test2b(i32 %A) {
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; ALL-LABEL: @test2b(
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; SI: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i32 %A, 0
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; SI-NEXT: [[CTTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
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; SI-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTTZ]]
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; SI-NEXT: ret i32 [[SEL]]
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entry:
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%tobool = icmp eq i32 %A, 0
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br i1 %tobool, label %cond.end, label %cond.true
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cond.true: ; preds = %entry
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%0 = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
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br label %cond.end
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cond.end: ; preds = %entry, %cond.true
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%cond = phi i32 [ %0, %cond.true ], [ 32, %entry ]
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ret i32 %cond
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}
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define signext i16 @test3b(i16 signext %A) {
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; ALL-LABEL: @test3b(
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; SI: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i16 %A, 0
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; SI-NEXT: [[CTTZ:%[A-Za-z0-9]+]] = tail call i16 @llvm.cttz.i16(i16 %A, i1 true)
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; SI-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i16 16, i16 [[CTTZ]]
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; SI-NEXT: ret i16 [[SEL]]
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entry:
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%tobool = icmp eq i16 %A, 0
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br i1 %tobool, label %cond.end, label %cond.true
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cond.true: ; preds = %entry
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%0 = tail call i16 @llvm.cttz.i16(i16 %A, i1 true)
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br label %cond.end
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cond.end: ; preds = %entry, %cond.true
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%cond = phi i16 [ %0, %cond.true ], [ 16, %entry ]
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ret i16 %cond
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}
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define i64 @test1c(i64 %A) {
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; ALL-LABEL: @test1c(
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; ALL: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i64 %A, 0
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; ALL-NEXT: [[CTLZ:%[A-Za-z0-9]+]] = tail call i64 @llvm.ctlz.i64(i64 %A, i1 true)
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; ALL-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i64 63, i64 [[CTLZ]]
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; ALL-NEXT: ret i64 [[SEL]]
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entry:
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%tobool = icmp eq i64 %A, 0
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br i1 %tobool, label %cond.end, label %cond.true
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cond.true: ; preds = %entry
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%0 = tail call i64 @llvm.ctlz.i64(i64 %A, i1 true)
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br label %cond.end
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cond.end: ; preds = %entry, %cond.true
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%cond = phi i64 [ %0, %cond.true ], [ 63, %entry ]
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ret i64 %cond
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}
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define i32 @test2c(i32 %A) {
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; ALL-LABEL: @test2c(
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; ALL: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i32 %A, 0
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; ALL-NEXT: [[CTLZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
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; ALL-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 31, i32 [[CTLZ]]
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; ALL-NEXT: ret i32 [[SEL]]
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entry:
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%tobool = icmp eq i32 %A, 0
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br i1 %tobool, label %cond.end, label %cond.true
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cond.true: ; preds = %entry
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%0 = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
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br label %cond.end
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cond.end: ; preds = %entry, %cond.true
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%cond = phi i32 [ %0, %cond.true ], [ 31, %entry ]
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ret i32 %cond
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}
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define signext i16 @test3c(i16 signext %A) {
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; ALL-LABEL: @test3c(
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; ALL: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i16 %A, 0
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; ALL-NEXT: [[CTLZ:%[A-Za-z0-9]+]] = tail call i16 @llvm.ctlz.i16(i16 %A, i1 true)
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; ALL-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i16 15, i16 [[CTLZ]]
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; ALL-NEXT: ret i16 [[SEL]]
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entry:
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%tobool = icmp eq i16 %A, 0
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br i1 %tobool, label %cond.end, label %cond.true
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cond.true: ; preds = %entry
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%0 = tail call i16 @llvm.ctlz.i16(i16 %A, i1 true)
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br label %cond.end
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cond.end: ; preds = %entry, %cond.true
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%cond = phi i16 [ %0, %cond.true ], [ 15, %entry ]
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ret i16 %cond
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}
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define i64 @test1d(i64 %A) {
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; ALL-LABEL: @test1d(
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; ALL: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i64 %A, 0
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; ALL-NEXT: [[CTTZ:%[A-Za-z0-9]+]] = tail call i64 @llvm.cttz.i64(i64 %A, i1 true)
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; ALL-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i64 63, i64 [[CTTZ]]
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; ALL-NEXT: ret i64 [[SEL]]
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entry:
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%tobool = icmp eq i64 %A, 0
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br i1 %tobool, label %cond.end, label %cond.true
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cond.true: ; preds = %entry
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%0 = tail call i64 @llvm.cttz.i64(i64 %A, i1 true)
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br label %cond.end
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cond.end: ; preds = %entry, %cond.true
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%cond = phi i64 [ %0, %cond.true ], [ 63, %entry ]
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ret i64 %cond
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}
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define i32 @test2d(i32 %A) {
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; ALL-LABEL: @test2d(
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; ALL: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i32 %A, 0
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; ALL-NEXT: [[CTTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
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; ALL-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 31, i32 [[CTTZ]]
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; ALL-NEXT: ret i32 [[SEL]]
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entry:
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%tobool = icmp eq i32 %A, 0
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br i1 %tobool, label %cond.end, label %cond.true
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cond.true: ; preds = %entry
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%0 = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
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br label %cond.end
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cond.end: ; preds = %entry, %cond.true
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%cond = phi i32 [ %0, %cond.true ], [ 31, %entry ]
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ret i32 %cond
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}
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define signext i16 @test3d(i16 signext %A) {
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; ALL-LABEL: @test3d(
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; ALL: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i16 %A, 0
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; ALL-NEXT: [[CTTZ:%[A-Za-z0-9]+]] = tail call i16 @llvm.cttz.i16(i16 %A, i1 true)
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; ALL-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i16 15, i16 [[CTTZ]]
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; ALL-NEXT: ret i16 [[SEL]]
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entry:
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%tobool = icmp eq i16 %A, 0
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br i1 %tobool, label %cond.end, label %cond.true
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cond.true: ; preds = %entry
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%0 = tail call i16 @llvm.cttz.i16(i16 %A, i1 true)
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br label %cond.end
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cond.end: ; preds = %entry, %cond.true
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%cond = phi i16 [ %0, %cond.true ], [ 15, %entry ]
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ret i16 %cond
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}
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declare i64 @llvm.ctlz.i64(i64, i1)
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declare i32 @llvm.ctlz.i32(i32, i1)
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declare i16 @llvm.ctlz.i16(i16, i1)
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declare i64 @llvm.cttz.i64(i64, i1)
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declare i32 @llvm.cttz.i32(i32, i1)
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declare i16 @llvm.cttz.i16(i16, i1)
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if not 'AMDGPU' in config.root.targets:
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config.unsupported = True
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