Imported Upstream version 5.18.0.167

Former-commit-id: 289509151e0fee68a1b591a20c9f109c3c789d3a
This commit is contained in:
Xamarin Public Jenkins (auto-signing)
2018-10-20 08:25:10 +00:00
parent e19d552987
commit b084638f15
28489 changed files with 184 additions and 3866856 deletions

View File

@ -1,29 +0,0 @@
; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -loop-vectorize -simplifycfg < %s | FileCheck -check-prefixes=GCN,GFX9 %s
; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 -loop-vectorize -pass-remarks-analysis='loop-vectorize' < %s 2>&1 | FileCheck -check-prefixes=REMARK %s
; GCN-LABEL: @runtime_check_divergent_target(
; GCN-NOT: load <2 x half>
; GCN-NOT: store <2 x half>
; REMARK: remark: <unknown>:0:0: loop not vectorized: runtime pointer checks needed. Not enabled for divergent target
define amdgpu_kernel void @runtime_check_divergent_target(half addrspace(1)* nocapture %a, half addrspace(1)* nocapture %b) #0 {
entry:
br label %for.body
for.body: ; preds = %entry, %for.body
%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
%arrayidx = getelementptr inbounds half, half addrspace(1)* %b, i64 %indvars.iv
%load = load half, half addrspace(1)* %arrayidx, align 4
%mul = fmul half %load, 3.0
%arrayidx2 = getelementptr inbounds half, half addrspace(1)* %a, i64 %indvars.iv
store half %mul, half addrspace(1)* %arrayidx2, align 4
%indvars.iv.next = add i64 %indvars.iv, 1
%lftr.wideiv = trunc i64 %indvars.iv.next to i32
%exitcond = icmp eq i32 %lftr.wideiv, 1024
br i1 %exitcond, label %for.end, label %for.body
for.end: ; preds = %for.body, %entry
ret void
}
attributes #0 = { nounwind }

View File

@ -1,2 +0,0 @@
if not 'AMDGPU' in config.root.targets:
config.unsupported = True

View File

@ -1,34 +0,0 @@
; RUN: opt -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s -loop-vectorize -dce -instcombine -S | FileCheck -check-prefix=GFX9 -check-prefix=GCN %s
; RUN: opt -mtriple=amdgcn-amd-amdhsa -mcpu=fiji < %s -loop-vectorize -dce -instcombine -S | FileCheck -check-prefix=CIVI -check-prefix=GCN %s
; RUN: opt -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii < %s -loop-vectorize -dce -instcombine -S | FileCheck -check-prefix=CIVI -check-prefix=GCN %s
; GCN-LABEL: @vectorize_v2f16_loop(
; GFX9: vector.body:
; GFX9: phi <2 x half>
; GFX9: load <2 x half>
; GFX9: fadd fast <2 x half>
; GFX9: middle.block:
; GFX9: fadd fast <2 x half>
; VI: phi half
; VI: phi load half
; VI: fadd fast half
define half @vectorize_v2f16_loop(half addrspace(1)* noalias %s) {
entry:
br label %for.body
for.body:
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
%q.04 = phi half [ 0.0, %entry ], [ %add, %for.body ]
%arrayidx = getelementptr inbounds half, half addrspace(1)* %s, i64 %indvars.iv
%0 = load half, half addrspace(1)* %arrayidx, align 2
%add = fadd fast half %q.04, %0
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, 256
br i1 %exitcond, label %for.end, label %for.body
for.end:
%add.lcssa = phi half [ %add, %for.body ]
ret half %add.lcssa
}

View File

@ -1,28 +0,0 @@
; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -mcpu=fiji -loop-vectorize < %s | FileCheck %s
; For AMDGPU, loop unroll in loop vectorizer is disabled when VF==1.
;
; CHECK-LABEL: @small_loop(
; CHECK: store i32
; CHECK-NOT: store i32
; CHECK: ret
define amdgpu_kernel void @small_loop(i32* nocapture %inArray, i32 %size) nounwind {
entry:
%0 = icmp sgt i32 %size, 0
br i1 %0, label %loop, label %exit
loop: ; preds = %entry, %loop
%iv = phi i32 [ %iv1, %loop ], [ 0, %entry ]
%1 = getelementptr inbounds i32, i32* %inArray, i32 %iv
%2 = load i32, i32* %1, align 4
%3 = add nsw i32 %2, 6
store i32 %3, i32* %1, align 4
%iv1 = add i32 %iv, 1
; %lftr.wideiv = trunc i64 %indvars.iv.next to i32
%cond = icmp eq i32 %iv1, %size
br i1 %cond, label %exit, label %loop
exit: ; preds = %loop, %entry
ret void
}