Imported Upstream version 5.18.0.167

Former-commit-id: 289509151e0fee68a1b591a20c9f109c3c789d3a
This commit is contained in:
Xamarin Public Jenkins (auto-signing)
2018-10-20 08:25:10 +00:00
parent e19d552987
commit b084638f15
28489 changed files with 184 additions and 3866856 deletions

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; RUN: opt < %s -loop-unswitch -disable-output
%struct.BLEND_MAP = type { i16, i16, i16, i32, %struct.BLEND_MAP_ENTRY* }
%struct.BLEND_MAP_ENTRY = type { float, i8, { [5 x float], [4 x i8] } }
%struct.TPATTERN = type { i16, i16, i16, i32, float, float, float, %struct.WARP*, %struct.TPATTERN*, %struct.BLEND_MAP*, { %struct.anon, [4 x i8] } }
%struct.TURB = type { i16, %struct.WARP*, [3 x double], i32, float, float }
%struct.WARP = type { i16, %struct.WARP* }
%struct.anon = type { float, [3 x double] }
define void @Parse_Pattern() {
entry:
br label %bb1096.outer20
bb671: ; preds = %cond_true1099
br label %bb1096.outer23
bb1096.outer20.loopexit: ; preds = %cond_true1099
%Local_Turb.0.ph24.lcssa = phi %struct.TURB* [ %Local_Turb.0.ph24, %cond_true1099 ] ; <%struct.TURB*> [#uses=1]
br label %bb1096.outer20
bb1096.outer20: ; preds = %bb1096.outer20.loopexit, %entry
%Local_Turb.0.ph22 = phi %struct.TURB* [ undef, %entry ], [ %Local_Turb.0.ph24.lcssa, %bb1096.outer20.loopexit ] ; <%struct.TURB*> [#uses=1]
%tmp1098 = icmp eq i32 0, 0 ; <i1> [#uses=1]
br label %bb1096.outer23
bb1096.outer23: ; preds = %bb1096.outer20, %bb671
%Local_Turb.0.ph24 = phi %struct.TURB* [ %Local_Turb.0.ph22, %bb1096.outer20 ], [ null, %bb671 ] ; <%struct.TURB*> [#uses=2]
br label %bb1096
bb1096: ; preds = %cond_true1099, %bb1096.outer23
br i1 %tmp1098, label %cond_true1099, label %bb1102
cond_true1099: ; preds = %bb1096
switch i32 0, label %bb1096.outer20.loopexit [
i32 161, label %bb671
i32 359, label %bb1096
]
bb1102: ; preds = %bb1096
%Local_Turb.0.ph24.lcssa1 = phi %struct.TURB* [ %Local_Turb.0.ph24, %bb1096 ] ; <%struct.TURB*> [#uses=0]
ret void
}

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; RUN: opt < %s -loop-unswitch -disable-output
define void @init_caller_save() {
entry:
br label %cond_true78
cond_next20: ; preds = %cond_true64
br label %bb31
bb31: ; preds = %cond_true64, %cond_true64, %cond_next20
%iftmp.29.1 = phi i32 [ 0, %cond_next20 ], [ 0, %cond_true64 ], [ 0, %cond_true64 ] ; <i32> [#uses=0]
br label %bb54
bb54: ; preds = %cond_true78, %bb31
br i1 false, label %bb75, label %cond_true64
cond_true64: ; preds = %bb54
switch i32 %i.0.0, label %cond_next20 [
i32 17, label %bb31
i32 18, label %bb31
]
bb75: ; preds = %bb54
%tmp74.0 = add i32 %i.0.0, 1 ; <i32> [#uses=1]
br label %cond_true78
cond_true78: ; preds = %bb75, %entry
%i.0.0 = phi i32 [ 0, %entry ], [ %tmp74.0, %bb75 ] ; <i32> [#uses=2]
br label %bb54
}

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; PR1333
; RUN: opt < %s -loop-unswitch -disable-output
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "i686-pc-linux-gnu"
%struct.ada__streams__root_stream_type = type { %struct.ada__tags__dispatch_table* }
%struct.ada__tags__dispatch_table = type { [1 x i8*] }
%struct.quotes__T173s = type { i8, %struct.quotes__T173s__T174s, [2 x [1 x double]], [2 x i16], i64, i8 }
%struct.quotes__T173s__T174s = type { i8, i8, i8, i16, i16, [2 x [1 x double]] }
define void @quotes__write_quote() {
entry:
%tmp606.i = icmp eq i32 0, 0 ; <i1> [#uses=1]
br label %bb
bb: ; preds = %cond_next73, %bb, %entry
br i1 false, label %bb51, label %bb
bb51: ; preds = %cond_next73, %bb
br i1 %tmp606.i, label %quotes__bid_ask_depth_offset_matrices__get_price.exit, label %cond_true.i
cond_true.i: ; preds = %bb51
unreachable
quotes__bid_ask_depth_offset_matrices__get_price.exit: ; preds = %bb51
br i1 false, label %cond_next73, label %cond_true72
cond_true72: ; preds = %quotes__bid_ask_depth_offset_matrices__get_price.exit
unreachable
cond_next73: ; preds = %quotes__bid_ask_depth_offset_matrices__get_price.exit
br i1 false, label %bb, label %bb51
}

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; RUN: opt < %s -loop-unswitch -disable-output
; PR1333
define void @pp_cxx_expression() {
entry:
%tmp6 = lshr i32 0, 24 ; <i32> [#uses=1]
br label %tailrecurse
tailrecurse: ; preds = %tailrecurse, %tailrecurse, %entry
switch i32 %tmp6, label %bb96 [
i32 24, label %bb10
i32 25, label %bb10
i32 28, label %bb10
i32 29, label %bb48
i32 31, label %bb48
i32 32, label %bb48
i32 33, label %bb48
i32 34, label %bb48
i32 36, label %bb15
i32 51, label %bb89
i32 52, label %bb89
i32 54, label %bb83
i32 57, label %bb59
i32 63, label %bb80
i32 64, label %bb80
i32 68, label %bb80
i32 169, label %bb75
i32 170, label %bb19
i32 171, label %bb63
i32 172, label %bb63
i32 173, label %bb67
i32 174, label %bb67
i32 175, label %bb19
i32 176, label %bb75
i32 178, label %bb59
i32 179, label %bb89
i32 180, label %bb59
i32 182, label %bb48
i32 183, label %bb48
i32 184, label %bb48
i32 185, label %bb48
i32 186, label %bb48
i32 195, label %bb48
i32 196, label %bb59
i32 197, label %bb89
i32 198, label %bb70
i32 199, label %bb59
i32 200, label %bb59
i32 201, label %bb59
i32 202, label %bb59
i32 203, label %bb75
i32 204, label %bb59
i32 205, label %tailrecurse
i32 210, label %tailrecurse
]
bb10: ; preds = %tailrecurse, %tailrecurse, %tailrecurse
ret void
bb15: ; preds = %tailrecurse
ret void
bb19: ; preds = %tailrecurse, %tailrecurse
ret void
bb48: ; preds = %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse
ret void
bb59: ; preds = %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse
ret void
bb63: ; preds = %tailrecurse, %tailrecurse
ret void
bb67: ; preds = %tailrecurse, %tailrecurse
ret void
bb70: ; preds = %tailrecurse
ret void
bb75: ; preds = %tailrecurse, %tailrecurse, %tailrecurse
ret void
bb80: ; preds = %tailrecurse, %tailrecurse, %tailrecurse
ret void
bb83: ; preds = %tailrecurse
ret void
bb89: ; preds = %tailrecurse, %tailrecurse, %tailrecurse, %tailrecurse
ret void
bb96: ; preds = %tailrecurse
ret void
}

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; RUN: opt < %s -loop-unswitch -instcombine -disable-output
@str3 = external constant [3 x i8] ; <[3 x i8]*> [#uses=1]
define i32 @stringSearch_Clib(i32 %count) {
entry:
%ttmp25 = icmp sgt i32 %count, 0 ; <i1> [#uses=1]
br i1 %ttmp25, label %bb36.preheader, label %bb44
bb36.preheader: ; preds = %entry
%ttmp33 = icmp slt i32 0, 250 ; <i1> [#uses=1]
br label %bb36.outer
bb36.outer: ; preds = %bb41, %bb36.preheader
br i1 %ttmp33, label %bb.nph, label %bb41
bb.nph: ; preds = %bb36.outer
%ttmp8 = icmp eq i8* null, null ; <i1> [#uses=1]
%ttmp6 = icmp eq i8* null, null ; <i1> [#uses=1]
%tmp31 = call i32 @strcspn( i8* null, i8* getelementptr ([3 x i8], [3 x i8]* @str3, i64 0, i64 0) ) ; <i32> [#uses=1]
br i1 %ttmp8, label %cond_next, label %cond_true
cond_true: ; preds = %bb.nph
ret i32 0
cond_next: ; preds = %bb.nph
br i1 %ttmp6, label %cond_next28, label %cond_true20
cond_true20: ; preds = %cond_next
ret i32 0
cond_next28: ; preds = %cond_next
%tmp33 = add i32 %tmp31, 0 ; <i32> [#uses=1]
br label %bb41
bb41: ; preds = %cond_next28, %bb36.outer
%c.2.lcssa = phi i32 [ 0, %bb36.outer ], [ %tmp33, %cond_next28 ] ; <i32> [#uses=1]
br i1 false, label %bb36.outer, label %bb44
bb44: ; preds = %bb41, %entry
%c.01.1 = phi i32 [ 0, %entry ], [ %c.2.lcssa, %bb41 ] ; <i32> [#uses=1]
ret i32 %c.01.1
}
declare i32 @strcspn(i8*, i8*)

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; RUN: opt < %s -loop-unswitch -disable-output
define i32 @main(i32 %argc, i8** %argv) {
entry:
%tmp1785365 = icmp ult i32 0, 100 ; <i1> [#uses=1]
br label %bb
bb: ; preds = %cond_true, %entry
br i1 false, label %cond_true, label %cond_next
cond_true: ; preds = %bb
br i1 %tmp1785365, label %bb, label %bb1788
cond_next: ; preds = %bb
%iftmp.1.0 = select i1 false, i32 0, i32 0 ; <i32> [#uses=1]
br i1 false, label %cond_true47, label %cond_next74
cond_true47: ; preds = %cond_next
%tmp53 = urem i32 %iftmp.1.0, 0 ; <i32> [#uses=0]
ret i32 0
cond_next74: ; preds = %cond_next
ret i32 0
bb1788: ; preds = %cond_true
ret i32 0
}

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@ -1,66 +0,0 @@
; RUN: opt < %s -loop-unswitch -disable-output
; PR1559
target triple = "i686-pc-linux-gnu"
%struct.re_pattern_buffer = type { i8*, i32, i32, i32, i8*, i8*, i32, i8 }
define fastcc i32 @byte_regex_compile(i8* %pattern, i32 %size, i32 %syntax, %struct.re_pattern_buffer* %bufp) {
entry:
br i1 false, label %bb147, label %cond_next123
cond_next123: ; preds = %entry
ret i32 0
bb147: ; preds = %entry
switch i32 0, label %normal_char [
i32 91, label %bb1734
i32 92, label %bb5700
]
bb1734: ; preds = %bb147
br label %bb1855.outer.outer
cond_true1831: ; preds = %bb1855.outer
br i1 %tmp1837, label %cond_next1844, label %cond_true1840
cond_true1840: ; preds = %cond_true1831
ret i32 0
cond_next1844: ; preds = %cond_true1831
br i1 false, label %bb1855.outer, label %cond_true1849
cond_true1849: ; preds = %cond_next1844
br label %bb1855.outer.outer
bb1855.outer.outer: ; preds = %cond_true1849, %bb1734
%b.10.ph.ph = phi i8* [ null, %cond_true1849 ], [ null, %bb1734 ] ; <i8*> [#uses=1]
br label %bb1855.outer
bb1855.outer: ; preds = %bb1855.outer.outer, %cond_next1844
%b.10.ph = phi i8* [ null, %cond_next1844 ], [ %b.10.ph.ph, %bb1855.outer.outer ] ; <i8*> [#uses=1]
%tmp1837 = icmp eq i8* null, null ; <i1> [#uses=2]
br i1 false, label %cond_true1831, label %cond_next1915
cond_next1915: ; preds = %cond_next1961, %bb1855.outer
store i8* null, i8** null
br i1 %tmp1837, label %cond_next1929, label %cond_true1923
cond_true1923: ; preds = %cond_next1915
ret i32 0
cond_next1929: ; preds = %cond_next1915
br i1 false, label %cond_next1961, label %cond_next2009
cond_next1961: ; preds = %cond_next1929
%tmp1992 = getelementptr i8, i8* %b.10.ph, i32 0 ; <i8*> [#uses=0]
br label %cond_next1915
cond_next2009: ; preds = %cond_next1929
ret i32 0
bb5700: ; preds = %bb147
ret i32 0
normal_char: ; preds = %bb147
ret i32 0
}

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; RUN: opt < %s -licm -loop-unswitch -disable-output
; PR 1589
%struct.QBasicAtomic = type { i32 }
define void @_ZNK5QDate9addMonthsEi(%struct.QBasicAtomic* sret %agg.result, %struct.QBasicAtomic* %this, i32 %nmonths) {
entry:
br label %cond_true90
bb16: ; preds = %cond_true90
br i1 false, label %bb93, label %cond_true90
bb45: ; preds = %cond_true90
br i1 false, label %bb53, label %bb58
bb53: ; preds = %bb45
br i1 false, label %bb93, label %cond_true90
bb58: ; preds = %bb45
store i32 0, i32* null, align 4
br i1 false, label %cond_true90, label %bb93
cond_true90: ; preds = %bb58, %bb53, %bb16, %entry
%nmonths_addr.016.1 = phi i32 [ %nmonths, %entry ], [ 0, %bb16 ], [ 0, %bb53 ], [ %nmonths_addr.016.1, %bb58 ] ; <i32> [#uses=2]
%tmp14 = icmp slt i32 %nmonths_addr.016.1, -11 ; <i1> [#uses=1]
br i1 %tmp14, label %bb16, label %bb45
bb93: ; preds = %bb58, %bb53, %bb16
ret void
}

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; RUN: opt < %s -loop-unswitch -instcombine -disable-output
%struct.ClassDef = type { %struct.QByteArray, %struct.QByteArray, %"struct.QList<ArgumentDef>", %"struct.QList<ArgumentDef>", i8, i8, %"struct.QList<ArgumentDef>", %"struct.QList<ArgumentDef>", %"struct.QList<ArgumentDef>", %"struct.QList<ArgumentDef>", %"struct.QList<ArgumentDef>", %"struct.QList<ArgumentDef>", %"struct.QMap<QByteArray,QByteArray>", %"struct.QList<ArgumentDef>", %"struct.QMap<QByteArray,QByteArray>", i32, i32 }
%struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] }
%struct.Generator = type { %struct.FILE*, %struct.ClassDef*, %"struct.QList<ArgumentDef>", %struct.QByteArray, %"struct.QList<ArgumentDef>" }
%struct.QBasicAtomic = type { i32 }
%struct.QByteArray = type { %"struct.QByteArray::Data"* }
%"struct.QByteArray::Data" = type { %struct.QBasicAtomic, i32, i32, i8*, [1 x i8] }
%"struct.QList<ArgumentDef>" = type { %"struct.QList<ArgumentDef>::._19" }
%"struct.QList<ArgumentDef>::._19" = type { %struct.QListData }
%struct.QListData = type { %"struct.QListData::Data"* }
%"struct.QListData::Data" = type { %struct.QBasicAtomic, i32, i32, i32, i8, [1 x i8*] }
%"struct.QMap<QByteArray,QByteArray>" = type { %"struct.QMap<QByteArray,QByteArray>::._56" }
%"struct.QMap<QByteArray,QByteArray>::._56" = type { %struct.QMapData* }
%struct.QMapData = type { %struct.QMapData*, [12 x %struct.QMapData*], %struct.QBasicAtomic, i32, i32, i32, i8 }
%struct._IO_marker = type { %struct._IO_marker*, %struct.FILE*, i32 }
@.str9 = external constant [1 x i8] ; <[1 x i8]*> [#uses=1]
declare i32 @strcmp(i8*, i8*)
define i32 @_ZN9Generator6strregEPKc(%struct.Generator* %this, i8* %s) {
entry:
%s_addr.0 = select i1 false, i8* getelementptr ([1 x i8], [1 x i8]* @.str9, i32 0, i32 0), i8* %s ; <i8*> [#uses=2]
%tmp122 = icmp eq i8* %s_addr.0, null ; <i1> [#uses=1]
br label %bb184
bb55: ; preds = %bb184
ret i32 0
bb88: ; preds = %bb184
br i1 %tmp122, label %bb154, label %bb128
bb128: ; preds = %bb88
%tmp138 = call i32 @strcmp( i8* null, i8* %s_addr.0 ) ; <i32> [#uses=1]
%iftmp.37.0.in4 = icmp eq i32 %tmp138, 0 ; <i1> [#uses=1]
br i1 %iftmp.37.0.in4, label %bb250, label %bb166
bb154: ; preds = %bb88
br i1 false, label %bb250, label %bb166
bb166: ; preds = %bb154, %bb128
%tmp175 = add i32 %idx.0, 1 ; <i32> [#uses=1]
%tmp177 = add i32 %tmp175, 0 ; <i32> [#uses=1]
%tmp181 = add i32 %tmp177, 0 ; <i32> [#uses=1]
%tmp183 = add i32 %i33.0, 1 ; <i32> [#uses=1]
br label %bb184
bb184: ; preds = %bb166, %entry
%i33.0 = phi i32 [ 0, %entry ], [ %tmp183, %bb166 ] ; <i32> [#uses=2]
%idx.0 = phi i32 [ 0, %entry ], [ %tmp181, %bb166 ] ; <i32> [#uses=2]
%tmp49 = icmp slt i32 %i33.0, 0 ; <i1> [#uses=1]
br i1 %tmp49, label %bb88, label %bb55
bb250: ; preds = %bb154, %bb128
ret i32 %idx.0
}

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@ -1,29 +0,0 @@
; RUN: opt < %s -licm -loop-unroll -disable-output
@resonant = external global i32 ; <i32*> [#uses=2]
define void @weightadj() {
entry:
br label %bb
bb: ; preds = %bb158, %entry
store i32 0, i32* @resonant, align 4
br i1 false, label %g.exit, label %bb158
g.exit: ; preds = %bb68, %bb
br i1 false, label %bb68, label %cond_true
cond_true: ; preds = %g.exit
store i32 1, i32* @resonant, align 4
br label %bb68
bb68: ; preds = %cond_true, %g.exit
%tmp71 = icmp slt i32 0, 0 ; <i1> [#uses=1]
br i1 %tmp71, label %g.exit, label %bb158
bb158: ; preds = %bb68, %bb
br i1 false, label %bb, label %return
return: ; preds = %bb158
ret void
}

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@ -1,26 +0,0 @@
; RUN: opt < %s -loop-unswitch -instcombine -gvn -disable-output
; PR2372
target triple = "i386-pc-linux-gnu"
define i32 @func_3(i16 signext %p_5, i16 signext %p_6) nounwind {
entry:
%tmp3 = icmp eq i16 %p_5, 0 ; <i1> [#uses=1]
%tmp1314 = sext i16 %p_6 to i32 ; <i32> [#uses=1]
%tmp28 = icmp ugt i32 %tmp1314, 3 ; <i1> [#uses=1]
%bothcond = or i1 %tmp28, false ; <i1> [#uses=1]
br label %bb
bb: ; preds = %bb54, %entry
br i1 %tmp3, label %bb54, label %bb5
bb5: ; preds = %bb
br i1 %bothcond, label %bb54, label %bb31
bb31: ; preds = %bb5
br label %bb54
bb54: ; preds = %bb31, %bb5, %bb
br i1 false, label %bb64, label %bb
bb64: ; preds = %bb54
%tmp6566 = sext i16 %p_6 to i32 ; <i32> [#uses=1]
%tmp68 = tail call i32 (...) @func_18( i32 1, i32 %tmp6566, i32 1 ) nounwind ; <i32> [#uses=0]
ret i32 undef
}
declare i32 @func_18(...)

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@ -1,22 +0,0 @@
; RUN: opt < %s -licm -loop-unswitch -disable-output
@g_56 = external global i16 ; <i16*> [#uses=2]
define i32 @func_67(i32 %p_68, i8 signext %p_69, i8 signext %p_71) nounwind {
entry:
br label %bb
bb: ; preds = %bb44, %entry
br label %bb3
bb3: ; preds = %bb36, %bb
%bothcond = or i1 false, false ; <i1> [#uses=1]
br i1 %bothcond, label %bb29, label %bb19
bb19: ; preds = %bb3
br i1 false, label %bb36, label %bb29
bb29: ; preds = %bb19, %bb3
ret i32 0
bb36: ; preds = %bb19
store i16 0, i16* @g_56, align 2
br i1 false, label %bb44, label %bb3
bb44: ; preds = %bb44, %bb36
%tmp46 = load i16, i16* @g_56, align 2 ; <i16> [#uses=0]
br i1 false, label %bb, label %bb44
}

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@ -1,37 +0,0 @@
; REQUIRES: asserts
; RUN: opt < %s -loop-unswitch -stats -disable-output 2>&1 | grep "1 loop-unswitch - Number of branches unswitched" | count 1
; PR 3170
define i32 @a(i32 %x, i32 %y) nounwind {
entry:
%0 = icmp ult i32 0, %y ; <i1> [#uses=1]
br i1 %0, label %bb.nph, label %bb4
bb.nph: ; preds = %entry
%1 = icmp eq i32 %x, 0 ; <i1> [#uses=1]
br label %bb
bb: ; preds = %bb.nph, %bb3
%i.01 = phi i32 [ %3, %bb3 ], [ 0, %bb.nph ] ; <i32> [#uses=1]
br i1 %1, label %bb2, label %bb1
bb1: ; preds = %bb
%2 = tail call i32 (...) @b() nounwind ; <i32> [#uses=0]
br label %bb2
bb2: ; preds = %bb, %bb1
%3 = add i32 %i.01, 1 ; <i32> [#uses=2]
br label %bb3
bb3: ; preds = %bb2
%i.0 = phi i32 [ %3, %bb2 ] ; <i32> [#uses=1]
%4 = icmp ult i32 %i.0, %y ; <i1> [#uses=1]
br i1 %4, label %bb, label %bb3.bb4_crit_edge
bb3.bb4_crit_edge: ; preds = %bb3
br label %bb4
bb4: ; preds = %bb3.bb4_crit_edge, %entry
ret i32 0
}
declare i32 @b(...)

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@ -1,28 +0,0 @@
; RUN: opt < %s -loop-unswitch
; PR8622
@g_38 = external global i32, align 4
define void @func_67(i32 %p_68.coerce) nounwind {
entry:
br i1 true, label %for.end12, label %bb.nph
bb.nph: ; preds = %entry
%g_38.promoted = load i32, i32* @g_38
br label %for.body
for.body: ; preds = %for.cond, %bb.nph
%tobool.i = icmp eq i32 %p_68.coerce, 1
%xor4.i = xor i32 %p_68.coerce, 1
%call1 = select i1 %tobool.i, i32 0, i32 %xor4.i
br label %for.cond
for.cond: ; preds = %for.body
br i1 true, label %for.cond.for.end12_crit_edge, label %for.body
for.cond.for.end12_crit_edge: ; preds = %for.cond
store i32 %call1, i32* @g_38
br label %for.end12
for.end12: ; preds = %for.cond.for.end12_crit_edge, %entry
ret void
}

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@ -1,28 +0,0 @@
; RUN: opt -loop-unswitch -disable-output < %s
; PR10031
define i32 @test(i32 %command) {
entry:
br label %tailrecurse
tailrecurse: ; preds = %if.then14, %tailrecurse, %entry
br i1 undef, label %if.then, label %tailrecurse
if.then: ; preds = %tailrecurse
switch i32 %command, label %sw.bb [
i32 2, label %land.lhs.true
i32 0, label %land.lhs.true
]
land.lhs.true: ; preds = %if.then, %if.then
br i1 undef, label %sw.bb, label %if.then14
if.then14: ; preds = %land.lhs.true
switch i32 %command, label %tailrecurse [
i32 0, label %sw.bb
i32 1, label %sw.bb
]
sw.bb: ; preds = %if.then14
unreachable
}

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@ -1,63 +0,0 @@
; RUN: opt < %s -sroa -loop-unswitch -disable-output
; PR11016
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-macosx10.7.2"
%class.MyContainer.1.3.19.29 = type { [6 x %class.MyMemVarClass.0.2.18.28*] }
%class.MyMemVarClass.0.2.18.28 = type { i32 }
define void @_ZN11MyContainer1fEi(%class.MyContainer.1.3.19.29* %this, i32 %doit) uwtable ssp align 2 personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
entry:
br label %for.cond
for.cond: ; preds = %for.inc, %entry
%inc1 = phi i32 [ %inc, %for.inc ], [ 0, %entry ]
%conv = sext i32 %inc1 to i64
%cmp = icmp ult i64 %conv, 6
br i1 %cmp, label %for.body, label %for.end
for.body: ; preds = %for.cond
%tobool = icmp ne i32 %doit, 0
br i1 %tobool, label %for.inc, label %if.then
if.then: ; preds = %for.body
%idxprom = sext i32 %inc1 to i64
%array_ = getelementptr inbounds %class.MyContainer.1.3.19.29, %class.MyContainer.1.3.19.29* %this, i32 0, i32 0
%arrayidx = getelementptr inbounds [6 x %class.MyMemVarClass.0.2.18.28*], [6 x %class.MyMemVarClass.0.2.18.28*]* %array_, i32 0, i64 %idxprom
%tmp4 = load %class.MyMemVarClass.0.2.18.28*, %class.MyMemVarClass.0.2.18.28** %arrayidx, align 8
%isnull = icmp eq %class.MyMemVarClass.0.2.18.28* %tmp4, null
br i1 %isnull, label %for.inc, label %delete.notnull
delete.notnull: ; preds = %if.then
invoke void @_ZN13MyMemVarClassD1Ev(%class.MyMemVarClass.0.2.18.28* %tmp4)
to label %invoke.cont unwind label %lpad
invoke.cont: ; preds = %delete.notnull
%0 = bitcast %class.MyMemVarClass.0.2.18.28* %tmp4 to i8*
call void @_ZdlPv(i8* %0) nounwind
br label %for.inc
lpad: ; preds = %delete.notnull
%1 = landingpad { i8*, i32 }
cleanup
%2 = extractvalue { i8*, i32 } %1, 0
%3 = extractvalue { i8*, i32 } %1, 1
%4 = bitcast %class.MyMemVarClass.0.2.18.28* %tmp4 to i8*
call void @_ZdlPv(i8* %4) nounwind
%lpad.val = insertvalue { i8*, i32 } undef, i8* %2, 0
%lpad.val7 = insertvalue { i8*, i32 } %lpad.val, i32 %3, 1
resume { i8*, i32 } %lpad.val7
for.inc: ; preds = %invoke.cont, %if.then, %for.body
%inc = add nsw i32 %inc1, 1
br label %for.cond
for.end: ; preds = %for.cond
ret void
}
declare void @_ZN13MyMemVarClassD1Ev(%class.MyMemVarClass.0.2.18.28*)
declare i32 @__gxx_personality_v0(...)
declare void @_ZdlPv(i8*) nounwind

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@ -1,94 +0,0 @@
; REQUIRES: asserts
; RUN: opt -loop-unswitch -disable-output -stats -info-output-file - < %s | FileCheck --check-prefix=STATS %s
; RUN: opt -S -loop-unswitch -verify-loop-info -verify-dom-info < %s | FileCheck %s
; STATS: 2 loop-unswitch - Number of switches unswitched
; CHECK: %1 = icmp eq i32 %c, 1
; CHECK-NEXT: br i1 %1, label %.split.us, label %..split_crit_edge
; CHECK: ..split_crit_edge: ; preds = %0
; CHECK-NEXT: br label %.split
; CHECK: .split.us: ; preds = %0
; CHECK-NEXT: br label %loop_begin.us
; CHECK: loop_begin.us: ; preds = %loop_begin.backedge.us, %.split.us
; CHECK-NEXT: %var_val.us = load i32, i32* %var
; CHECK-NEXT: switch i32 1, label %default.us-lcssa.us [
; CHECK-NEXT: i32 1, label %inc.us
; CHECK: inc.us: ; preds = %loop_begin.us
; CHECK-NEXT: call void @incf() [[NOR_NUW:#[0-9]+]]
; CHECK-NEXT: br label %loop_begin.backedge.us
; CHECK: .split: ; preds = %..split_crit_edge
; CHECK-NEXT: %2 = icmp eq i32 %c, 2
; CHECK-NEXT: br i1 %2, label %.split.split.us, label %.split..split.split_crit_edge
; CHECK: .split..split.split_crit_edge: ; preds = %.split
; CHECK-NEXT: br label %.split.split
; CHECK: .split.split.us: ; preds = %.split
; CHECK-NEXT: br label %loop_begin.us1
; CHECK: loop_begin.us1: ; preds = %loop_begin.backedge.us5, %.split.split.us
; CHECK-NEXT: %var_val.us2 = load i32, i32* %var
; CHECK-NEXT: switch i32 2, label %default.us-lcssa.us-lcssa.us [
; CHECK-NEXT: i32 1, label %inc.us4
; CHECK-NEXT: i32 2, label %dec.us3
; CHECK-NEXT: ]
; CHECK: dec.us3: ; preds = %loop_begin.us1
; CHECK-NEXT: call void @decf() [[NOR_NUW]]
; CHECK-NEXT: br label %loop_begin.backedge.us5
; CHECK: .split.split: ; preds = %.split..split.split_crit_edge
; CHECK-NEXT: br label %loop_begin
; CHECK: loop_begin: ; preds = %loop_begin.backedge, %.split.split
; CHECK-NEXT: %var_val = load i32, i32* %var
; CHECK-NEXT: switch i32 %c, label %default.us-lcssa.us-lcssa [
; CHECK-NEXT: i32 1, label %inc
; CHECK-NEXT: i32 2, label %dec
; CHECK-NEXT: ]
; CHECK: inc: ; preds = %loop_begin
; CHECK-NEXT: br i1 true, label %us-unreachable.us-lcssa, label %inc.split
; CHECK: dec: ; preds = %loop_begin
; CHECK-NEXT: br i1 true, label %us-unreachable6, label %dec.split
define i32 @test(i32* %var) {
%mem = alloca i32
store i32 2, i32* %mem
%c = load i32, i32* %mem
br label %loop_begin
loop_begin:
%var_val = load i32, i32* %var
switch i32 %c, label %default [
i32 1, label %inc
i32 2, label %dec
]
inc:
call void @incf() noreturn nounwind
br label %loop_begin
dec:
call void @decf() noreturn nounwind
br label %loop_begin
default:
br label %loop_exit
loop_exit:
ret i32 0
}
declare void @incf() noreturn
declare void @decf() noreturn
; CHECK: attributes #0 = { noreturn }
; CHECK: attributes [[NOR_NUW]] = { noreturn nounwind }

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@ -1,87 +0,0 @@
; REQUIRES: asserts
; RUN: opt -loop-unswitch -loop-unswitch-threshold 13 -disable-output -stats -info-output-file - < %s | FileCheck --check-prefix=STATS %s
; RUN: opt -S -loop-unswitch -loop-unswitch-threshold 13 -verify-loop-info -verify-dom-info < %s | FileCheck %s
; STATS: 1 loop-unswitch - Number of switches unswitched
; ModuleID = '../llvm/test/Transforms/LoopUnswitch/2011-11-18-TwoSwitches.ll'
; CHECK: %1 = icmp eq i32 %c, 1
; CHECK-NEXT: br i1 %1, label %.split.us, label %..split_crit_edge
; CHECK: ..split_crit_edge: ; preds = %0
; CHECK-NEXT: br label %.split
; CHECK: .split.us: ; preds = %0
; CHECK-NEXT: br label %loop_begin.us
; CHECK: loop_begin.us: ; preds = %loop_begin.backedge.us, %.split.us
; CHECK: switch i32 1, label %second_switch.us [
; CHECK-NEXT: i32 1, label %inc.us
; CHECK: second_switch.us: ; preds = %loop_begin.us
; CHECK-NEXT: switch i32 %d, label %default.us [
; CHECK-NEXT: i32 1, label %inc.us
; CHECK-NEXT: ]
; CHECK: inc.us: ; preds = %second_switch.us, %loop_begin.us
; CHECK-NEXT: call void @incf() [[NOR_NUW:#[0-9]+]]
; CHECK-NEXT: br label %loop_begin.backedge.us
; CHECK: .split: ; preds = %..split_crit_edge
; CHECK-NEXT: br label %loop_begin
; CHECK: loop_begin: ; preds = %loop_begin.backedge, %.split
; CHECK: switch i32 %c, label %second_switch [
; CHECK-NEXT: i32 1, label %loop_begin.inc_crit_edge
; CHECK-NEXT: ]
; CHECK: loop_begin.inc_crit_edge: ; preds = %loop_begin
; CHECK-NEXT: br i1 true, label %us-unreachable, label %inc
; CHECK: second_switch: ; preds = %loop_begin
; CHECK-NEXT: switch i32 %d, label %default [
; CHECK-NEXT: i32 1, label %inc
; CHECK-NEXT: ]
; CHECK: inc: ; preds = %loop_begin.inc_crit_edge, %second_switch
; CHECK-NEXT: call void @incf() [[NOR_NUW]]
; CHECK-NEXT: br label %loop_begin.backedge
define i32 @test(i32* %var) {
%mem = alloca i32
store i32 2, i32* %mem
%c = load i32, i32* %mem
%d = load i32, i32* %mem
br label %loop_begin
loop_begin:
%var_val = load i32, i32* %var
switch i32 %c, label %second_switch [
i32 1, label %inc
]
second_switch:
switch i32 %d, label %default [
i32 1, label %inc
]
inc:
call void @incf() noreturn nounwind
br label %loop_begin
default:
br label %loop_begin
loop_exit:
ret i32 0
}
declare void @incf() noreturn
declare void @decf() noreturn
; CHECK: attributes #0 = { noreturn }
; CHECK: attributes [[NOR_NUW]] = { noreturn nounwind }

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@ -1,141 +0,0 @@
; REQUIRES: asserts
; RUN: opt -loop-unswitch -loop-unswitch-threshold 1000 -disable-output -stats -info-output-file - < %s | FileCheck --check-prefix=STATS %s
; RUN: opt -S -loop-unswitch -loop-unswitch-threshold 1000 -verify-loop-info -verify-dom-info < %s | FileCheck %s
; STATS: 3 loop-unswitch - Number of switches unswitched
; CHECK: %1 = icmp eq i32 %c, 1
; CHECK-NEXT: br i1 %1, label %.split.us, label %..split_crit_edge
; CHECK: ..split_crit_edge: ; preds = %0
; CHECK-NEXT: br label %.split
; CHECK: .split.us: ; preds = %0
; CHECK-NEXT: %2 = icmp eq i32 %d, 1
; CHECK-NEXT: br i1 %2, label %.split.us.split.us, label %.split.us..split.us.split_crit_edge
; CHECK: .split.us..split.us.split_crit_edge: ; preds = %.split.us
; CHECK-NEXT: br label %.split.us.split
; CHECK: .split.us.split.us: ; preds = %.split.us
; CHECK-NEXT: br label %loop_begin.us.us
; CHECK: loop_begin.us.us: ; preds = %loop_begin.backedge.us.us, %.split.us.split.us
; CHECK-NEXT: %var_val.us.us = load i32, i32* %var
; CHECK-NEXT: switch i32 1, label %second_switch.us.us [
; CHECK-NEXT: i32 1, label %inc.us.us
; CHECK: second_switch.us.us: ; preds = %loop_begin.us.us
; CHECK-NEXT: switch i32 1, label %default.us.us [
; CHECK-NEXT: i32 1, label %inc.us.us
; CHECK: inc.us.us: ; preds = %second_switch.us.us, %loop_begin.us.us
; CHECK-NEXT: call void @incf() [[NOR_NUW:#[0-9]+]]
; CHECK-NEXT: br label %loop_begin.backedge.us.us
; CHECK: .split.us.split: ; preds = %.split.us..split.us.split_crit_edge
; CHECK-NEXT: br label %loop_begin.us
; CHECK: loop_begin.us: ; preds = %loop_begin.backedge.us, %.split.us.split
; CHECK-NEXT: %var_val.us = load i32, i32* %var
; CHECK-NEXT: switch i32 1, label %second_switch.us [
; CHECK-NEXT: i32 1, label %inc.us
; CHECK: second_switch.us: ; preds = %loop_begin.us
; CHECK-NEXT: switch i32 %d, label %default.us [
; CHECK-NEXT: i32 1, label %second_switch.us.inc.us_crit_edge
; CHECK-NEXT: ]
; CHECK: second_switch.us.inc.us_crit_edge: ; preds = %second_switch.us
; CHECK-NEXT: br i1 true, label %us-unreachable8, label %inc.us
; CHECK: inc.us: ; preds = %second_switch.us.inc.us_crit_edge, %loop_begin.us
; CHECK-NEXT: call void @incf() [[NOR_NUW]]
; CHECK-NEXT: br label %loop_begin.backedge.us
; CHECK: .split: ; preds = %..split_crit_edge
; CHECK-NEXT: %3 = icmp eq i32 %d, 1
; CHECK-NEXT: br i1 %3, label %.split.split.us, label %.split..split.split_crit_edge
; CHECK: .split..split.split_crit_edge: ; preds = %.split
; CHECK-NEXT: br label %.split.split
; CHECK: .split.split.us: ; preds = %.split
; CHECK-NEXT: br label %loop_begin.us1
; CHECK: loop_begin.us1: ; preds = %loop_begin.backedge.us6, %.split.split.us
; CHECK-NEXT: %var_val.us2 = load i32, i32* %var
; CHECK-NEXT: switch i32 %c, label %second_switch.us3 [
; CHECK-NEXT: i32 1, label %loop_begin.inc_crit_edge.us
; CHECK-NEXT: ]
; CHECK: second_switch.us3: ; preds = %loop_begin.us1
; CHECK-NEXT: switch i32 1, label %default.us5 [
; CHECK-NEXT: i32 1, label %inc.us4
; CHECK-NEXT: ]
; CHECK: inc.us4: ; preds = %loop_begin.inc_crit_edge.us, %second_switch.us3
; CHECK-NEXT: call void @incf() [[NOR_NUW]]
; CHECK-NEXT: br label %loop_begin.backedge.us6
; CHECK: loop_begin.inc_crit_edge.us: ; preds = %loop_begin.us1
; CHECK-NEXT: br i1 true, label %us-unreachable.us-lcssa.us, label %inc.us4
; CHECK: .split.split: ; preds = %.split..split.split_crit_edge
; CHECK-NEXT: br label %loop_begin
; CHECK: loop_begin: ; preds = %loop_begin.backedge, %.split.split
; CHECK-NEXT: %var_val = load i32, i32* %var
; CHECK-NEXT: switch i32 %c, label %second_switch [
; CHECK-NEXT: i32 1, label %loop_begin.inc_crit_edge
; CHECK-NEXT: ]
; CHECK: loop_begin.inc_crit_edge: ; preds = %loop_begin
; CHECK-NEXT: br i1 true, label %us-unreachable.us-lcssa, label %inc
; CHECK: second_switch: ; preds = %loop_begin
; CHECK-NEXT: switch i32 %d, label %default [
; CHECK-NEXT: i32 1, label %second_switch.inc_crit_edge
; CHECK-NEXT: ]
; CHECK: second_switch.inc_crit_edge: ; preds = %second_switch
; CHECK-NEXT: br i1 true, label %us-unreachable7, label %inc
define i32 @test(i32* %var) {
%mem = alloca i32
store i32 2, i32* %mem
%c = load i32, i32* %mem
%d = load i32, i32* %mem
br label %loop_begin
loop_begin:
%var_val = load i32, i32* %var
switch i32 %c, label %second_switch [
i32 1, label %inc
]
second_switch:
switch i32 %d, label %default [
i32 1, label %inc
]
inc:
call void @incf() noreturn nounwind
br label %loop_begin
default:
br label %loop_begin
loop_exit:
ret i32 0
}
declare void @incf() noreturn
declare void @decf() noreturn
; CHECK: attributes #0 = { noreturn }
; CHECK: attributes [[NOR_NUW]] = { noreturn nounwind }

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@ -1,41 +0,0 @@
; RUN: opt < %s -S -loop-unswitch -verify-loop-info -verify-dom-info | FileCheck %s
; PR12343: -loop-unswitch crash on indirect branch
; CHECK: %0 = icmp eq i64 undef, 0
; CHECK-NEXT: br i1 %0, label %"5", label %"4"
; CHECK: "5": ; preds = %entry
; CHECK-NEXT: br label %"16"
; CHECK: "16": ; preds = %"22", %"5"
; CHECK-NEXT: indirectbr i8* undef, [label %"22", label %"33"]
; CHECK: "22": ; preds = %"16"
; CHECK-NEXT: br i1 %0, label %"16", label %"26"
; CHECK: "26": ; preds = %"22"
; CHECK-NEXT: unreachable
define void @foo() {
entry:
%0 = icmp eq i64 undef, 0
br i1 %0, label %"5", label %"4"
"4": ; preds = %entry
unreachable
"5": ; preds = %entry
br label %"16"
"16": ; preds = %"22", %"5"
indirectbr i8* undef, [label %"22", label %"33"]
"22": ; preds = %"16"
br i1 %0, label %"16", label %"26"
"26": ; preds = %"22"
unreachable
"33": ; preds = %"16"
unreachable
}

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