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external/llvm/test/Transforms/InstCombine/assume2.ll
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external/llvm/test/Transforms/InstCombine/assume2.ll
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@ -1,159 +0,0 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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declare void @llvm.assume(i1) #1
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define i32 @test1(i32 %a) #0 {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[A:%.*]], 15
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 5
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: ret i32 5
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;
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%and = and i32 %a, 15
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%cmp = icmp eq i32 %and, 5
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tail call void @llvm.assume(i1 %cmp)
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%and1 = and i32 %a, 7
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ret i32 %and1
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}
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define i32 @test2(i32 %a) #0 {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[A:%.*]], 15
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 10
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: ret i32 2
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;
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%and = and i32 %a, 15
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%nand = xor i32 %and, -1
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%cmp = icmp eq i32 %nand, 4294967285
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tail call void @llvm.assume(i1 %cmp)
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%and1 = and i32 %a, 7
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ret i32 %and1
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}
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define i32 @test3(i32 %a) #0 {
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; CHECK-LABEL: @test3(
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; CHECK-NEXT: [[V:%.*]] = or i32 [[A:%.*]], -16
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[V]], -11
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: ret i32 5
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;
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%v = or i32 %a, 4294967280
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%cmp = icmp eq i32 %v, 4294967285
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tail call void @llvm.assume(i1 %cmp)
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%and1 = and i32 %a, 7
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ret i32 %and1
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}
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define i32 @test4(i32 %a) #0 {
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: [[V:%.*]] = or i32 [[A:%.*]], -16
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[V]], -6
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: ret i32 2
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;
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%v = or i32 %a, 4294967280
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%nv = xor i32 %v, -1
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%cmp = icmp eq i32 %nv, 5
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tail call void @llvm.assume(i1 %cmp)
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%and1 = and i32 %a, 7
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ret i32 %and1
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}
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define i32 @test5(i32 %a) #0 {
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; CHECK-LABEL: @test5(
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A:%.*]], 4
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: ret i32 4
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;
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%v = xor i32 %a, 1
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%cmp = icmp eq i32 %v, 5
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tail call void @llvm.assume(i1 %cmp)
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%and1 = and i32 %a, 7
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ret i32 %and1
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}
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define i32 @test6(i32 %a) #0 {
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; CHECK-LABEL: @test6(
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; CHECK-NEXT: [[V_MASK:%.*]] = and i32 [[A:%.*]], 1073741823
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[V_MASK]], 5
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: ret i32 5
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;
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%v = shl i32 %a, 2
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%cmp = icmp eq i32 %v, 20
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tail call void @llvm.assume(i1 %cmp)
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%and1 = and i32 %a, 63
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ret i32 %and1
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}
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define i32 @test7(i32 %a) #0 {
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; CHECK-LABEL: @test7(
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; CHECK-NEXT: [[V_MASK:%.*]] = and i32 [[A:%.*]], -4
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[V_MASK]], 20
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: ret i32 20
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;
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%v = lshr i32 %a, 2
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%cmp = icmp eq i32 %v, 5
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tail call void @llvm.assume(i1 %cmp)
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%and1 = and i32 %a, 252
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ret i32 %and1
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}
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define i32 @test8(i32 %a) #0 {
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; CHECK-LABEL: @test8(
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; CHECK-NEXT: [[V_MASK:%.*]] = and i32 [[A:%.*]], -4
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[V_MASK]], 20
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: ret i32 20
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;
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%v = lshr i32 %a, 2
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%cmp = icmp eq i32 %v, 5
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tail call void @llvm.assume(i1 %cmp)
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%and1 = and i32 %a, 252
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ret i32 %and1
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}
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define i32 @test9(i32 %a) #0 {
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; CHECK-LABEL: @test9(
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A:%.*]], 5
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: ret i32 0
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;
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%cmp = icmp sgt i32 %a, 5
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tail call void @llvm.assume(i1 %cmp)
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%and1 = and i32 %a, 2147483648
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ret i32 %and1
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}
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define i32 @test10(i32 %a) #0 {
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; CHECK-LABEL: @test10(
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A:%.*]], -1
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: ret i32 -2147483648
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;
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%cmp = icmp sle i32 %a, -2
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tail call void @llvm.assume(i1 %cmp)
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%and1 = and i32 %a, 2147483648
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ret i32 %and1
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}
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define i32 @test11(i32 %a) #0 {
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; CHECK-LABEL: @test11(
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[A:%.*]], 257
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: ret i32 0
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;
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%cmp = icmp ule i32 %a, 256
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tail call void @llvm.assume(i1 %cmp)
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%and1 = and i32 %a, 3072
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ret i32 %and1
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}
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attributes #0 = { nounwind uwtable }
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attributes #1 = { nounwind }
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