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Imported Upstream version 5.18.0.167
Former-commit-id: 289509151e0fee68a1b591a20c9f109c3c789d3a
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@ -1,65 +0,0 @@
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; RUN: opt -S -instcombine < %s | FileCheck %s
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define <4 x i32> @mulByZero(<4 x i16> %x) nounwind readnone ssp {
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entry:
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%a = tail call <4 x i32> @llvm.arm.neon.vmulls.v4i32(<4 x i16> %x, <4 x i16> zeroinitializer) nounwind
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ret <4 x i32> %a
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; CHECK: entry:
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; CHECK-NEXT: ret <4 x i32> zeroinitializer
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}
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define <4 x i32> @mulByOne(<4 x i16> %x) nounwind readnone ssp {
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entry:
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%a = tail call <4 x i32> @llvm.arm.neon.vmulls.v4i32(<4 x i16> %x, <4 x i16> <i16 1, i16 1, i16 1, i16 1>) nounwind
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ret <4 x i32> %a
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; CHECK: entry:
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; CHECK-NEXT: %a = sext <4 x i16> %x to <4 x i32>
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; CHECK-NEXT: ret <4 x i32> %a
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}
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define <4 x i32> @constantMul() nounwind readnone ssp {
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entry:
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%a = tail call <4 x i32> @llvm.arm.neon.vmulls.v4i32(<4 x i16> <i16 3, i16 3, i16 3, i16 3>, <4 x i16> <i16 2, i16 2, i16 2, i16 2>) nounwind
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ret <4 x i32> %a
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; CHECK: entry:
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; CHECK-NEXT: ret <4 x i32> <i32 6, i32 6, i32 6, i32 6>
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}
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define <4 x i32> @constantMulS() nounwind readnone ssp {
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entry:
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%b = tail call <4 x i32> @llvm.arm.neon.vmulls.v4i32(<4 x i16> <i16 -1, i16 -1, i16 -1, i16 -1>, <4 x i16> <i16 1, i16 1, i16 1, i16 1>) nounwind
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ret <4 x i32> %b
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; CHECK: entry:
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; CHECK-NEXT: ret <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>
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}
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define <4 x i32> @constantMulU() nounwind readnone ssp {
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entry:
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%b = tail call <4 x i32> @llvm.arm.neon.vmullu.v4i32(<4 x i16> <i16 -1, i16 -1, i16 -1, i16 -1>, <4 x i16> <i16 1, i16 1, i16 1, i16 1>) nounwind
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ret <4 x i32> %b
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; CHECK: entry:
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; CHECK-NEXT: ret <4 x i32> <i32 65535, i32 65535, i32 65535, i32 65535>
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}
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define <4 x i32> @complex1(<4 x i16> %x) nounwind readnone ssp {
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entry:
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%a = tail call <4 x i32> @llvm.arm.neon.vmulls.v4i32(<4 x i16> <i16 2, i16 2, i16 2, i16 2>, <4 x i16> %x) nounwind
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%b = add <4 x i32> zeroinitializer, %a
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ret <4 x i32> %b
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; CHECK: entry:
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; CHECK-NEXT: %a = tail call <4 x i32> @llvm.arm.neon.vmulls.v4i32(<4 x i16> <i16 2, i16 2, i16 2, i16 2>, <4 x i16> %x) [[NUW:#[0-9]+]]
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; CHECK-NEXT: ret <4 x i32> %a
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}
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define <4 x i32> @complex2(<4 x i32> %x) nounwind readnone ssp {
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entry:
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%a = tail call <4 x i32> @llvm.arm.neon.vmulls.v4i32(<4 x i16> <i16 3, i16 3, i16 3, i16 3>, <4 x i16> <i16 2, i16 2, i16 2, i16 2>) nounwind
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%b = add <4 x i32> %x, %a
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ret <4 x i32> %b
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; CHECK: entry:
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; CHECK-NEXT: %b = add <4 x i32> %x, <i32 6, i32 6, i32 6, i32 6>
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; CHECK-NEXT: ret <4 x i32> %b
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}
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declare <4 x i32> @llvm.arm.neon.vmulls.v4i32(<4 x i16>, <4 x i16>) nounwind readnone
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declare <4 x i32> @llvm.arm.neon.vmullu.v4i32(<4 x i16>, <4 x i16>) nounwind readnone
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@ -1,14 +0,0 @@
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; RUN: opt -instcombine < %s
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; Function Attrs: nounwind readnone ssp
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define void @mulByZero(<4 x i16> %x) #0 {
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entry:
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%a = tail call <4 x i32> @llvm.arm.neon.vmulls.v4i32(<4 x i16> %x, <4 x i16> zeroinitializer) #2
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ret void
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}
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; Function Attrs: nounwind readnone
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declare <4 x i32> @llvm.arm.neon.vmulls.v4i32(<4 x i16>, <4 x i16>) #1
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attributes #0 = { nounwind readnone ssp }
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attributes #1 = { nounwind readnone }
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@ -1,2 +0,0 @@
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if not 'ARM' in config.root.targets:
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config.unsupported = True
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@ -1,25 +0,0 @@
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; RUN: opt < %s -instcombine -S | FileCheck %s
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; The alignment arguments for NEON load/store intrinsics can be increased
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; by instcombine. Check for this.
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; CHECK: vld4.v2i32.p0i8({{.*}}, i32 32)
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; CHECK: vst4.p0i8.v2i32({{.*}}, i32 16)
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@x = common global [8 x i32] zeroinitializer, align 32
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@y = common global [8 x i32] zeroinitializer, align 16
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%struct.__neon_int32x2x4_t = type { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> }
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define void @test() nounwind ssp {
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%tmp1 = call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4.v2i32.p0i8(i8* bitcast ([8 x i32]* @x to i8*), i32 1)
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%tmp2 = extractvalue %struct.__neon_int32x2x4_t %tmp1, 0
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%tmp3 = extractvalue %struct.__neon_int32x2x4_t %tmp1, 1
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%tmp4 = extractvalue %struct.__neon_int32x2x4_t %tmp1, 2
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%tmp5 = extractvalue %struct.__neon_int32x2x4_t %tmp1, 3
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call void @llvm.arm.neon.vst4.p0i8.v2i32(i8* bitcast ([8 x i32]* @y to i8*), <2 x i32> %tmp2, <2 x i32> %tmp3, <2 x i32> %tmp4, <2 x i32> %tmp5, i32 1)
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ret void
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}
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declare %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4.v2i32.p0i8(i8*, i32) nounwind readonly
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declare void @llvm.arm.neon.vst4.p0i8.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32) nounwind
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@ -1,153 +0,0 @@
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; Test that the strcmp library call simplifier works correctly.
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; RUN: opt < %s -instcombine -S | FileCheck %s
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target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
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@hello = constant [6 x i8] c"hello\00"
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@hell = constant [5 x i8] c"hell\00"
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@bell = constant [5 x i8] c"bell\00"
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@null = constant [1 x i8] zeroinitializer
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declare i32 @strcmp(i8*, i8*)
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; strcmp("", x) -> -*x
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define arm_aapcscc i32 @test1(i8* %str2) {
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; CHECK-LABEL: @test1(
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; CHECK: %strcmpload = load i8, i8* %str
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; CHECK: %1 = zext i8 %strcmpload to i32
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; CHECK: %2 = sub nsw i32 0, %1
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; CHECK: ret i32 %2
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%str1 = getelementptr inbounds [1 x i8], [1 x i8]* @null, i32 0, i32 0
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%temp1 = call arm_apcscc i32 @strcmp(i8* %str1, i8* %str2)
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ret i32 %temp1
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}
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; strcmp(x, "") -> *x
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define arm_aapcscc i32 @test2(i8* %str1) {
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; CHECK-LABEL: @test2(
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; CHECK: %strcmpload = load i8, i8* %str
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; CHECK: %1 = zext i8 %strcmpload to i32
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; CHECK: ret i32 %1
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%str2 = getelementptr inbounds [1 x i8], [1 x i8]* @null, i32 0, i32 0
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%temp1 = call arm_aapcscc i32 @strcmp(i8* %str1, i8* %str2)
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ret i32 %temp1
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}
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; strcmp(x, y) -> cnst
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define arm_aapcscc i32 @test3() {
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; CHECK-LABEL: @test3(
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; CHECK: ret i32 -1
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%str1 = getelementptr inbounds [5 x i8], [5 x i8]* @hell, i32 0, i32 0
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%str2 = getelementptr inbounds [6 x i8], [6 x i8]* @hello, i32 0, i32 0
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%temp1 = call arm_aapcscc i32 @strcmp(i8* %str1, i8* %str2)
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ret i32 %temp1
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}
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define arm_aapcscc i32 @test4() {
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; CHECK-LABEL: @test4(
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; CHECK: ret i32 1
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%str1 = getelementptr inbounds [5 x i8], [5 x i8]* @hell, i32 0, i32 0
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%str2 = getelementptr inbounds [1 x i8], [1 x i8]* @null, i32 0, i32 0
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%temp1 = call arm_aapcscc i32 @strcmp(i8* %str1, i8* %str2)
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ret i32 %temp1
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}
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; strcmp(x, y) -> memcmp(x, y, <known length>)
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; (This transform is rather difficult to trigger in a useful manner)
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define arm_aapcscc i32 @test5(i1 %b) {
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; CHECK-LABEL: @test5(
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; CHECK: %memcmp = call i32 @memcmp(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @hello, i32 0, i32 0), i8* %str2, i32 5)
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; CHECK: ret i32 %memcmp
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%str1 = getelementptr inbounds [6 x i8], [6 x i8]* @hello, i32 0, i32 0
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%temp1 = getelementptr inbounds [5 x i8], [5 x i8]* @hell, i32 0, i32 0
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%temp2 = getelementptr inbounds [5 x i8], [5 x i8]* @bell, i32 0, i32 0
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%str2 = select i1 %b, i8* %temp1, i8* %temp2
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%temp3 = call arm_aapcscc i32 @strcmp(i8* %str1, i8* %str2)
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ret i32 %temp3
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}
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; strcmp(x,x) -> 0
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define arm_aapcscc i32 @test6(i8* %str) {
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; CHECK-LABEL: @test6(
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; CHECK: ret i32 0
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%temp1 = call arm_aapcscc i32 @strcmp(i8* %str, i8* %str)
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ret i32 %temp1
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}
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; strcmp("", x) -> -*x
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define arm_aapcs_vfpcc i32 @test1_vfp(i8* %str2) {
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; CHECK-LABEL: @test1_vfp(
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; CHECK: %strcmpload = load i8, i8* %str
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; CHECK: %1 = zext i8 %strcmpload to i32
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; CHECK: %2 = sub nsw i32 0, %1
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; CHECK: ret i32 %2
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%str1 = getelementptr inbounds [1 x i8], [1 x i8]* @null, i32 0, i32 0
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%temp1 = call arm_aapcs_vfpcc i32 @strcmp(i8* %str1, i8* %str2)
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ret i32 %temp1
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}
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; strcmp(x, "") -> *x
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define arm_aapcs_vfpcc i32 @test2_vfp(i8* %str1) {
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; CHECK-LABEL: @test2_vfp(
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; CHECK: %strcmpload = load i8, i8* %str
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; CHECK: %1 = zext i8 %strcmpload to i32
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; CHECK: ret i32 %1
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%str2 = getelementptr inbounds [1 x i8], [1 x i8]* @null, i32 0, i32 0
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%temp1 = call arm_aapcs_vfpcc i32 @strcmp(i8* %str1, i8* %str2)
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ret i32 %temp1
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}
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; strcmp(x, y) -> cnst
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define arm_aapcs_vfpcc i32 @test3_vfp() {
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; CHECK-LABEL: @test3_vfp(
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; CHECK: ret i32 -1
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%str1 = getelementptr inbounds [5 x i8], [5 x i8]* @hell, i32 0, i32 0
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%str2 = getelementptr inbounds [6 x i8], [6 x i8]* @hello, i32 0, i32 0
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%temp1 = call arm_aapcs_vfpcc i32 @strcmp(i8* %str1, i8* %str2)
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ret i32 %temp1
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}
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define arm_aapcs_vfpcc i32 @test4_vfp() {
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; CHECK-LABEL: @test4_vfp(
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; CHECK: ret i32 1
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%str1 = getelementptr inbounds [5 x i8], [5 x i8]* @hell, i32 0, i32 0
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%str2 = getelementptr inbounds [1 x i8], [1 x i8]* @null, i32 0, i32 0
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%temp1 = call arm_aapcs_vfpcc i32 @strcmp(i8* %str1, i8* %str2)
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ret i32 %temp1
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}
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; strcmp(x, y) -> memcmp(x, y, <known length>)
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; (This transform is rather difficult to trigger in a useful manner)
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define arm_aapcs_vfpcc i32 @test5_vfp(i1 %b) {
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; CHECK-LABEL: @test5_vfp(
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; CHECK: %memcmp = call i32 @memcmp(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @hello, i32 0, i32 0), i8* %str2, i32 5)
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; CHECK: ret i32 %memcmp
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%str1 = getelementptr inbounds [6 x i8], [6 x i8]* @hello, i32 0, i32 0
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%temp1 = getelementptr inbounds [5 x i8], [5 x i8]* @hell, i32 0, i32 0
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%temp2 = getelementptr inbounds [5 x i8], [5 x i8]* @bell, i32 0, i32 0
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%str2 = select i1 %b, i8* %temp1, i8* %temp2
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%temp3 = call arm_aapcs_vfpcc i32 @strcmp(i8* %str1, i8* %str2)
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ret i32 %temp3
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}
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; strcmp(x,x) -> 0
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define arm_aapcs_vfpcc i32 @test6_vfp(i8* %str) {
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; CHECK-LABEL: @test6_vfp(
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; CHECK: ret i32 0
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%temp1 = call arm_aapcs_vfpcc i32 @strcmp(i8* %str, i8* %str)
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ret i32 %temp1
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}
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@ -1,76 +0,0 @@
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; Test that the strcpy library call simplifier works correctly for ARM procedure calls
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; RUN: opt < %s -instcombine -S | FileCheck %s
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;
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; This transformation requires the pointer size, as it assumes that size_t is
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; the size of a pointer.
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target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
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@hello = constant [6 x i8] c"hello\00"
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@a = common global [32 x i8] zeroinitializer, align 1
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@b = common global [32 x i8] zeroinitializer, align 1
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declare i8* @strcpy(i8*, i8*)
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define arm_aapcscc void @test_simplify1() {
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; CHECK-LABEL: @test_simplify1(
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%dst = getelementptr [32 x i8], [32 x i8]* @a, i32 0, i32 0
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%src = getelementptr [6 x i8], [6 x i8]* @hello, i32 0, i32 0
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call arm_aapcscc i8* @strcpy(i8* %dst, i8* %src)
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; CHECK: @llvm.memcpy.p0i8.p0i8.i32
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ret void
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}
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define arm_aapcscc i8* @test_simplify2() {
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; CHECK-LABEL: @test_simplify2(
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%dst = getelementptr [32 x i8], [32 x i8]* @a, i32 0, i32 0
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%ret = call arm_aapcscc i8* @strcpy(i8* %dst, i8* %dst)
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; CHECK: ret i8* getelementptr inbounds ([32 x i8], [32 x i8]* @a, i32 0, i32 0)
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ret i8* %ret
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}
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define arm_aapcscc i8* @test_no_simplify1() {
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; CHECK-LABEL: @test_no_simplify1(
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%dst = getelementptr [32 x i8], [32 x i8]* @a, i32 0, i32 0
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%src = getelementptr [32 x i8], [32 x i8]* @b, i32 0, i32 0
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%ret = call arm_aapcscc i8* @strcpy(i8* %dst, i8* %src)
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; CHECK: call arm_aapcscc i8* @strcpy
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ret i8* %ret
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}
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define arm_aapcs_vfpcc void @test_simplify1_vfp() {
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; CHECK-LABEL: @test_simplify1_vfp(
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%dst = getelementptr [32 x i8], [32 x i8]* @a, i32 0, i32 0
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%src = getelementptr [6 x i8], [6 x i8]* @hello, i32 0, i32 0
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call arm_aapcs_vfpcc i8* @strcpy(i8* %dst, i8* %src)
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; CHECK: @llvm.memcpy.p0i8.p0i8.i32
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ret void
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}
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define arm_aapcs_vfpcc i8* @test_simplify2_vfp() {
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; CHECK-LABEL: @test_simplify2_vfp(
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%dst = getelementptr [32 x i8], [32 x i8]* @a, i32 0, i32 0
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%ret = call arm_aapcs_vfpcc i8* @strcpy(i8* %dst, i8* %dst)
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; CHECK: ret i8* getelementptr inbounds ([32 x i8], [32 x i8]* @a, i32 0, i32 0)
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ret i8* %ret
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}
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define arm_aapcs_vfpcc i8* @test_no_simplify1_vfp() {
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; CHECK-LABEL: @test_no_simplify1_vfp(
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%dst = getelementptr [32 x i8], [32 x i8]* @a, i32 0, i32 0
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%src = getelementptr [32 x i8], [32 x i8]* @b, i32 0, i32 0
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%ret = call arm_aapcs_vfpcc i8* @strcpy(i8* %dst, i8* %src)
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; CHECK: call arm_aapcs_vfpcc i8* @strcpy
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ret i8* %ret
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}
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