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Imported Upstream version 5.18.0.167
Former-commit-id: 289509151e0fee68a1b591a20c9f109c3c789d3a
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if not 'AMDGPU' in config.root.targets:
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config.unsupported = True
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@ -1,98 +0,0 @@
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; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -indvars %s | FileCheck %s
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; Bug 21148
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; Induction variables should not be widened for 64-bit integers,
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; despite being a legal type.
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;
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; The cost of basic arithmetic instructions on a 64-bit integer are
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; twice as expensive as that on a 32-bit integer, or split into 2
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; 32-bit components.
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target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-p24:64:64-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
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; CHECK-LABEL: @indvar_32_bit(
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; CHECK-NOT: sext i32
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; CHECK: phi i32
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define amdgpu_kernel void @indvar_32_bit(i32 %n, i32* nocapture %output) {
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entry:
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%cmp5 = icmp sgt i32 %n, 0
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br i1 %cmp5, label %for.body.preheader, label %for.end
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for.body.preheader: ; preds = %entry
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br label %for.body
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for.body: ; preds = %for.body.preheader, %for.body
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%i.06 = phi i32 [ 0, %for.body.preheader ], [ %add, %for.body ]
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%mul = mul nsw i32 %i.06, %i.06
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%tmp0 = sext i32 %i.06 to i64
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%arrayidx = getelementptr inbounds i32, i32* %output, i64 %tmp0
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store i32 %mul, i32* %arrayidx, align 4
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%add = add nsw i32 %i.06, 3
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%cmp = icmp slt i32 %add, %n
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br i1 %cmp, label %for.body, label %for.end.loopexit
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for.end.loopexit: ; preds = %for.body
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br label %for.end
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for.end: ; preds = %for.end.loopexit, %entry
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ret void
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}
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; CHECK-LABEL: @no_promote_i32(
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; CHECK-NOT: sext i32
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; CHECK: br
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; CHECK-NOT: shl i64
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; CHECK-NOT: ashr i64
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; CHECK-NOT: mul nsw i64
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; CHECK-NOT: add nsw i64
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define amdgpu_kernel void @no_promote_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) {
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entry:
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br label %for.body
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for.body:
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%inc = phi i32 [ 0, %entry ], [ %inc.i, %for.body ]
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%tmp0 = add i32 %a, %inc
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%shl = shl i32 %inc, 8
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%shr = ashr exact i32 %shl, 8
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%mul = mul nsw i32 %shr, %a
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%add = add nsw i32 %mul, %b
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%tmp1 = sext i32 %add to i64
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%arrayidx1 = getelementptr inbounds i32, i32 addrspace(1)* %out, i64 %tmp1
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store i32 %tmp0, i32 addrspace(1)* %arrayidx1, align 4
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%inc.i = add nsw i32 %inc, 1
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%cmp = icmp slt i32 %inc.i, 16
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br i1 %cmp, label %for.body, label %for.end
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for.end:
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ret void
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}
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; FIXME: This should really be promoted to i64, since it will need to
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; be legalized anyway.
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; CHECK-LABEL: @indvar_48_bit(
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define amdgpu_kernel void @indvar_48_bit(i48 %n, i48* nocapture %output) {
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entry:
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%cmp5 = icmp sgt i48 %n, 0
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br i1 %cmp5, label %for.body.preheader, label %for.end
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for.body.preheader: ; preds = %entry
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br label %for.body
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for.body: ; preds = %for.body.preheader, %for.body
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%i.06 = phi i48 [ 0, %for.body.preheader ], [ %add, %for.body ]
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%mul = mul nsw i48 %i.06, %i.06
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%tmp0 = sext i48 %i.06 to i64
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%arrayidx = getelementptr inbounds i48, i48* %output, i64 %tmp0
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store i48 %mul, i48* %arrayidx, align 4
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%add = add nsw i48 %i.06, 3
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%cmp = icmp slt i48 %add, %n
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br i1 %cmp, label %for.body, label %for.end.loopexit
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for.end.loopexit: ; preds = %for.body
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br label %for.end
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for.end: ; preds = %for.end.loopexit, %entry
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ret void
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}
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