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Imported Upstream version 5.18.0.167

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Former-commit-id: 289509151e0fee68a1b591a20c9f109c3c789d3a
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Xamarin Public Jenkins (auto-signing)
2018-10-20 08:25:10 +00:00
parent e19d552987
commit b084638f15
28489 changed files with 184 additions and 3866856 deletions
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28
external/llvm/test/MC/Mips/mips-cop0-reginfo.s vendored
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@@ -1,28 +0,0 @@
# RUN: llvm-mc -arch=mips -mcpu=mips32r2 -filetype=obj %s -o - | \
# RUN: llvm-readobj -sections -section-data - | \
# RUN: FileCheck %s
mfc0 $16, $15, 1
mfc0 $16, $16, 1
# Checking for the coprocessor 0's register usage was recorded
# and emitted.
# CHECK: Section {
# CHECK: Index: 5
# CHECK: Name: .reginfo (27)
# CHECK: Type: SHT_MIPS_REGINFO (0x70000006)
# CHECK: Flags [ (0x2)
# CHECK: SHF_ALLOC (0x2)
# CHECK: ]
# CHECK: Address: 0x0
# CHECK: Offset: 0x50
# CHECK: Size: 24
# CHECK: Link: 0
# CHECK: Info: 0
# CHECK: AddressAlignment: 4
# CHECK: EntrySize: 24
# CHECK: SectionData (
# CHECK: 0000: 00010000 00018000 00000000 00000000 |................|
# CHECK: 0010: 00000000 00000000 |........|
# CHECK: )
# CHECK: }