Imported Upstream version 5.18.0.167

Former-commit-id: 289509151e0fee68a1b591a20c9f109c3c789d3a
This commit is contained in:
Xamarin Public Jenkins (auto-signing)
2018-10-20 08:25:10 +00:00
parent e19d552987
commit b084638f15
28489 changed files with 184 additions and 3866856 deletions

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# RUN: llvm-mc -triple=aarch64_be-none-linux-gnu -filetype=obj -o %t %s
# RUN: llvm-rtdyld -triple=aarch64_be-none-linux-gnu -verify -dummy-extern f=0x0123456789abcdef -check=%s %t
.globl Q
.section .dummy, "ax"
Q:
nop
.text
.globl g
.p2align 2
.type g,@function
g:
# R_AARCH64_MOVW_UABS_G3
movz x0, #:abs_g3:f
# R_AARCH64_MOVW_UABS_G2_NC
movk x0, #:abs_g2_nc:f
# R_AARCH64_MOVW_UABS_G1_NC
movk x0, #:abs_g1_nc:f
# R_AARCH64_MOVW_UABS_G0_NC
movk x0, #:abs_g0_nc:f
ret
.Lfunc_end0:
.size g, .Lfunc_end0-g
.type k,@object
.data
.globl k
.p2align 3
k:
.xword f
.size k, 8
r:
# R_AARCH64_PREL32: use Q instead of f to fit in 32 bits.
.word Q - .
# R_AARCH64_PREL64
.p2align 3
.xword f - .
# LE instructions read as BE
# rtdyld-check: *{4}(g) = 0x6024e0d2
# rtdyld-check: *{4}(g + 4) = 0xe0acc8f2
# rtdyld-check: *{4}(g + 8) = 0x6035b1f2
# rtdyld-check: *{4}(g + 12) = 0xe0bd99f2
# rtdyld-check: *{8}k = f
# rtdyld-check: *{4}r = (Q - r)[31:0]
# rtdyld-check: *{8}(r + 8) = f - r - 8

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# RUN: rm -rf %t && mkdir -p %t
# RUN: llvm-mc -triple=arm64-none-linux-gnu -filetype=obj -o %t/pic-reloc.o %s
# RUN: llvm-rtdyld -triple=arm64-none-linux-gnu -verify -check=%s %t/pic-reloc.o \
# RUN: -map-section pic-reloc.o,.got=0x20000 -dummy-extern f=0x1234 -dummy-extern g=0x5678
_s:
nop
_a1:
adrp x8, :got:f
_a2:
adrp x9, :got:g
_a3:
adrp x10, :got:_s
_l1:
ldr x8, [x8, :got_lo12:f]
_l2:
ldr x9, [x9, :got_lo12:g]
_l3:
ldr x10, [x10, :got_lo12:_s]
## We'll end up having two sections .text and .got,
## each is located on the start of a memory page
## Test that .got section has three entries pointing to f, g and _s
# *{8}section_addr(pic-reloc.o, .got) = f
# *{8}(section_addr(pic-reloc.o, .got) + 8) = g
# *{8}(section_addr(pic-reloc.o, .got) + 16) = _s
## Test that first adrp instruction really takes address of
## the .got section (_s label is on the start of a page)
# rtdyld-check: _s + (((*{4}_a1)[30:29] + ((*{4}_a1)[23:5] << 2)) << 12) = section_addr(pic-reloc.o, .got)
## Test that second adrp takes address of .got
# rtdyld-check: _s + (((*{4}_a2)[30:29] + ((*{4}_a2)[23:5] << 2)) << 12) = section_addr(pic-reloc.o, .got)
## Test that third adrp takes address of .got
# rtdyld-check: _s + (((*{4}_a3)[30:29] + ((*{4}_a3)[23:5] << 2)) << 12) = section_addr(pic-reloc.o, .got)
## Test that first ldr immediate value is 0 >> 3 = 0 (1st .got entry)
# rtdyld-check: (*{4}_l1)[21:10] = 0
## Test that second ldr immediate value is 8 >> 3 = 1 (2nd .got entry)
# rtdyld-check: (*{4}_l2)[21:10] = 1
## Test that third ldr immediate value is 16 >> 3 = 2 (3rd .got entry, addend is 0)
# rtdyld-check: (*{4}_l3)[21:10] = 2

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# RUN: llvm-mc -triple=arm64-none-linux-gnu -filetype=obj -o %t %s
# RUN: llvm-rtdyld -triple=arm64-none-linux-gnu -verify -check=%s %t
.globl _main
.weak _label1
.section .text.1,"ax"
_label1:
nop
_main:
b _label1
## Branch 1 instruction back from _main
# rtdyld-check: *{4}(_main) = 0x17ffffff

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# RUN: llvm-mc -triple=arm64-none-linux-gnu -filetype=obj -o %t %s
# RUN: llvm-rtdyld -triple=arm64-none-linux-gnu -verify -dummy-extern f=0x0123456789abcdef -dummy-extern symbol=0xf00f -check=%s %t
.globl Q
.section .dummy, "ax"
Q:
nop
.text
.globl g
.p2align 2
.type g,@function
g:
# R_AARCH64_MOVW_UABS_G3
movz x0, #:abs_g3:f
# R_AARCH64_MOVW_UABS_G2_NC
movk x0, #:abs_g2_nc:f
# R_AARCH64_MOVW_UABS_G1_NC
movk x0, #:abs_g1_nc:f
# R_AARCH64_MOVW_UABS_G0_NC
movk x0, #:abs_g0_nc:f
l:
# R_AARCH64_LDST8_ABS_LO12_NC
ldrsb x4, [x5, :lo12:a+1]
# R_AARCH64_LDST16_ABS_LO12_NC
ldrh w4, [x5, :lo12:a+2]
# R_AARCH64_LDST32_ABS_LO12_NC
ldr s4, [x5, :lo12:a]
# R_AARCH64_LDST64_ABS_LO12_NC
ldr x4, [x5, :lo12:a]
# R_AARCH64_LDST128_ABS_LO12_NC
ldr q4, [x5, :lo12:a]
p:
# R_AARCH64_ADR_PREL_PG_HI21
# Test both low and high immediate values
adrp x4, a + 20480 // 16384 + 4096
# Align next label to 16 bytes, so that LDST immediate
# fields will be non-zero
.align 4
a:
# R_AARCH64_ADD_ABS_LO12_NC
add x0, x0, :lo12:f
ret
.Lfunc_end0:
.size g, .Lfunc_end0-g
.type k,@object
.data
.globl k
.p2align 3
k:
.xword f
.size k, 16
r:
# R_AARCH64_PREL32: use Q instead of f to fit in 32 bits.
.word Q - .
# R_AARCH64_PREL64
.p2align 3
.xword f - .
# rtdyld-check: *{4}(g) = 0xd2e02460
# rtdyld-check: *{4}(g + 4) = 0xf2c8ace0
# rtdyld-check: *{4}(g + 8) = 0xf2b13560
# rtdyld-check: *{4}(g + 12) = 0xf299bde0
## Check LDSTXX_ABS_LO12_NC
# rtdyld-check: (*{4}l)[21:10] = (a+1)[11:0]
# rtdyld-check: (*{4}(l+4))[21:10] = (a+2)[11:1]
# rtdyld-check: (*{4}(l+8))[21:10] = a[11:2]
# rtdyld-check: (*{4}(l+12))[21:10] = a[11:3]
# rtdyld-check: (*{4}(l+16))[21:10] = a[11:4]
## Check ADR_PREL_PG_HI21. Low order bits of immediate value
## go to bits 30:29. High order bits go to bits 23:5
# rtdyld-check: (*{4}p)[30:29] = (a - p + 20480)[13:12]
# rtdyld-check: (*{4}p)[23:5] = (a - p + 20480)[32:14]
# rtdyld-check: *{8}k = f
# rtdyld-check: *{4}r = (Q - r)[31:0]
# rtdyld-check: *{8}(r + 8) = f - r - 8
## f & 0xFFF = 0xdef (bits 11:0 of f)
## 0xdef << 10 = 0x37bc00
# rtdyld-check: *{4}(a) = 0x9137bc00
.data
ABS16:
.short symbol
# rtdyld-check: (*{2}ABS16) = symbol[15:0]
ABS32:
.long symbol
# rtdyld-check: (*{4}ABS32) = symbol[31:0]
ABS64:
.xword symbol
# rtdyld-check: (*{8}ABS64) = symbol

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# RUN: rm -rf %t && mkdir -p %t
# RUN: llvm-mc -triple=arm64-apple-ios7.0.0 -filetype=obj -o %t/foo.o %s
# RUN: llvm-rtdyld -triple=arm64-apple-ios7.0.0 -map-section foo.o,__text=0x10bc0 -verify -check=%s %t/foo.o
.section __TEXT,__text,regular,pure_instructions
.ios_version_min 7, 0
.globl _foo
.align 2
_foo:
movz w0, #0
ret
.globl _test_branch_reloc
.align 2
# Test ARM64_RELOC_BRANCH26 relocation. The branch instruction only encodes 26
# bits of the 28-bit possible branch range. The lower two bits are always zero
# and therefore ignored.
# rtdyld-check: decode_operand(br1, 0)[25:0] = (_foo - br1)[27:2]
_test_branch_reloc:
br1:
b _foo
ret
# Test ARM64_RELOC_PAGE21 and ARM64_RELOC_PAGEOFF12 relocation. adrp encodes
# the PC-relative page (4 KiB) difference between the adrp instruction and the
# variable ptr. ldr encodes the offset of the variable within the page. The ldr
# instruction perfroms an implicit shift on the encoded immediate (imm<<3).
# rtdyld-check: decode_operand(adrp1, 1) = (_ptr[32:12] - adrp1[32:12])
# rtdyld-check: decode_operand(ldr1, 2) = _ptr[11:3]
.globl _test_adrp_ldr
.align 2
_test_adrp_ldr:
adrp1:
adrp x0, _ptr@PAGE
ldr1:
ldr x0, [x0, _ptr@PAGEOFF]
ret
# Test ARM64_RELOC_GOT_LOAD_PAGE21 and ARM64_RELOC_GOT_LOAD_PAGEOFF12
# relocation. adrp encodes the PC-relative page (4 KiB) difference between the
# adrp instruction and the GOT entry for ptr. ldr encodes the offset of the GOT
# entry within the page. The ldr instruction perfroms an implicit shift on the
# encoded immediate (imm<<3).
# rtdyld-check: *{8}(stub_addr(foo.o, __text, _ptr)) = _ptr
# rtdyld-check: decode_operand(adrp2, 1) = (stub_addr(foo.o, __text, _ptr)[32:12] - adrp2[32:12])
# rtdyld-check: decode_operand(ldr2, 2) = stub_addr(foo.o, __text, _ptr)[11:3]
.globl _test_adrp_ldr
.align 2
_test_got_adrp_ldr:
adrp2:
adrp x0, _ptr@GOTPAGE
ldr2:
ldr x0, [x0, _ptr@GOTPAGEOFF]
ret
# rtdyld-check: decode_operand(add1, 2) = (tgt+8)[11:2] << 2
.globl _test_explicit_addend_reloc
.align 4
_test_explicit_addend_reloc:
add1:
add x0, x0, tgt@PAGEOFF+8
.align 3
tgt:
.long 0
.long 0
.long 7
# Test ARM64_RELOC_UNSIGNED relocation. The absolute 64-bit address of the
# function should be stored at the 8-byte memory location.
# rtdyld-check: *{8}_ptr = _foo
.section __DATA,__data
.globl _ptr
.align 3
.fill 4096, 1, 0
_ptr:
.quad _foo
# Test ARM64_RELOC_SUBTRACTOR.
# rtdyld-check: *{8}_subtractor_result = _test_branch_reloc - _foo
_subtractor_result:
.quad _test_branch_reloc - _foo

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if not 'AArch64' in config.root.targets:
config.unsupported = True