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Imported Upstream version 5.18.0.167
Former-commit-id: 289509151e0fee68a1b591a20c9f109c3c789d3a
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@ -1,6 +0,0 @@
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; RUN: llc < %s -march=xcore > %t1.s
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; PR3080
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define i64 @test(i64 %a) {
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%result = shl i64 %a, 1
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ret i64 %result
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}
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@ -1,12 +0,0 @@
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; RUN: llc < %s -march=xcore > %t1.s
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;; This caused a compilation failure since the
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;; address arithmetic was folded into the LDWSP instruction,
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;; resulting in a negative offset which eliminateFrameIndex was
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;; unable to eliminate.
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define i32 @test(i32 %bar) nounwind readnone {
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entry:
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%bar_addr = alloca i32
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%0 = getelementptr i32, i32* %bar_addr, i32 -1
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%1 = load i32, i32* %0, align 4
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ret i32 %1
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}
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@ -1,18 +0,0 @@
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; RUN: llc < %s -march=xcore > %t1.s
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; PR3324
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define double @f1(double %a, double %b, double %c, double %d, double %e, double %f, double %g) nounwind {
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entry:
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br i1 false, label %bb113, label %bb129
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bb113: ; preds = %entry
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ret double 0.000000e+00
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bb129: ; preds = %entry
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%tmp134 = fsub double %b, %a ; <double> [#uses=1]
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%tmp136 = fsub double %tmp134, %c ; <double> [#uses=1]
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%tmp138 = fadd double %tmp136, %d ; <double> [#uses=1]
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%tmp140 = fsub double %tmp138, %e ; <double> [#uses=1]
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%tmp142 = fadd double %tmp140, %f ; <double> [#uses=1]
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%tmp.0 = fmul double %tmp142, 0.000000e+00 ; <double> [#uses=1]
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ret double %tmp.0
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}
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@ -1,6 +0,0 @@
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; RUN: llc < %s -march=xcore
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; PR3898
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define i32 @vector_param(<2 x double> %x) nounwind {
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ret i32 1
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}
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@ -1,7 +0,0 @@
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; RUN: llc < %s -march=xcore > %t1.s
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define void @store32(i8* %p) nounwind {
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entry:
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%0 = bitcast i8* %p to i192*
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store i192 0, i192* %0, align 4
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ret void
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}
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@ -1,26 +0,0 @@
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; RUN: llc < %s -march=xcore
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target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
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target triple = "xcore-xmos-elf"
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%0 = type { i32 }
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%struct.dwarf_fde = type <{ i32, i32, [0 x i8] }>
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%struct.object = type { i8*, i8*, i8*, %union.anon, %0, %struct.object* }
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%union.anon = type { %struct.dwarf_fde* }
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define %struct.dwarf_fde* @search_object(%struct.object* %ob, i8* %pc) {
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entry:
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br i1 undef, label %bb3.i15.i.i, label %bb2
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bb3.i15.i.i: ; preds = %bb3.i15.i.i, %entry
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%indvar.i.i.i = phi i32 [ %indvar.next.i.i.i, %bb3.i15.i.i ], [ 0, %entry ] ; <i32> [#uses=2]
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%tmp137 = sub i32 0, %indvar.i.i.i ; <i32> [#uses=1]
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%scevgep13.i.i.i = getelementptr i32, i32* undef, i32 %tmp137 ; <i32*> [#uses=2]
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%scevgep1314.i.i.i = bitcast i32* %scevgep13.i.i.i to %struct.dwarf_fde** ; <%struct.dwarf_fde**> [#uses=1]
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%0 = load %struct.dwarf_fde*, %struct.dwarf_fde** %scevgep1314.i.i.i, align 4 ; <%struct.dwarf_fde*> [#uses=0]
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store i32 undef, i32* %scevgep13.i.i.i
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%indvar.next.i.i.i = add i32 %indvar.i.i.i, 1 ; <i32> [#uses=1]
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br label %bb3.i15.i.i
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bb2: ; preds = %entry
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ret %struct.dwarf_fde* undef
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}
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@ -1,10 +0,0 @@
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; RUN: llc < %s -march=xcore
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%struct.st = type <{ i8, i32, i8, i32, i8, i32 }>
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@x = external global %struct.st, align 4
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define i32 @test_entry() nounwind {
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entry:
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%0 = load i32, i32* getelementptr inbounds (%struct.st, %struct.st* @x, i32 0, i32 3), align 2
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ret i32 %0
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}
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@ -1,20 +0,0 @@
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; RUN: llc < %s -march=xcore | FileCheck %s
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declare void @g()
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declare i8* @llvm.stacksave() nounwind
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declare void @llvm.stackrestore(i8*) nounwind
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define void @f(i32** %p, i32 %size) {
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allocas:
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%0 = call i8* @llvm.stacksave()
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%a = alloca i32, i32 %size
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store i32* %a, i32** %p
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call void @g()
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call void @llvm.stackrestore(i8* %0)
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ret void
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}
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; CHECK-LABEL: f:
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; CHECK: ldaw [[REGISTER:r[0-9]+]], {{r[0-9]+}}[-r1]
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; CHECK: set sp, [[REGISTER]]
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; CHECK: extsp 1
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; CHECK: bl g
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@ -1 +0,0 @@
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RUN: llc -O0 -march=xcore -asm-verbose < %S/../Inputs/DbgValueOtherTargets.ll | FileCheck %S/../Inputs/DbgValueOtherTargets.ll
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59
external/llvm/test/CodeGen/XCore/addsub64.ll
vendored
59
external/llvm/test/CodeGen/XCore/addsub64.ll
vendored
@ -1,59 +0,0 @@
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; RUN: llc < %s -march=xcore | FileCheck %s
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define i64 @add64(i64 %a, i64 %b) {
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%result = add i64 %a, %b
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ret i64 %result
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}
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; CHECK: add64
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; CHECK: ldc r11, 0
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; CHECK-NEXT: ladd r2, r0, r0, r2, r11
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; CHECK-NEXT: ladd r2, r1, r1, r3, r2
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; CHECK-NEXT: retsp 0
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define i64 @sub64(i64 %a, i64 %b) {
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%result = sub i64 %a, %b
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ret i64 %result
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}
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; CHECK: sub64
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; CHECK: ldc r11, 0
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; CHECK-NEXT: lsub r2, r0, r0, r2, r11
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; CHECK-NEXT: lsub r2, r1, r1, r3, r2
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; CHECK-NEXT: retsp 0
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define i64 @maccu(i64 %a, i32 %b, i32 %c) {
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entry:
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%0 = zext i32 %b to i64
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%1 = zext i32 %c to i64
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%2 = mul i64 %1, %0
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%3 = add i64 %2, %a
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ret i64 %3
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}
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; CHECK-LABEL: maccu:
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; CHECK: maccu r1, r0, r3, r2
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; CHECK-NEXT: retsp 0
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define i64 @maccs(i64 %a, i32 %b, i32 %c) {
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entry:
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%0 = sext i32 %b to i64
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%1 = sext i32 %c to i64
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%2 = mul i64 %1, %0
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%3 = add i64 %2, %a
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ret i64 %3
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}
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; CHECK-LABEL: maccs:
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; CHECK: maccs r1, r0, r3, r2
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; CHECK-NEXT: retsp 0
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define i64 @lmul(i32 %a, i32 %b, i32 %c, i32 %d) {
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entry:
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%0 = zext i32 %a to i64
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%1 = zext i32 %b to i64
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%2 = zext i32 %c to i64
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%3 = zext i32 %d to i64
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%4 = mul i64 %1, %0
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%5 = add i64 %4, %2
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%6 = add i64 %5, %3
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ret i64 %6
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}
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; CHECK-LABEL: lmul:
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; CHECK: lmul r1, r0, r1, r0, r2, r3
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; CHECK-NEXT: retsp 0
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34
external/llvm/test/CodeGen/XCore/aliases.ll
vendored
34
external/llvm/test/CodeGen/XCore/aliases.ll
vendored
@ -1,34 +0,0 @@
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; RUN: llc < %s -march=xcore | FileCheck %s
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define void @a_val() nounwind {
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ret void
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}
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@b_val = constant i32 42, section ".cp.rodata"
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@c_val = global i32 42
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@a = alias void (), void ()* @a_val
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@b = alias i32, i32* @b_val
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@c = alias i32, i32* @c_val
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; CHECK-LABEL: a_addr:
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; CHECK: ldap r11, a
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; CHECK: retsp
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define void ()* @a_addr() nounwind {
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entry:
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ret void ()* @a
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}
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; CHECK-LABEL: b_addr:
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; CHECK: ldaw r11, cp[b]
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; CHECK: retsp
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define i32 *@b_addr() nounwind {
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entry:
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ret i32* @b
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}
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; CHECK-LABEL: c_addr:
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; CHECK: ldaw r0, dp[c]
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; CHECK: retsp
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define i32 *@c_addr() nounwind {
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entry:
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ret i32* @c
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}
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15
external/llvm/test/CodeGen/XCore/align.ll
vendored
15
external/llvm/test/CodeGen/XCore/align.ll
vendored
@ -1,15 +0,0 @@
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; RUN: llc < %s -march=xcore | FileCheck %s
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; CHECK: .p2align 2
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; CHECK-LABEL: f:
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define void @f() nounwind {
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entry:
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ret void
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}
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; CHECK: .p2align 1
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; CHECK-LABEL: g:
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define void @g() nounwind optsize {
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entry:
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ret void
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}
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@ -1,9 +0,0 @@
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; RUN: not llc < %s -march=xcore 2>&1 | FileCheck %s
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; CHECK: emitPrologue unsupported alignment: 8
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define void @f() nounwind {
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entry:
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%BadAlignment = alloca i64, align 8
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ret void
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}
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76
external/llvm/test/CodeGen/XCore/ashr.ll
vendored
76
external/llvm/test/CodeGen/XCore/ashr.ll
vendored
@ -1,76 +0,0 @@
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; RUN: llc < %s -march=xcore -asm-verbose=0 | FileCheck %s
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define i32 @ashr(i32 %a, i32 %b) nounwind {
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%1 = ashr i32 %a, %b
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ret i32 %1
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}
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; CHECK-LABEL: ashr:
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; CHECK-NEXT: ashr r0, r0, r1
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define i32 @ashri1(i32 %a) nounwind {
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%1 = ashr i32 %a, 24
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ret i32 %1
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}
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; CHECK-LABEL: ashri1:
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; CHECK-NEXT: ashr r0, r0, 24
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define i32 @ashri2(i32 %a) nounwind {
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%1 = ashr i32 %a, 31
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ret i32 %1
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}
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; CHECK-LABEL: ashri2:
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; CHECK-NEXT: ashr r0, r0, 32
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define i32 @f1(i32 %a) nounwind nounwind {
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%1 = icmp slt i32 %a, 0
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br i1 %1, label %less, label %not_less
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less:
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ret i32 10
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not_less:
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ret i32 17
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}
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; CHECK-LABEL: f1:
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; CHECK-NEXT: ashr r0, r0, 32
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; CHECK-NEXT: bt r0
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define i32 @f2(i32 %a) nounwind {
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%1 = icmp sge i32 %a, 0
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br i1 %1, label %greater, label %not_greater
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greater:
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ret i32 10
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not_greater:
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ret i32 17
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}
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; CHECK-LABEL: f2:
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; CHECK-NEXT: ashr r0, r0, 32
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; CHECK-NEXT: bt r0
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define i32 @f3(i32 %a) nounwind {
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%1 = icmp slt i32 %a, 0
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%2 = select i1 %1, i32 10, i32 17
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ret i32 %2
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}
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; CHECK-LABEL: f3:
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; CHECK-NEXT: ashr r0, r0, 32
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; CHECK-NEXT: bt r0
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; CHECK-NEXT: ldc r0, 17
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; CHECK: ldc r0, 10
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define i32 @f4(i32 %a) nounwind {
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%1 = icmp sge i32 %a, 0
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%2 = select i1 %1, i32 10, i32 17
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ret i32 %2
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}
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; CHECK-LABEL: f4:
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; CHECK-NEXT: ashr r0, r0, 32
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; CHECK-NEXT: bt r0
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; CHECK-NEXT: ldc r0, 10
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; CHECK: ldc r0, 17
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define i32 @f5(i32 %a) nounwind {
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%1 = icmp sge i32 %a, 0
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%2 = zext i1 %1 to i32
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ret i32 %2
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}
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; CHECK-LABEL: f5:
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; CHECK-NEXT: ashr r0, r0, 32
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; CHECK-NEXT: eq r0, r0, 0
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91
external/llvm/test/CodeGen/XCore/atomic.ll
vendored
91
external/llvm/test/CodeGen/XCore/atomic.ll
vendored
@ -1,91 +0,0 @@
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; RUN: llc < %s -march=xcore | FileCheck %s
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; CHECK-LABEL: atomic_fence
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; CHECK: #MEMBARRIER
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; CHECK: #MEMBARRIER
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; CHECK: #MEMBARRIER
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; CHECK: #MEMBARRIER
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; CHECK: retsp 0
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define void @atomic_fence() nounwind {
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entry:
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fence acquire
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fence release
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fence acq_rel
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fence seq_cst
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ret void
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}
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@pool = external global i64
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define void @atomicloadstore() nounwind {
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entry:
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; CHECK-LABEL: atomicloadstore
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; CHECK: ldw r[[R0:[0-9]+]], dp[pool]
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; CHECK-NEXT: ldaw r[[R1:[0-9]+]], dp[pool]
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; CHECK-NEXT: #MEMBARRIER
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; CHECK-NEXT: ldc r[[R2:[0-9]+]], 0
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%0 = load atomic i32, i32* bitcast (i64* @pool to i32*) acquire, align 4
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; CHECK-NEXT: ld16s r3, r[[R1]][r[[R2]]]
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; CHECK-NEXT: #MEMBARRIER
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%1 = load atomic i16, i16* bitcast (i64* @pool to i16*) acquire, align 2
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; CHECK-NEXT: ld8u r11, r[[R1]][r[[R2]]]
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; CHECK-NEXT: #MEMBARRIER
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%2 = load atomic i8, i8* bitcast (i64* @pool to i8*) acquire, align 1
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; CHECK-NEXT: ldw r4, dp[pool]
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; CHECK-NEXT: #MEMBARRIER
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%3 = load atomic i32, i32* bitcast (i64* @pool to i32*) seq_cst, align 4
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; CHECK-NEXT: ld16s r5, r[[R1]][r[[R2]]]
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; CHECK-NEXT: #MEMBARRIER
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%4 = load atomic i16, i16* bitcast (i64* @pool to i16*) seq_cst, align 2
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; CHECK-NEXT: ld8u r6, r[[R1]][r[[R2]]]
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; CHECK-NEXT: #MEMBARRIER
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%5 = load atomic i8, i8* bitcast (i64* @pool to i8*) seq_cst, align 1
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; CHECK-NEXT: #MEMBARRIER
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; CHECK-NEXT: stw r[[R0]], dp[pool]
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store atomic i32 %0, i32* bitcast (i64* @pool to i32*) release, align 4
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; CHECK-NEXT: #MEMBARRIER
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; CHECK-NEXT: st16 r3, r[[R1]][r[[R2]]]
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store atomic i16 %1, i16* bitcast (i64* @pool to i16*) release, align 2
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; CHECK-NEXT: #MEMBARRIER
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; CHECK-NEXT: st8 r11, r[[R1]][r[[R2]]]
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store atomic i8 %2, i8* bitcast (i64* @pool to i8*) release, align 1
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; CHECK-NEXT: #MEMBARRIER
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; CHECK-NEXT: stw r4, dp[pool]
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; CHECK-NEXT: #MEMBARRIER
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store atomic i32 %3, i32* bitcast (i64* @pool to i32*) seq_cst, align 4
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; CHECK-NEXT: #MEMBARRIER
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; CHECK-NEXT: st16 r5, r[[R1]][r[[R2]]]
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; CHECK-NEXT: #MEMBARRIER
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store atomic i16 %4, i16* bitcast (i64* @pool to i16*) seq_cst, align 2
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; CHECK-NEXT: #MEMBARRIER
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; CHECK-NEXT: st8 r6, r[[R1]][r[[R2]]]
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; CHECK-NEXT: #MEMBARRIER
|
||||
store atomic i8 %5, i8* bitcast (i64* @pool to i8*) seq_cst, align 1
|
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|
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; CHECK-NEXT: ldw r[[R0]], dp[pool]
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; CHECK-NEXT: stw r[[R0]], dp[pool]
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; CHECK-NEXT: ld16s r[[R0]], r[[R1]][r[[R2]]]
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; CHECK-NEXT: st16 r[[R0]], r[[R1]][r[[R2]]]
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; CHECK-NEXT: ld8u r[[R0]], r[[R1]][r[[R2]]]
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; CHECK-NEXT: st8 r[[R0]], r[[R1]][r[[R2]]]
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%6 = load atomic i32, i32* bitcast (i64* @pool to i32*) monotonic, align 4
|
||||
store atomic i32 %6, i32* bitcast (i64* @pool to i32*) monotonic, align 4
|
||||
%7 = load atomic i16, i16* bitcast (i64* @pool to i16*) monotonic, align 2
|
||||
store atomic i16 %7, i16* bitcast (i64* @pool to i16*) monotonic, align 2
|
||||
%8 = load atomic i8, i8* bitcast (i64* @pool to i8*) monotonic, align 1
|
||||
store atomic i8 %8, i8* bitcast (i64* @pool to i8*) monotonic, align 1
|
||||
|
||||
ret void
|
||||
}
|
||||
@ -1,6 +0,0 @@
|
||||
; RUN: llc < %s -march=xcore
|
||||
|
||||
define i32 @test(i32 %X) {
|
||||
%tmp.1 = add i32 %X, 1
|
||||
ret i32 %tmp.1
|
||||
}
|
||||
74
external/llvm/test/CodeGen/XCore/bigstructret.ll
vendored
74
external/llvm/test/CodeGen/XCore/bigstructret.ll
vendored
@ -1,74 +0,0 @@
|
||||
; RUN: llc < %s -march=xcore | FileCheck %s
|
||||
|
||||
%0 = type { i32, i32, i32, i32 }
|
||||
%1 = type { i32, i32, i32, i32, i32 }
|
||||
|
||||
; Structs of 4 words are returned in registers
|
||||
define internal %0 @ReturnBigStruct() nounwind readnone {
|
||||
entry:
|
||||
%0 = insertvalue %0 zeroinitializer, i32 12, 0
|
||||
%1 = insertvalue %0 %0, i32 24, 1
|
||||
%2 = insertvalue %0 %1, i32 48, 2
|
||||
%3 = insertvalue %0 %2, i32 24601, 3
|
||||
ret %0 %3
|
||||
}
|
||||
; CHECK-LABEL: ReturnBigStruct:
|
||||
; CHECK: ldc r0, 12
|
||||
; CHECK: ldc r1, 24
|
||||
; CHECK: ldc r2, 48
|
||||
; CHECK: ldc r3, 24601
|
||||
; CHECK: retsp 0
|
||||
|
||||
; Structs of more than 4 words are partially returned in memory so long as the
|
||||
; function is not variadic.
|
||||
define { i32, i32, i32, i32, i32} @f(i32, i32, i32, i32, i32) nounwind readnone {
|
||||
; CHECK-LABEL: f:
|
||||
; CHECK: ldc [[REGISTER:r[0-9]+]], 5
|
||||
; CHECK-NEXT: stw [[REGISTER]], sp[2]
|
||||
; CHECK-NEXT: retsp 0
|
||||
body:
|
||||
ret { i32, i32, i32, i32, i32} { i32 undef, i32 undef, i32 undef, i32 undef, i32 5}
|
||||
}
|
||||
|
||||
@x = external global i32
|
||||
@y = external global i32
|
||||
|
||||
; Check we call a function returning more than 4 words correctly.
|
||||
define i32 @g() nounwind {
|
||||
; CHECK-LABEL: g:
|
||||
; CHECK: entsp 3
|
||||
; CHECK: ldc [[REGISTER:r[0-9]+]], 0
|
||||
; CHECK: stw [[REGISTER]], sp[1]
|
||||
; CHECK: bl f
|
||||
; CHECK-NEXT: ldw r0, sp[2]
|
||||
; CHECK-NEXT: retsp 3
|
||||
;
|
||||
body:
|
||||
%0 = call { i32, i32, i32, i32, i32 } @f(i32 0, i32 0, i32 0, i32 0, i32 0)
|
||||
%1 = extractvalue { i32, i32, i32, i32, i32 } %0, 4
|
||||
ret i32 %1
|
||||
}
|
||||
|
||||
; Variadic functions return structs bigger than 4 words via a hidden
|
||||
; sret-parameter
|
||||
define internal %1 @ReturnBigStruct2(i32 %dummy, ...) nounwind readnone {
|
||||
entry:
|
||||
%0 = insertvalue %1 zeroinitializer, i32 12, 0
|
||||
%1 = insertvalue %1 %0, i32 24, 1
|
||||
%2 = insertvalue %1 %1, i32 48, 2
|
||||
%3 = insertvalue %1 %2, i32 24601, 3
|
||||
%4 = insertvalue %1 %3, i32 4321, 4
|
||||
ret %1 %4
|
||||
}
|
||||
; CHECK-LABEL: ReturnBigStruct2:
|
||||
; CHECK: ldc r1, 4321
|
||||
; CHECK: stw r1, r0[4]
|
||||
; CHECK: ldc r1, 24601
|
||||
; CHECK: stw r1, r0[3]
|
||||
; CHECK: ldc r1, 48
|
||||
; CHECK: stw r1, r0[2]
|
||||
; CHECK: ldc r1, 24
|
||||
; CHECK: stw r1, r0[1]
|
||||
; CHECK: ldc r1, 12
|
||||
; CHECK: stw r1, r0[0]
|
||||
; CHECK: retsp 0
|
||||
73
external/llvm/test/CodeGen/XCore/byVal.ll
vendored
73
external/llvm/test/CodeGen/XCore/byVal.ll
vendored
@ -1,73 +0,0 @@
|
||||
; RUN: llc < %s -march=xcore | FileCheck %s
|
||||
|
||||
; CHECK-LABEL: f0Test
|
||||
; CHECK: entsp 1
|
||||
; CHECK: bl f0
|
||||
; CHECK: retsp 1
|
||||
%struct.st0 = type { [0 x i32] }
|
||||
declare void @f0(%struct.st0*) nounwind
|
||||
define void @f0Test(%struct.st0* byval %s0) nounwind {
|
||||
entry:
|
||||
call void @f0(%struct.st0* %s0) nounwind
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECK-LABEL: f1Test
|
||||
; CHECK: entsp 13
|
||||
; CHECK: stw r4, sp[12]
|
||||
; CHECK: stw r5, sp[11]
|
||||
; CHECK: mov r4, r0
|
||||
; CHECK: ldaw r5, sp[1]
|
||||
; CHECK: ldc r2, 40
|
||||
; CHECK: mov r0, r5
|
||||
; CHECK: bl __memcpy_4
|
||||
; CHECK: mov r0, r5
|
||||
; CHECK: bl f1
|
||||
; CHECK: mov r0, r4
|
||||
; CHECK: ldw r5, sp[11]
|
||||
; CHECK: ldw r4, sp[12]
|
||||
; CHECK: retsp 13
|
||||
%struct.st1 = type { [10 x i32] }
|
||||
declare void @f1(%struct.st1*) nounwind
|
||||
define i32 @f1Test(i32 %i, %struct.st1* byval %s1) nounwind {
|
||||
entry:
|
||||
call void @f1(%struct.st1* %s1) nounwind
|
||||
ret i32 %i
|
||||
}
|
||||
|
||||
; CHECK-LABEL: f2Test
|
||||
; CHECK: extsp 4
|
||||
; CHECK: stw lr, sp[1]
|
||||
; CHECK: stw r2, sp[3]
|
||||
; CHECK: stw r3, sp[4]
|
||||
; CHECK: ldw r0, r0[0]
|
||||
; CHECK: stw r0, sp[2]
|
||||
; CHECK: ldaw r2, sp[2]
|
||||
; CHECK: mov r0, r1
|
||||
; CHECK: mov r1, r2
|
||||
; CHECK: bl f2
|
||||
; CHECK: ldw lr, sp[1]
|
||||
; CHECK: ldaw sp, sp[4]
|
||||
; CHECK: retsp 0
|
||||
%struct.st2 = type { i32 }
|
||||
declare void @f2(i32, %struct.st2*) nounwind
|
||||
define void @f2Test(%struct.st2* byval %s2, i32 %i, ...) nounwind {
|
||||
entry:
|
||||
call void @f2(i32 %i, %struct.st2* %s2)
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECK-LABEL: f3Test
|
||||
; CHECK: entsp 2
|
||||
; CHECK: ldc r1, 0
|
||||
; CHECK: ld8u r2, r0[r1]
|
||||
; CHECK: ldaw r0, sp[1]
|
||||
; CHECK: st8 r2, r0[r1]
|
||||
; CHECK: bl f
|
||||
; CHECK: retsp 2
|
||||
declare void @f3(i8*) nounwind
|
||||
define void @f3Test(i8* byval %v) nounwind {
|
||||
entry:
|
||||
call void @f3(i8* %v) nounwind
|
||||
ret void
|
||||
}
|
||||
10
external/llvm/test/CodeGen/XCore/call.ll
vendored
10
external/llvm/test/CodeGen/XCore/call.ll
vendored
@ -1,10 +0,0 @@
|
||||
; RUN: llc < %s -march=xcore | FileCheck %s
|
||||
|
||||
; CHECK-LABEL: bl_imm:
|
||||
; CHECK: ldw [[R0:r[0-9]+]], cp
|
||||
; CHECK: bla [[R0]]
|
||||
define void @bl_imm() nounwind {
|
||||
entry:
|
||||
tail call void inttoptr (i64 65536 to void ()*)() nounwind
|
||||
ret void
|
||||
}
|
||||
213
external/llvm/test/CodeGen/XCore/codemodel.ll
vendored
213
external/llvm/test/CodeGen/XCore/codemodel.ll
vendored
@ -1,213 +0,0 @@
|
||||
|
||||
; RUN: not llc < %s -march=xcore -code-model=medium 2>&1 | FileCheck %s -check-prefix=BAD_CM
|
||||
; RUN: not llc < %s -march=xcore -code-model=kernel 2>&1 | FileCheck %s -check-prefix=BAD_CM
|
||||
; BAD_CM: Target only supports CodeModel Small or Large
|
||||
|
||||
|
||||
; RUN: llc < %s -march=xcore | FileCheck %s
|
||||
; RUN: llc < %s -march=xcore -code-model=small | FileCheck %s
|
||||
; RUN: llc < %s -march=xcore -code-model=large | FileCheck %s -check-prefix=LARGE
|
||||
|
||||
|
||||
; CHECK-LABEL: test:
|
||||
; CHECK: zext r0, 1
|
||||
; CHECK: bt r0, [[JUMP:.LBB[0-9_]*]]
|
||||
; CHECK: ldaw r0, dp[A2]
|
||||
; CHECK: retsp 0
|
||||
; CHECK: [[JUMP]]
|
||||
; CHECK: ldaw r0, dp[A1]
|
||||
; CHECK: retsp 0
|
||||
; LARGE-LABEL: test:
|
||||
; LARGE: zext r0, 1
|
||||
; LARGE: ldaw r11, cp[.LCPI{{[0-9_]*}}]
|
||||
; LARGE: mov r1, r11
|
||||
; LARGE: ldaw r11, cp[.LCPI{{[0-9_]*}}]
|
||||
; LARGE: bt r0, [[JUMP:.LBB[0-9_]*]]
|
||||
; LARGE: mov r11, r1
|
||||
; LARGE: [[JUMP]]
|
||||
; LARGE: ldw r0, r11[0]
|
||||
; LARGE: retsp 0
|
||||
@A1 = external global [50000 x i32]
|
||||
@A2 = external global [50000 x i32]
|
||||
define [50000 x i32]* @test(i1 %bool) nounwind {
|
||||
entry:
|
||||
%Addr = select i1 %bool, [50000 x i32]* @A1, [50000 x i32]* @A2
|
||||
ret [50000 x i32]* %Addr
|
||||
}
|
||||
|
||||
|
||||
; CHECK: .section .cp.rodata.cst4,"aMc",@progbits,4
|
||||
; CHECK: .long 65536
|
||||
; CHECK: .text
|
||||
; CHECK-LABEL: f:
|
||||
; CHECK: ldc r1, 65532
|
||||
; CHECK: add r1, r0, r1
|
||||
; CHECK: ldw r1, r1[0]
|
||||
; CHECK: ldw r2, cp[.LCPI{{[0-9_]*}}]
|
||||
; CHECK: add r0, r0, r2
|
||||
; CHECK: ldw r0, r0[0]
|
||||
; CHECK: add r0, r1, r0
|
||||
; CHECK: ldw r1, dp[l]
|
||||
; CHECK: add r0, r0, r1
|
||||
; CHECK: ldw r1, dp[l+4]
|
||||
; CHECK: add r0, r0, r1
|
||||
; CHECK: ldw r1, dp[l+392]
|
||||
; CHECK: add r0, r0, r1
|
||||
; CHECK: ldw r1, dp[l+396]
|
||||
; CHECK: add r0, r0, r1
|
||||
; CHECK: ldw r1, dp[s]
|
||||
; CHECK: add r0, r0, r1
|
||||
; CHECK: ldw r1, dp[s+36]
|
||||
; CHECK: add r0, r0, r1
|
||||
; CHECK: retsp 0
|
||||
;
|
||||
; LARGE: .section .cp.rodata.cst4,"aMc",@progbits,4
|
||||
; LARGE: .long 65536
|
||||
; LARGE: .section .cp.rodata,"ac",@progbits
|
||||
; LARGE: .long l
|
||||
; LARGE: .long l+4
|
||||
; LARGE: .long l+392
|
||||
; LARGE: .long l+396
|
||||
; LARGE: .text
|
||||
; LARGE-LABEL: f:
|
||||
; LARGE: ldc r1, 65532
|
||||
; LARGE: add r1, r0, r1
|
||||
; LARGE: ldw r1, r1[0]
|
||||
; LARGE: ldw r2, cp[.LCPI{{[0-9_]*}}]
|
||||
; LARGE: add r0, r0, r2
|
||||
; LARGE: ldw r0, r0[0]
|
||||
; LARGE: add r0, r1, r0
|
||||
; LARGE: ldw r1, cp[.LCPI{{[0-9_]*}}]
|
||||
; LARGE: ldw r1, r1[0]
|
||||
; LARGE: add r0, r0, r1
|
||||
; LARGE: ldw r1, cp[.LCPI{{[0-9_]*}}]
|
||||
; LARGE: ldw r1, r1[0]
|
||||
; LARGE: add r0, r0, r1
|
||||
; LARGE: ldw r1, cp[.LCPI{{[0-9_]*}}]
|
||||
; LARGE: ldw r1, r1[0]
|
||||
; LARGE: add r0, r0, r1
|
||||
; LARGE: ldw r1, cp[.LCPI{{[0-9_]*}}]
|
||||
; LARGE: ldw r1, r1[0]
|
||||
; LARGE: add r0, r0, r1
|
||||
; LARGE: ldw r1, dp[s]
|
||||
; LARGE: add r0, r0, r1
|
||||
; LARGE: ldw r1, dp[s+36]
|
||||
; LARGE: add r0, r0, r1
|
||||
; LARGE: retsp 0
|
||||
define i32 @f(i32* %i) {
|
||||
entry:
|
||||
%0 = getelementptr inbounds i32, i32* %i, i32 16383
|
||||
%1 = load i32, i32* %0
|
||||
%2 = getelementptr inbounds i32, i32* %i, i32 16384
|
||||
%3 = load i32, i32* %2
|
||||
%4 = add nsw i32 %1, %3
|
||||
%5 = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @l, i32 0, i32 0)
|
||||
%6 = add nsw i32 %4, %5
|
||||
%7 = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @l, i32 0, i32 1)
|
||||
%8 = add nsw i32 %6, %7
|
||||
%9 = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @l, i32 0, i32 98)
|
||||
%10 = add nsw i32 %8, %9
|
||||
%11 = load i32, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @l, i32 0, i32 99)
|
||||
%12 = add nsw i32 %10, %11
|
||||
%13 = load i32, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @s, i32 0, i32 0)
|
||||
%14 = add nsw i32 %12, %13
|
||||
%15 = load i32, i32* getelementptr inbounds ([10 x i32], [10 x i32]* @s, i32 0, i32 9)
|
||||
%16 = add nsw i32 %14, %15
|
||||
ret i32 %16
|
||||
}
|
||||
|
||||
|
||||
; CHECK-LABEL: UnknownSize:
|
||||
; CHECK: ldw r0, dp[NoSize+40]
|
||||
; CHECK-NEXT: retsp 0
|
||||
;
|
||||
; LARGE: .section .cp.rodata,"ac",@progbits
|
||||
; LARGE: .LCPI{{[0-9_]*}}
|
||||
; LARGE-NEXT: .long NoSize
|
||||
; LARGE-NEXT: .text
|
||||
; LARGE-LABEL: UnknownSize:
|
||||
; LARGE: ldw r0, cp[.LCPI{{[0-9_]*}}]
|
||||
; LARGE-NEXT: ldw r0, r0[0]
|
||||
; LARGE-NEXT: retsp 0
|
||||
@NoSize = external global [0 x i32]
|
||||
define i32 @UnknownSize() nounwind {
|
||||
entry:
|
||||
%0 = load i32, i32* getelementptr inbounds ([0 x i32], [0 x i32]* @NoSize, i32 0, i32 10)
|
||||
ret i32 %0
|
||||
}
|
||||
|
||||
|
||||
; CHECK-LABEL: UnknownStruct:
|
||||
; CHECK: ldaw r0, dp[Unknown]
|
||||
; CHECK-NEXT: retsp 0
|
||||
;
|
||||
; LARGE: .section .cp.rodata,"ac",@progbits
|
||||
; LARGE: .LCPI{{[0-9_]*}}
|
||||
; LARGE-NEXT: .long Unknown
|
||||
; LARGE-NEXT: .text
|
||||
; LARGE-LABEL: UnknownStruct:
|
||||
; LARGE: ldw r0, cp[.LCPI{{[0-9_]*}}]
|
||||
; LARGE-NEXT: retsp 0
|
||||
%Struct = type opaque
|
||||
@Unknown = external global %Struct
|
||||
define %Struct* @UnknownStruct() nounwind {
|
||||
entry:
|
||||
ret %Struct* @Unknown
|
||||
}
|
||||
|
||||
|
||||
; CHECK: .section .dp.bss,"awd",@nobits
|
||||
; CHECK-LABEL: l:
|
||||
; CHECK: .space 400
|
||||
; LARGE: .section .dp.bss.large,"awd",@nobits
|
||||
; LARGE-LABEL: l:
|
||||
; LARGE: .space 400
|
||||
@l = global [100 x i32] zeroinitializer
|
||||
|
||||
; CHECK-LABEL: s:
|
||||
; CHECK: .space 40
|
||||
; LARGE: .section .dp.bss,"awd",@nobits
|
||||
; LARGE-LABEL: s:
|
||||
; LARGE: .space 40
|
||||
@s = global [10 x i32] zeroinitializer
|
||||
|
||||
; CHECK: .section .dp.rodata,"awd",@progbits
|
||||
; CHECK-LABEL: cl:
|
||||
; CHECK: .space 400
|
||||
; LARGE: .section .dp.rodata.large,"awd",@progbits
|
||||
; LARGE-LABEL: cl:
|
||||
; LARGE: .space 400
|
||||
@cl = constant [100 x i32] zeroinitializer
|
||||
|
||||
; CHECK-LABEL: cs:
|
||||
; CHECK: .space 40
|
||||
; LARGE: .section .dp.rodata,"awd",@progbits
|
||||
; LARGE-LABEL: cs:
|
||||
; LARGE: .space 40
|
||||
@cs = constant [10 x i32] zeroinitializer
|
||||
|
||||
; CHECK: .section .cp.rodata,"ac",@progbits
|
||||
; CHECK-LABEL: icl:
|
||||
; CHECK: .space 400
|
||||
; LARGE: .section .cp.rodata.large,"ac",@progbits
|
||||
; LARGE-LABEL: icl:
|
||||
; LARGE: .space 400
|
||||
@icl = internal constant [100 x i32] zeroinitializer
|
||||
|
||||
; CHECK-LABEL: cs:
|
||||
; CHECK: .space 40
|
||||
; LARGE: .section .cp.rodata,"ac",@progbits
|
||||
; LARGE-LABEL: cs:
|
||||
; LARGE: .space 40
|
||||
@ics = internal constant [10 x i32] zeroinitializer
|
||||
|
||||
; CHECK: .section .cp.namedsection,"ac",@progbits
|
||||
; CHECK-LABEL: cpsec:
|
||||
; CHECK: .long 0
|
||||
@cpsec = constant i32 0, section ".cp.namedsection"
|
||||
|
||||
; CHECK: .section .dp.namedsection,"awd",@progbits
|
||||
; CHECK-LABEL: dpsec:
|
||||
; CHECK: .long 0
|
||||
@dpsec = global i32 0, section ".dp.namedsection"
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user