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Imported Upstream version 5.18.0.167
Former-commit-id: 289509151e0fee68a1b591a20c9f109c3c789d3a
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external/llvm/test/CodeGen/X86/vec_set-7.ll
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external/llvm/test/CodeGen/X86/vec_set-7.ll
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@ -1,23 +0,0 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
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define <2 x i64> @test(<2 x i64>* %p) nounwind {
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; X86-LABEL: test:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; X86-NEXT: retl
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;
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; X64-LABEL: test:
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; X64: # %bb.0:
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; X64-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; X64-NEXT: retq
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%tmp = bitcast <2 x i64>* %p to double*
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%tmp.upgrd.1 = load double, double* %tmp
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%tmp.upgrd.2 = insertelement <2 x double> undef, double %tmp.upgrd.1, i32 0
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%tmp5 = insertelement <2 x double> %tmp.upgrd.2, double 0.0, i32 1
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%tmp.upgrd.3 = bitcast <2 x double> %tmp5 to <2 x i64>
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ret <2 x i64> %tmp.upgrd.3
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}
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