Imported Upstream version 5.18.0.167

Former-commit-id: 289509151e0fee68a1b591a20c9f109c3c789d3a

external/llvm/test/CodeGen/X86/GlobalISel/GV.ll

@@ -1,63 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu    -global-isel -verify-machineinstrs                       < %s -o - | FileCheck %s --check-prefix=X64
-; RUN: llc -mtriple=x86_64-apple-darwin -global-isel -verify-machineinstrs -relocation-model=pic < %s -o - | FileCheck %s --check-prefix=X64_DARWIN_PIC
-; RUN: llc -mtriple=i386-linux-gnu      -global-isel -verify-machineinstrs                       < %s -o - | FileCheck %s --check-prefix=X32
-; RUN: llc -mtriple=x86_64-linux-gnux32 -global-isel -verify-machineinstrs                       < %s -o - | FileCheck %s --check-prefix=X32ABI
-
-@g_int = global i32 0, align 4
-
-; Function Attrs: noinline nounwind optnone uwtable
-define i32* @test_global_ptrv() #3 {
-; X64-LABEL: test_global_ptrv:
-; X64:       # %bb.0: # %entry
-; X64-NEXT:    leaq g_int, %rax
-; X64-NEXT:    retq
-;
-; X64_DARWIN_PIC-LABEL: test_global_ptrv:
-; X64_DARWIN_PIC:       ## %bb.0: ## %entry
-; X64_DARWIN_PIC-NEXT:    leaq _g_int(%rip), %rax
-; X64_DARWIN_PIC-NEXT:    retq
-;
-; X32-LABEL: test_global_ptrv:
-; X32:       # %bb.0: # %entry
-; X32-NEXT:    leal g_int, %eax
-; X32-NEXT:    retl
-;
-; X32ABI-LABEL: test_global_ptrv:
-; X32ABI:       # %bb.0: # %entry
-; X32ABI-NEXT:    leal g_int, %eax
-; X32ABI-NEXT:    retq
-entry:
-  ret i32* @g_int
-}
-
-; Function Attrs: noinline nounwind optnone uwtable
-define i32 @test_global_valv() #3 {
-; X64-LABEL: test_global_valv:
-; X64:       # %bb.0: # %entry
-; X64-NEXT:    leaq g_int, %rax
-; X64-NEXT:    movl (%rax), %eax
-; X64-NEXT:    retq
-;
-; X64_DARWIN_PIC-LABEL: test_global_valv:
-; X64_DARWIN_PIC:       ## %bb.0: ## %entry
-; X64_DARWIN_PIC-NEXT:    leaq _g_int(%rip), %rax
-; X64_DARWIN_PIC-NEXT:    movl (%rax), %eax
-; X64_DARWIN_PIC-NEXT:    retq
-;
-; X32-LABEL: test_global_valv:
-; X32:       # %bb.0: # %entry
-; X32-NEXT:    leal g_int, %eax
-; X32-NEXT:    movl (%eax), %eax
-; X32-NEXT:    retl
-;
-; X32ABI-LABEL: test_global_valv:
-; X32ABI:       # %bb.0: # %entry
-; X32ABI-NEXT:    leal g_int, %eax
-; X32ABI-NEXT:    movl (%eax), %eax
-; X32ABI-NEXT:    retq
-entry:
-  %0 = load i32, i32* @g_int, align 4
-  ret i32 %0
-}
-

external/llvm/test/CodeGen/X86/GlobalISel/add-scalar.ll

@@ -1,102 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
-; RUN: llc -mtriple=i386-linux-gnu   -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X32
-
-define i64 @test_add_i64(i64 %arg1, i64 %arg2) {
-; X64-LABEL: test_add_i64:
-; X64:       # %bb.0:
-; X64-NEXT:    leaq (%rsi,%rdi), %rax
-; X64-NEXT:    retq
-;
-; X32-LABEL: test_add_i64:
-; X32:       # %bb.0:
-; X32-NEXT:    pushl %ebp
-; X32-NEXT:    .cfi_def_cfa_offset 8
-; X32-NEXT:    .cfi_offset %ebp, -8
-; X32-NEXT:    movl %esp, %ebp
-; X32-NEXT:    .cfi_def_cfa_register %ebp
-; X32-NEXT:    movl 16(%ebp), %eax
-; X32-NEXT:    movl 20(%ebp), %edx
-; X32-NEXT:    addl 8(%ebp), %eax
-; X32-NEXT:    adcl 12(%ebp), %edx
-; X32-NEXT:    popl %ebp
-; X32-NEXT:    retl
-  %ret = add i64 %arg1, %arg2
-  ret i64 %ret
-}
-
-define i32 @test_add_i32(i32 %arg1, i32 %arg2) {
-; X64-LABEL: test_add_i32:
-; X64:       # %bb.0:
-; X64-NEXT:    # kill: def %edi killed %edi def %rdi
-; X64-NEXT:    # kill: def %esi killed %esi def %rsi
-; X64-NEXT:    leal (%rsi,%rdi), %eax
-; X64-NEXT:    retq
-;
-; X32-LABEL: test_add_i32:
-; X32:       # %bb.0:
-; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT:    addl {{[0-9]+}}(%esp), %eax
-; X32-NEXT:    retl
-  %ret = add i32 %arg1, %arg2
-  ret i32 %ret
-}
-
-define i16 @test_add_i16(i16 %arg1, i16 %arg2) {
-; X64-LABEL: test_add_i16:
-; X64:       # %bb.0:
-; X64-NEXT:    # kill: def %edi killed %edi def %rdi
-; X64-NEXT:    # kill: def %esi killed %esi def %rsi
-; X64-NEXT:    leal (%rsi,%rdi), %eax
-; X64-NEXT:    # kill: def %ax killed %ax killed %eax
-; X64-NEXT:    retq
-;
-; X32-LABEL: test_add_i16:
-; X32:       # %bb.0:
-; X32-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
-; X32-NEXT:    addw {{[0-9]+}}(%esp), %ax
-; X32-NEXT:    retl
-  %ret = add i16 %arg1, %arg2
-  ret i16 %ret
-}
-
-define i8 @test_add_i8(i8 %arg1, i8 %arg2) {
-; X64-LABEL: test_add_i8:
-; X64:       # %bb.0:
-; X64-NEXT:    addb %dil, %sil
-; X64-NEXT:    movl %esi, %eax
-; X64-NEXT:    retq
-;
-; X32-LABEL: test_add_i8:
-; X32:       # %bb.0:
-; X32-NEXT:    movb {{[0-9]+}}(%esp), %al
-; X32-NEXT:    addb {{[0-9]+}}(%esp), %al
-; X32-NEXT:    retl
-  %ret = add i8 %arg1, %arg2
-  ret i8 %ret
-}
-
-define i32 @test_add_i1(i32 %arg1, i32 %arg2) {
-; X64-LABEL: test_add_i1:
-; X64:       # %bb.0:
-; X64-NEXT:    cmpl %esi, %edi
-; X64-NEXT:    sete %al
-; X64-NEXT:    addb %al, %al
-; X64-NEXT:    movzbl %al, %eax
-; X64-NEXT:    andl $1, %eax
-; X64-NEXT:    retq
-;
-; X32-LABEL: test_add_i1:
-; X32:       # %bb.0:
-; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT:    cmpl %eax, {{[0-9]+}}(%esp)
-; X32-NEXT:    sete %al
-; X32-NEXT:    addb %al, %al
-; X32-NEXT:    movzbl %al, %eax
-; X32-NEXT:    andl $1, %eax
-; X32-NEXT:    retl
-  %c = icmp eq i32 %arg1, %arg2
-  %x = add i1 %c , %c
-  %ret = zext i1 %x to i32
-  ret i32 %ret
-}

external/llvm/test/CodeGen/X86/GlobalISel/add-vec.ll

@@ -1,250 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -mcpu=skx        -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=SKX
-; RUN: llc -mtriple=x86_64-linux-gnu -mcpu=core-avx2  -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=AVX2
-; RUN: llc -mtriple=x86_64-linux-gnu -mcpu=corei7-avx -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=AVX1
-
-
-define <16 x i8> @test_add_v16i8(<16 x i8> %arg1, <16 x i8> %arg2) {
-; ALL-LABEL: test_add_v16i8:
-; ALL:       # %bb.0:
-; ALL-NEXT:    vpaddb %xmm1, %xmm0, %xmm0
-; ALL-NEXT:    retq
-  %ret = add <16 x i8> %arg1, %arg2
-  ret <16 x i8> %ret
-}
-
-define <8 x i16> @test_add_v8i16(<8 x i16> %arg1, <8 x i16> %arg2) {
-; ALL-LABEL: test_add_v8i16:
-; ALL:       # %bb.0:
-; ALL-NEXT:    vpaddw %xmm1, %xmm0, %xmm0
-; ALL-NEXT:    retq
-  %ret = add <8 x i16> %arg1, %arg2
-  ret <8 x i16> %ret
-}
-
-define <4 x i32> @test_add_v4i32(<4 x i32> %arg1, <4 x i32> %arg2) {
-; ALL-LABEL: test_add_v4i32:
-; ALL:       # %bb.0:
-; ALL-NEXT:    vpaddd %xmm1, %xmm0, %xmm0
-; ALL-NEXT:    retq
-  %ret = add <4 x i32> %arg1, %arg2
-  ret <4 x i32> %ret
-}
-
-define <2 x i64> @test_add_v2i64(<2 x i64> %arg1, <2 x i64> %arg2) {
-; ALL-LABEL: test_add_v2i64:
-; ALL:       # %bb.0:
-; ALL-NEXT:    vpaddq %xmm1, %xmm0, %xmm0
-; ALL-NEXT:    retq
-  %ret = add <2 x i64> %arg1, %arg2
-  ret <2 x i64> %ret
-}
-
-define <32 x i8> @test_add_v32i8(<32 x i8> %arg1, <32 x i8> %arg2) {
-; SKX-LABEL: test_add_v32i8:
-; SKX:       # %bb.0:
-; SKX-NEXT:    vpaddb %ymm1, %ymm0, %ymm0
-; SKX-NEXT:    retq
-;
-; AVX2-LABEL: test_add_v32i8:
-; AVX2:       # %bb.0:
-; AVX2-NEXT:    vpaddb %ymm1, %ymm0, %ymm0
-; AVX2-NEXT:    retq
-;
-; AVX1-LABEL: test_add_v32i8:
-; AVX1:       # %bb.0:
-; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
-; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm3
-; AVX1-NEXT:    vpaddb %xmm3, %xmm2, %xmm2
-; AVX1-NEXT:    vpaddb %xmm1, %xmm0, %xmm0
-; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
-; AVX1-NEXT:    retq
-  %ret = add <32 x i8> %arg1, %arg2
-  ret <32 x i8> %ret
-}
-
-define <16 x i16> @test_add_v16i16(<16 x i16> %arg1, <16 x i16> %arg2) {
-; SKX-LABEL: test_add_v16i16:
-; SKX:       # %bb.0:
-; SKX-NEXT:    vpaddw %ymm1, %ymm0, %ymm0
-; SKX-NEXT:    retq
-;
-; AVX2-LABEL: test_add_v16i16:
-; AVX2:       # %bb.0:
-; AVX2-NEXT:    vpaddw %ymm1, %ymm0, %ymm0
-; AVX2-NEXT:    retq
-;
-; AVX1-LABEL: test_add_v16i16:
-; AVX1:       # %bb.0:
-; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
-; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm3
-; AVX1-NEXT:    vpaddw %xmm3, %xmm2, %xmm2
-; AVX1-NEXT:    vpaddw %xmm1, %xmm0, %xmm0
-; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
-; AVX1-NEXT:    retq
-  %ret = add <16 x i16> %arg1, %arg2
-  ret <16 x i16> %ret
-}
-
-define <8 x i32> @test_add_v8i32(<8 x i32> %arg1, <8 x i32> %arg2) {
-; SKX-LABEL: test_add_v8i32:
-; SKX:       # %bb.0:
-; SKX-NEXT:    vpaddd %ymm1, %ymm0, %ymm0
-; SKX-NEXT:    retq
-;
-; AVX2-LABEL: test_add_v8i32:
-; AVX2:       # %bb.0:
-; AVX2-NEXT:    vpaddd %ymm1, %ymm0, %ymm0
-; AVX2-NEXT:    retq
-;
-; AVX1-LABEL: test_add_v8i32:
-; AVX1:       # %bb.0:
-; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
-; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm3
-; AVX1-NEXT:    vpaddd %xmm3, %xmm2, %xmm2
-; AVX1-NEXT:    vpaddd %xmm1, %xmm0, %xmm0
-; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
-; AVX1-NEXT:    retq
-  %ret = add <8 x i32> %arg1, %arg2
-  ret <8 x i32> %ret
-}
-
-define <4 x i64> @test_add_v4i64(<4 x i64> %arg1, <4 x i64> %arg2) {
-; SKX-LABEL: test_add_v4i64:
-; SKX:       # %bb.0:
-; SKX-NEXT:    vpaddq %ymm1, %ymm0, %ymm0
-; SKX-NEXT:    retq
-;
-; AVX2-LABEL: test_add_v4i64:
-; AVX2:       # %bb.0:
-; AVX2-NEXT:    vpaddq %ymm1, %ymm0, %ymm0
-; AVX2-NEXT:    retq
-;
-; AVX1-LABEL: test_add_v4i64:
-; AVX1:       # %bb.0:
-; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
-; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm3
-; AVX1-NEXT:    vpaddq %xmm3, %xmm2, %xmm2
-; AVX1-NEXT:    vpaddq %xmm1, %xmm0, %xmm0
-; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
-; AVX1-NEXT:    retq
-  %ret = add <4 x i64> %arg1, %arg2
-  ret <4 x i64> %ret
-}
-
-define <64 x i8> @test_add_v64i8(<64 x i8> %arg1, <64 x i8> %arg2) {
-; SKX-LABEL: test_add_v64i8:
-; SKX:       # %bb.0:
-; SKX-NEXT:    vpaddb %zmm1, %zmm0, %zmm0
-; SKX-NEXT:    retq
-;
-; AVX2-LABEL: test_add_v64i8:
-; AVX2:       # %bb.0:
-; AVX2-NEXT:    vpaddb %ymm2, %ymm0, %ymm0
-; AVX2-NEXT:    vpaddb %ymm3, %ymm1, %ymm1
-; AVX2-NEXT:    retq
-;
-; AVX1-LABEL: test_add_v64i8:
-; AVX1:       # %bb.0:
-; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm4
-; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm5
-; AVX1-NEXT:    vextractf128 $1, %ymm2, %xmm6
-; AVX1-NEXT:    vpaddb %xmm6, %xmm4, %xmm4
-; AVX1-NEXT:    vextractf128 $1, %ymm3, %xmm6
-; AVX1-NEXT:    vpaddb %xmm6, %xmm5, %xmm5
-; AVX1-NEXT:    vpaddb %xmm2, %xmm0, %xmm0
-; AVX1-NEXT:    vpaddb %xmm3, %xmm1, %xmm1
-; AVX1-NEXT:    vinsertf128 $1, %xmm4, %ymm0, %ymm0
-; AVX1-NEXT:    vinsertf128 $1, %xmm5, %ymm1, %ymm1
-; AVX1-NEXT:    retq
-  %ret = add <64 x i8> %arg1, %arg2
-  ret <64 x i8> %ret
-}
-
-define <32 x i16> @test_add_v32i16(<32 x i16> %arg1, <32 x i16> %arg2) {
-; SKX-LABEL: test_add_v32i16:
-; SKX:       # %bb.0:
-; SKX-NEXT:    vpaddw %zmm1, %zmm0, %zmm0
-; SKX-NEXT:    retq
-;
-; AVX2-LABEL: test_add_v32i16:
-; AVX2:       # %bb.0:
-; AVX2-NEXT:    vpaddw %ymm2, %ymm0, %ymm0
-; AVX2-NEXT:    vpaddw %ymm3, %ymm1, %ymm1
-; AVX2-NEXT:    retq
-;
-; AVX1-LABEL: test_add_v32i16:
-; AVX1:       # %bb.0:
-; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm4
-; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm5
-; AVX1-NEXT:    vextractf128 $1, %ymm2, %xmm6
-; AVX1-NEXT:    vpaddw %xmm6, %xmm4, %xmm4
-; AVX1-NEXT:    vextractf128 $1, %ymm3, %xmm6
-; AVX1-NEXT:    vpaddw %xmm6, %xmm5, %xmm5
-; AVX1-NEXT:    vpaddw %xmm2, %xmm0, %xmm0
-; AVX1-NEXT:    vpaddw %xmm3, %xmm1, %xmm1
-; AVX1-NEXT:    vinsertf128 $1, %xmm4, %ymm0, %ymm0
-; AVX1-NEXT:    vinsertf128 $1, %xmm5, %ymm1, %ymm1
-; AVX1-NEXT:    retq
-  %ret = add <32 x i16> %arg1, %arg2
-  ret <32 x i16> %ret
-}
-
-define <16 x i32> @test_add_v16i32(<16 x i32> %arg1, <16 x i32> %arg2) {
-; SKX-LABEL: test_add_v16i32:
-; SKX:       # %bb.0:
-; SKX-NEXT:    vpaddd %zmm1, %zmm0, %zmm0
-; SKX-NEXT:    retq
-;
-; AVX2-LABEL: test_add_v16i32:
-; AVX2:       # %bb.0:
-; AVX2-NEXT:    vpaddd %ymm2, %ymm0, %ymm0
-; AVX2-NEXT:    vpaddd %ymm3, %ymm1, %ymm1
-; AVX2-NEXT:    retq
-;
-; AVX1-LABEL: test_add_v16i32:
-; AVX1:       # %bb.0:
-; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm4
-; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm5
-; AVX1-NEXT:    vextractf128 $1, %ymm2, %xmm6
-; AVX1-NEXT:    vpaddd %xmm6, %xmm4, %xmm4
-; AVX1-NEXT:    vextractf128 $1, %ymm3, %xmm6
-; AVX1-NEXT:    vpaddd %xmm6, %xmm5, %xmm5
-; AVX1-NEXT:    vpaddd %xmm2, %xmm0, %xmm0
-; AVX1-NEXT:    vpaddd %xmm3, %xmm1, %xmm1
-; AVX1-NEXT:    vinsertf128 $1, %xmm4, %ymm0, %ymm0
-; AVX1-NEXT:    vinsertf128 $1, %xmm5, %ymm1, %ymm1
-; AVX1-NEXT:    retq
-  %ret = add <16 x i32> %arg1, %arg2
-  ret <16 x i32> %ret
-}
-
-define <8 x i64> @test_add_v8i64(<8 x i64> %arg1, <8 x i64> %arg2) {
-; SKX-LABEL: test_add_v8i64:
-; SKX:       # %bb.0:
-; SKX-NEXT:    vpaddq %zmm1, %zmm0, %zmm0
-; SKX-NEXT:    retq
-;
-; AVX2-LABEL: test_add_v8i64:
-; AVX2:       # %bb.0:
-; AVX2-NEXT:    vpaddq %ymm2, %ymm0, %ymm0
-; AVX2-NEXT:    vpaddq %ymm3, %ymm1, %ymm1
-; AVX2-NEXT:    retq
-;
-; AVX1-LABEL: test_add_v8i64:
-; AVX1:       # %bb.0:
-; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm4
-; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm5
-; AVX1-NEXT:    vextractf128 $1, %ymm2, %xmm6
-; AVX1-NEXT:    vpaddq %xmm6, %xmm4, %xmm4
-; AVX1-NEXT:    vextractf128 $1, %ymm3, %xmm6
-; AVX1-NEXT:    vpaddq %xmm6, %xmm5, %xmm5
-; AVX1-NEXT:    vpaddq %xmm2, %xmm0, %xmm0
-; AVX1-NEXT:    vpaddq %xmm3, %xmm1, %xmm1
-; AVX1-NEXT:    vinsertf128 $1, %xmm4, %ymm0, %ymm0
-; AVX1-NEXT:    vinsertf128 $1, %xmm5, %ymm1, %ymm1
-; AVX1-NEXT:    retq
-  %ret = add <8 x i64> %arg1, %arg2
-  ret <8 x i64> %ret
-}
-

external/llvm/test/CodeGen/X86/GlobalISel/and-scalar.ll

@@ -1,58 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL
-
-define i32 @test_and_i1(i32 %arg1, i32 %arg2) {
-; ALL-LABEL: test_and_i1:
-; ALL:       # %bb.0:
-; ALL-NEXT:    cmpl %esi, %edi
-; ALL-NEXT:    sete %al
-; ALL-NEXT:    andb %al, %al
-; ALL-NEXT:    movzbl %al, %eax
-; ALL-NEXT:    andl $1, %eax
-; ALL-NEXT:    retq
-  %c = icmp eq i32 %arg1, %arg2
-  %x = and i1 %c , %c
-  %ret = zext i1 %x to i32
-  ret i32 %ret
-}
-
-define i8 @test_and_i8(i8 %arg1, i8 %arg2) {
-; ALL-LABEL: test_and_i8:
-; ALL:       # %bb.0:
-; ALL-NEXT:    andb %dil, %sil
-; ALL-NEXT:    movl %esi, %eax
-; ALL-NEXT:    retq
-  %ret = and i8 %arg1, %arg2
-  ret i8 %ret
-}
-
-define i16 @test_and_i16(i16 %arg1, i16 %arg2) {
-; ALL-LABEL: test_and_i16:
-; ALL:       # %bb.0:
-; ALL-NEXT:    andw %di, %si
-; ALL-NEXT:    movl %esi, %eax
-; ALL-NEXT:    retq
-  %ret = and i16 %arg1, %arg2
-  ret i16 %ret
-}
-
-define i32 @test_and_i32(i32 %arg1, i32 %arg2) {
-; ALL-LABEL: test_and_i32:
-; ALL:       # %bb.0:
-; ALL-NEXT:    andl %edi, %esi
-; ALL-NEXT:    movl %esi, %eax
-; ALL-NEXT:    retq
-  %ret = and i32 %arg1, %arg2
-  ret i32 %ret
-}
-
-define i64 @test_and_i64(i64 %arg1, i64 %arg2) {
-; ALL-LABEL: test_and_i64:
-; ALL:       # %bb.0:
-; ALL-NEXT:    andq %rdi, %rsi
-; ALL-NEXT:    movq %rsi, %rax
-; ALL-NEXT:    retq
-  %ret = and i64 %arg1, %arg2
-  ret i64 %ret
-}
-

external/llvm/test/CodeGen/X86/GlobalISel/binop.ll

@@ -1,166 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu                                  -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=SSE
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx                      -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=ALL_AVX --check-prefix=AVX
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f                  -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=ALL_AVX --check-prefix=AVX512F
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -mattr=+avx512vl -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=ALL_AVX --check-prefix=AVX512VL
-
-define i64 @test_sub_i64(i64 %arg1, i64 %arg2) {
-; ALL-LABEL: test_sub_i64:
-; ALL:       # %bb.0:
-; ALL-NEXT:    subq %rsi, %rdi
-; ALL-NEXT:    movq %rdi, %rax
-; ALL-NEXT:    retq
-  %ret = sub i64 %arg1, %arg2
-  ret i64 %ret
-}
-
-define i32 @test_sub_i32(i32 %arg1, i32 %arg2) {
-; ALL-LABEL: test_sub_i32:
-; ALL:       # %bb.0:
-; ALL-NEXT:    subl %esi, %edi
-; ALL-NEXT:    movl %edi, %eax
-; ALL-NEXT:    retq
-  %ret = sub i32 %arg1, %arg2
-  ret i32 %ret
-}
-
-define float @test_add_float(float %arg1, float %arg2) {
-; SSE-LABEL: test_add_float:
-; SSE:       # %bb.0:
-; SSE-NEXT:    addss %xmm1, %xmm0
-; SSE-NEXT:    retq
-;
-; ALL_AVX-LABEL: test_add_float:
-; ALL_AVX:       # %bb.0:
-; ALL_AVX-NEXT:    vaddss %xmm1, %xmm0, %xmm0
-; ALL_AVX-NEXT:    retq
-  %ret = fadd float %arg1, %arg2
-  ret float %ret
-}
-
-define double @test_add_double(double %arg1, double %arg2) {
-; SSE-LABEL: test_add_double:
-; SSE:       # %bb.0:
-; SSE-NEXT:    addsd %xmm1, %xmm0
-; SSE-NEXT:    retq
-;
-; ALL_AVX-LABEL: test_add_double:
-; ALL_AVX:       # %bb.0:
-; ALL_AVX-NEXT:    vaddsd %xmm1, %xmm0, %xmm0
-; ALL_AVX-NEXT:    retq
-  %ret = fadd double %arg1, %arg2
-  ret double %ret
-}
-
-define float @test_sub_float(float %arg1, float %arg2) {
-; SSE-LABEL: test_sub_float:
-; SSE:       # %bb.0:
-; SSE-NEXT:    subss %xmm1, %xmm0
-; SSE-NEXT:    retq
-;
-; ALL_AVX-LABEL: test_sub_float:
-; ALL_AVX:       # %bb.0:
-; ALL_AVX-NEXT:    vsubss %xmm1, %xmm0, %xmm0
-; ALL_AVX-NEXT:    retq
-  %ret = fsub float %arg1, %arg2
-  ret float %ret
-}
-
-define double @test_sub_double(double %arg1, double %arg2) {
-; SSE-LABEL: test_sub_double:
-; SSE:       # %bb.0:
-; SSE-NEXT:    subsd %xmm1, %xmm0
-; SSE-NEXT:    retq
-;
-; ALL_AVX-LABEL: test_sub_double:
-; ALL_AVX:       # %bb.0:
-; ALL_AVX-NEXT:    vsubsd %xmm1, %xmm0, %xmm0
-; ALL_AVX-NEXT:    retq
-  %ret = fsub double %arg1, %arg2
-  ret double %ret
-}
-
-define <4 x i32>  @test_add_v4i32(<4 x i32> %arg1, <4 x i32>  %arg2) {
-; SSE-LABEL: test_add_v4i32:
-; SSE:       # %bb.0:
-; SSE-NEXT:    paddd %xmm1, %xmm0
-; SSE-NEXT:    retq
-;
-; ALL_AVX-LABEL: test_add_v4i32:
-; ALL_AVX:       # %bb.0:
-; ALL_AVX-NEXT:    vpaddd %xmm1, %xmm0, %xmm0
-; ALL_AVX-NEXT:    retq
-  %ret = add <4 x i32>  %arg1, %arg2
-  ret <4 x i32>  %ret
-}
-
-define <4 x i32>  @test_sub_v4i32(<4 x i32> %arg1, <4 x i32>  %arg2) {
-; SSE-LABEL: test_sub_v4i32:
-; SSE:       # %bb.0:
-; SSE-NEXT:    psubd %xmm1, %xmm0
-; SSE-NEXT:    retq
-;
-; ALL_AVX-LABEL: test_sub_v4i32:
-; ALL_AVX:       # %bb.0:
-; ALL_AVX-NEXT:    vpsubd %xmm1, %xmm0, %xmm0
-; ALL_AVX-NEXT:    retq
-  %ret = sub <4 x i32>  %arg1, %arg2
-  ret <4 x i32>  %ret
-}
-
-define <4 x float>  @test_add_v4f32(<4 x float> %arg1, <4 x float>  %arg2) {
-; SSE-LABEL: test_add_v4f32:
-; SSE:       # %bb.0:
-; SSE-NEXT:    addps %xmm1, %xmm0
-; SSE-NEXT:    retq
-;
-; ALL_AVX-LABEL: test_add_v4f32:
-; ALL_AVX:       # %bb.0:
-; ALL_AVX-NEXT:    vaddps %xmm1, %xmm0, %xmm0
-; ALL_AVX-NEXT:    retq
-  %ret = fadd <4 x float>  %arg1, %arg2
-  ret <4 x float>  %ret
-}
-
-define <4 x float>  @test_sub_v4f32(<4 x float> %arg1, <4 x float>  %arg2) {
-; SSE-LABEL: test_sub_v4f32:
-; SSE:       # %bb.0:
-; SSE-NEXT:    subps %xmm1, %xmm0
-; SSE-NEXT:    retq
-;
-; ALL_AVX-LABEL: test_sub_v4f32:
-; ALL_AVX:       # %bb.0:
-; ALL_AVX-NEXT:    vsubps %xmm1, %xmm0, %xmm0
-; ALL_AVX-NEXT:    retq
-  %ret = fsub <4 x float>  %arg1, %arg2
-  ret <4 x float>  %ret
-}
-
-define i32  @test_copy_float(float %val) {
-; SSE-LABEL: test_copy_float:
-; SSE:       # %bb.0:
-; SSE-NEXT:    movd %xmm0, %eax
-; SSE-NEXT:    retq
-;
-; ALL_AVX-LABEL: test_copy_float:
-; ALL_AVX:       # %bb.0:
-; ALL_AVX-NEXT:    vmovd %xmm0, %eax
-; ALL_AVX-NEXT:    retq
-  %r = bitcast float %val to i32
-  ret i32 %r
-}
-
-define float  @test_copy_i32(i32 %val) {
-; SSE-LABEL: test_copy_i32:
-; SSE:       # %bb.0:
-; SSE-NEXT:    movd %edi, %xmm0
-; SSE-NEXT:    retq
-;
-; ALL_AVX-LABEL: test_copy_i32:
-; ALL_AVX:       # %bb.0:
-; ALL_AVX-NEXT:    vmovd %edi, %xmm0
-; ALL_AVX-NEXT:    retq
-  %r = bitcast i32 %val to float
-  ret float %r
-}
-

external/llvm/test/CodeGen/X86/GlobalISel/br.ll

@@ -1,19 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O0 -mtriple=x86_64-linux-gnu    -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=X64
-
-define void @uncondbr() {
-; CHECK-LABEL: uncondbr:
-; CHECK:       # %bb.1: # %entry
-; CHECK-NEXT:    jmp .LBB0_3
-; CHECK-NEXT:  .LBB0_2: # %end
-; CHECK-NEXT:    retq
-; CHECK-NEXT:  .LBB0_3: # %bb2
-; CHECK-NEXT:    jmp .LBB0_2
-entry:
-  br label %bb2
-end:
-  ret void
-bb2:
-  br label %end
-}
-

external/llvm/test/CodeGen/X86/GlobalISel/brcond.ll

@@ -1,90 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu    -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=X64
-; RUN: llc -mtriple=i386-linux-gnu      -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=X32
-
-define i32 @test_1(i32 %a, i32 %b, i32 %tValue, i32 %fValue) {
-; X64-LABEL: test_1:
-; X64:       # %bb.0: # %entry
-; X64-NEXT:    cmpl %esi, %edi
-; X64-NEXT:    setl %al
-; X64-NEXT:    testb $1, %al
-; X64-NEXT:    je .LBB0_2
-; X64-NEXT:  # %bb.1: # %if.then
-; X64-NEXT:    movl %edx, -{{[0-9]+}}(%rsp)
-; X64-NEXT:    movl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT:    retq
-; X64-NEXT:  .LBB0_2: # %if.else
-; X64-NEXT:    movl %ecx, -{{[0-9]+}}(%rsp)
-; X64-NEXT:    movl -{{[0-9]+}}(%rsp), %eax
-; X64-NEXT:    retq
-;
-; X32-LABEL: test_1:
-; X32:       # %bb.0: # %entry
-; X32-NEXT:    pushl %eax
-; X32-NEXT:    .cfi_def_cfa_offset 8
-; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT:    cmpl %eax, {{[0-9]+}}(%esp)
-; X32-NEXT:    setl %al
-; X32-NEXT:    testb $1, %al
-; X32-NEXT:    je .LBB0_2
-; X32-NEXT:  # %bb.1: # %if.then
-; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT:    jmp .LBB0_3
-; X32-NEXT:  .LBB0_2: # %if.else
-; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT:  .LBB0_3: # %return
-; X32-NEXT:    movl %eax, (%esp)
-; X32-NEXT:    movl (%esp), %eax
-; X32-NEXT:    popl %ecx
-; X32-NEXT:    retl
-entry:
-  %retval = alloca i32, align 4
-  %cmp = icmp slt i32 %a, %b
-  br i1 %cmp, label %if.then, label %if.else
-
-if.then:
-  store i32 %tValue, i32* %retval, align 4
-  br label %return
-
-if.else:
-  store i32 %fValue, i32* %retval, align 4
-  br label %return
-
-return:
-  %0 = load i32, i32* %retval, align 4
-  ret i32 %0
-}
-
-define i32 @test_2(i32 %a) {
-; X64-LABEL: test_2:
-; X64:       # %bb.0: # %entry
-; X64-NEXT:    testb $1, %dil
-; X64-NEXT:    je .LBB1_2
-; X64-NEXT:  # %bb.1: # %if.then
-; X64-NEXT:    xorl %eax, %eax
-; X64-NEXT:    retq
-; X64-NEXT:  .LBB1_2: # %if.else
-; X64-NEXT:    movl $1, %eax
-; X64-NEXT:    retq
-;
-; X32-LABEL: test_2:
-; X32:       # %bb.0: # %entry
-; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT:    testb $1, %al
-; X32-NEXT:    je .LBB1_2
-; X32-NEXT:  # %bb.1: # %if.then
-; X32-NEXT:    xorl %eax, %eax
-; X32-NEXT:    retl
-; X32-NEXT:  .LBB1_2: # %if.else
-; X32-NEXT:    movl $1, %eax
-; X32-NEXT:    retl
-entry:
-  %cmp = trunc i32 %a to i1
-  br i1 %cmp, label %if.then, label %if.else
-
-if.then:
-  ret i32 0
-if.else:
-  ret i32 1
-}
-

external/llvm/test/CodeGen/X86/GlobalISel/callingconv.ll

@@ -1,414 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i386-linux-gnu -mattr=+sse2  -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X32
-; RUN: llc -mtriple=x86_64-linux-gnu             -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
-
-define i32 @test_ret_i32() {
-; X32-LABEL: test_ret_i32:
-; X32:       # %bb.0:
-; X32-NEXT:    movl $20, %eax
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_ret_i32:
-; X64:       # %bb.0:
-; X64-NEXT:    movl $20, %eax
-; X64-NEXT:    retq
-  ret i32 20
-}
-
-define i64 @test_ret_i64() {
-; X32-LABEL: test_ret_i64:
-; X32:       # %bb.0:
-; X32-NEXT:    movl $4294967295, %eax # imm = 0xFFFFFFFF
-; X32-NEXT:    movl $15, %edx
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_ret_i64:
-; X64:       # %bb.0:
-; X64-NEXT:    movabsq $68719476735, %rax # imm = 0xFFFFFFFFF
-; X64-NEXT:    retq
-  ret i64 68719476735
-}
-
-define i8 @test_arg_i8(i8 %a) {
-; X32-LABEL: test_arg_i8:
-; X32:       # %bb.0:
-; X32-NEXT:    movb 4(%esp), %al
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_arg_i8:
-; X64:       # %bb.0:
-; X64-NEXT:    movl %edi, %eax
-; X64-NEXT:    retq
-  ret i8 %a
-}
-
-define i16 @test_arg_i16(i16 %a) {
-; X32-LABEL: test_arg_i16:
-; X32:       # %bb.0:
-; X32-NEXT:    movzwl 4(%esp), %eax
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_arg_i16:
-; X64:       # %bb.0:
-; X64-NEXT:    movl %edi, %eax
-; X64-NEXT:    retq
-  ret i16 %a
-}
-
-define i32 @test_arg_i32(i32 %a) {
-; X32-LABEL: test_arg_i32:
-; X32:       # %bb.0:
-; X32-NEXT:    movl 4(%esp), %eax
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_arg_i32:
-; X64:       # %bb.0:
-; X64-NEXT:    movl %edi, %eax
-; X64-NEXT:    retq
-  ret i32 %a
-}
-
-define i64 @test_arg_i64(i64 %a) {
-; X32-LABEL: test_arg_i64:
-; X32:       # %bb.0:
-; X32-NEXT:    movl 4(%esp), %eax
-; X32-NEXT:    movl 8(%esp), %edx
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_arg_i64:
-; X64:       # %bb.0:
-; X64-NEXT:    movq %rdi, %rax
-; X64-NEXT:    retq
-  ret i64 %a
-}
-
-define i64 @test_i64_args_8(i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, i64 %arg5, i64 %arg6, i64 %arg7, i64 %arg8) {
-; X32-LABEL: test_i64_args_8:
-; X32:       # %bb.0:
-; X32-NEXT:    movl 60(%esp), %eax
-; X32-NEXT:    movl 64(%esp), %edx
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_i64_args_8:
-; X64:       # %bb.0:
-; X64-NEXT:    movq 16(%rsp), %rax
-; X64-NEXT:    retq
-  ret i64 %arg8
-}
-
-define <4 x i32> @test_v4i32_args(<4 x i32> %arg1, <4 x i32> %arg2) {
-; X32-LABEL: test_v4i32_args:
-; X32:       # %bb.0:
-; X32-NEXT:    movaps %xmm1, %xmm0
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_v4i32_args:
-; X64:       # %bb.0:
-; X64-NEXT:    movaps %xmm1, %xmm0
-; X64-NEXT:    retq
-  ret <4 x i32> %arg2
-}
-
-define <8 x i32> @test_v8i32_args(<8 x i32> %arg1, <8 x i32> %arg2) {
-; X32-LABEL: test_v8i32_args:
-; X32:       # %bb.0:
-; X32-NEXT:    subl $12, %esp
-; X32-NEXT:    .cfi_def_cfa_offset 16
-; X32-NEXT:    movups 16(%esp), %xmm1
-; X32-NEXT:    movaps %xmm2, %xmm0
-; X32-NEXT:    addl $12, %esp
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_v8i32_args:
-; X64:       # %bb.0:
-; X64-NEXT:    movaps %xmm2, %xmm0
-; X64-NEXT:    movaps %xmm3, %xmm1
-; X64-NEXT:    retq
-  ret <8 x i32> %arg2
-}
-
-declare void @trivial_callee()
-define void @test_trivial_call() {
-; X32-LABEL: test_trivial_call:
-; X32:       # %bb.0:
-; X32-NEXT:    subl $12, %esp
-; X32-NEXT:    .cfi_def_cfa_offset 16
-; X32-NEXT:    calll trivial_callee
-; X32-NEXT:    addl $12, %esp
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_trivial_call:
-; X64:       # %bb.0:
-; X64-NEXT:    pushq %rax
-; X64-NEXT:    .cfi_def_cfa_offset 16
-; X64-NEXT:    callq trivial_callee
-; X64-NEXT:    popq %rax
-; X64-NEXT:    retq
-  call void @trivial_callee()
-  ret void
-}
-
-declare void @simple_arg_callee(i32 %in0, i32 %in1)
-define void @test_simple_arg_call(i32 %in0, i32 %in1) {
-; X32-LABEL: test_simple_arg_call:
-; X32:       # %bb.0:
-; X32-NEXT:    subl $12, %esp
-; X32-NEXT:    .cfi_def_cfa_offset 16
-; X32-NEXT:    movl 16(%esp), %eax
-; X32-NEXT:    movl 20(%esp), %ecx
-; X32-NEXT:    movl %ecx, (%esp)
-; X32-NEXT:    movl %eax, 4(%esp)
-; X32-NEXT:    calll simple_arg_callee
-; X32-NEXT:    addl $12, %esp
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_simple_arg_call:
-; X64:       # %bb.0:
-; X64-NEXT:    pushq %rax
-; X64-NEXT:    .cfi_def_cfa_offset 16
-; X64-NEXT:    movl %edi, %eax
-; X64-NEXT:    movl %esi, %edi
-; X64-NEXT:    movl %eax, %esi
-; X64-NEXT:    callq simple_arg_callee
-; X64-NEXT:    popq %rax
-; X64-NEXT:    retq
-  call void @simple_arg_callee(i32 %in1, i32 %in0)
-  ret void
-}
-
-declare void @simple_arg8_callee(i32 %arg1, i32 %arg2, i32 %arg3, i32 %arg4, i32 %arg5, i32 %arg6, i32 %arg7, i32 %arg8)
-define void @test_simple_arg8_call(i32 %in0) {
-; X32-LABEL: test_simple_arg8_call:
-; X32:       # %bb.0:
-; X32-NEXT:    subl $44, %esp
-; X32-NEXT:    .cfi_def_cfa_offset 48
-; X32-NEXT:    movl 48(%esp), %eax
-; X32-NEXT:    movl %eax, (%esp)
-; X32-NEXT:    movl %eax, 4(%esp)
-; X32-NEXT:    movl %eax, 8(%esp)
-; X32-NEXT:    movl %eax, 12(%esp)
-; X32-NEXT:    movl %eax, 16(%esp)
-; X32-NEXT:    movl %eax, 20(%esp)
-; X32-NEXT:    movl %eax, 24(%esp)
-; X32-NEXT:    movl %eax, 28(%esp)
-; X32-NEXT:    calll simple_arg8_callee
-; X32-NEXT:    addl $44, %esp
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_simple_arg8_call:
-; X64:       # %bb.0:
-; X64-NEXT:    subq $24, %rsp
-; X64-NEXT:    .cfi_def_cfa_offset 32
-; X64-NEXT:    movl %edi, (%rsp)
-; X64-NEXT:    movl %edi, 8(%rsp)
-; X64-NEXT:    movl %edi, %esi
-; X64-NEXT:    movl %edi, %edx
-; X64-NEXT:    movl %edi, %ecx
-; X64-NEXT:    movl %edi, %r8d
-; X64-NEXT:    movl %edi, %r9d
-; X64-NEXT:    callq simple_arg8_callee
-; X64-NEXT:    addq $24, %rsp
-; X64-NEXT:    retq
-  call void @simple_arg8_callee(i32 %in0, i32 %in0, i32 %in0, i32 %in0,i32 %in0, i32 %in0, i32 %in0, i32 %in0)
-  ret void
-}
-
-declare i32 @simple_return_callee(i32 %in0)
-define i32 @test_simple_return_callee() {
-; X32-LABEL: test_simple_return_callee:
-; X32:       # %bb.0:
-; X32-NEXT:    subl $12, %esp
-; X32-NEXT:    .cfi_def_cfa_offset 16
-; X32-NEXT:    movl $5, %eax
-; X32-NEXT:    movl %eax, (%esp)
-; X32-NEXT:    calll simple_return_callee
-; X32-NEXT:    addl %eax, %eax
-; X32-NEXT:    addl $12, %esp
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_simple_return_callee:
-; X64:       # %bb.0:
-; X64-NEXT:    pushq %rax
-; X64-NEXT:    .cfi_def_cfa_offset 16
-; X64-NEXT:    movl $5, %edi
-; X64-NEXT:    callq simple_return_callee
-; X64-NEXT:    addl %eax, %eax
-; X64-NEXT:    popq %rcx
-; X64-NEXT:    retq
-  %call = call i32 @simple_return_callee(i32 5)
-  %r = add i32 %call, %call
-  ret i32 %r
-}
-
-declare <8 x i32> @split_return_callee(<8 x i32> %in0)
-define <8 x i32> @test_split_return_callee(<8 x i32> %arg1, <8 x i32> %arg2) {
-; X32-LABEL: test_split_return_callee:
-; X32:       # %bb.0:
-; X32-NEXT:    subl $44, %esp
-; X32-NEXT:    .cfi_def_cfa_offset 48
-; X32-NEXT:    movaps %xmm0, (%esp) # 16-byte Spill
-; X32-NEXT:    movaps %xmm1, 16(%esp) # 16-byte Spill
-; X32-NEXT:    movdqu 48(%esp), %xmm1
-; X32-NEXT:    movdqa %xmm2, %xmm0
-; X32-NEXT:    calll split_return_callee
-; X32-NEXT:    paddd (%esp), %xmm0 # 16-byte Folded Reload
-; X32-NEXT:    paddd 16(%esp), %xmm1 # 16-byte Folded Reload
-; X32-NEXT:    addl $44, %esp
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_split_return_callee:
-; X64:       # %bb.0:
-; X64-NEXT:    subq $40, %rsp
-; X64-NEXT:    .cfi_def_cfa_offset 48
-; X64-NEXT:    movaps %xmm0, (%rsp) # 16-byte Spill
-; X64-NEXT:    movaps %xmm1, 16(%rsp) # 16-byte Spill
-; X64-NEXT:    movdqa %xmm2, %xmm0
-; X64-NEXT:    movdqa %xmm3, %xmm1
-; X64-NEXT:    callq split_return_callee
-; X64-NEXT:    paddd (%rsp), %xmm0 # 16-byte Folded Reload
-; X64-NEXT:    paddd 16(%rsp), %xmm1 # 16-byte Folded Reload
-; X64-NEXT:    addq $40, %rsp
-; X64-NEXT:    retq
-  %call = call <8 x i32> @split_return_callee(<8 x i32> %arg2)
-  %r = add <8 x i32> %arg1, %call
-  ret  <8 x i32> %r
-}
-
-define void @test_indirect_call(void()* %func) {
-; X32-LABEL: test_indirect_call:
-; X32:       # %bb.0:
-; X32-NEXT:    subl $12, %esp
-; X32-NEXT:    .cfi_def_cfa_offset 16
-; X32-NEXT:    calll *16(%esp)
-; X32-NEXT:    addl $12, %esp
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_indirect_call:
-; X64:       # %bb.0:
-; X64-NEXT:    pushq %rax
-; X64-NEXT:    .cfi_def_cfa_offset 16
-; X64-NEXT:    callq *%rdi
-; X64-NEXT:    popq %rax
-; X64-NEXT:    retq
-  call void %func()
-  ret void
-}
-
-declare void @take_char(i8)
-define void @test_abi_exts_call(i8* %addr) {
-; X32-LABEL: test_abi_exts_call:
-; X32:       # %bb.0:
-; X32-NEXT:    pushl %ebx
-; X32-NEXT:    .cfi_def_cfa_offset 8
-; X32-NEXT:    pushl %esi
-; X32-NEXT:    .cfi_def_cfa_offset 12
-; X32-NEXT:    pushl %eax
-; X32-NEXT:    .cfi_def_cfa_offset 16
-; X32-NEXT:    .cfi_offset %esi, -12
-; X32-NEXT:    .cfi_offset %ebx, -8
-; X32-NEXT:    movl 16(%esp), %eax
-; X32-NEXT:    movb (%eax), %bl
-; X32-NEXT:    movzbl %bl, %esi
-; X32-NEXT:    movl %esi, (%esp)
-; X32-NEXT:    calll take_char
-; X32-NEXT:    movsbl %bl, %eax
-; X32-NEXT:    movl %eax, (%esp)
-; X32-NEXT:    calll take_char
-; X32-NEXT:    movl %esi, (%esp)
-; X32-NEXT:    calll take_char
-; X32-NEXT:    addl $4, %esp
-; X32-NEXT:    popl %esi
-; X32-NEXT:    popl %ebx
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_abi_exts_call:
-; X64:       # %bb.0:
-; X64-NEXT:    pushq %rbx
-; X64-NEXT:    .cfi_def_cfa_offset 16
-; X64-NEXT:    .cfi_offset %rbx, -16
-; X64-NEXT:    movb (%rdi), %al
-; X64-NEXT:    movzbl %al, %ebx
-; X64-NEXT:    movl %ebx, %edi
-; X64-NEXT:    callq take_char
-; X64-NEXT:    movsbl %bl, %edi
-; X64-NEXT:    callq take_char
-; X64-NEXT:    movl %ebx, %edi
-; X64-NEXT:    callq take_char
-; X64-NEXT:    popq %rbx
-; X64-NEXT:    retq
-  %val = load i8, i8* %addr
-  call void @take_char(i8 %val)
-  call void @take_char(i8 signext %val)
-  call void @take_char(i8 zeroext %val)
- ret void
-}
-
-declare void @variadic_callee(i8*, ...)
-define void @test_variadic_call_1(i8** %addr_ptr, i32* %val_ptr) {
-; X32-LABEL: test_variadic_call_1:
-; X32:       # %bb.0:
-; X32-NEXT:    subl $12, %esp
-; X32-NEXT:    .cfi_def_cfa_offset 16
-; X32-NEXT:    movl 16(%esp), %eax
-; X32-NEXT:    movl 20(%esp), %ecx
-; X32-NEXT:    movl (%eax), %eax
-; X32-NEXT:    movl (%ecx), %ecx
-; X32-NEXT:    movl %eax, (%esp)
-; X32-NEXT:    movl %ecx, 4(%esp)
-; X32-NEXT:    calll variadic_callee
-; X32-NEXT:    addl $12, %esp
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_variadic_call_1:
-; X64:       # %bb.0:
-; X64-NEXT:    pushq %rax
-; X64-NEXT:    .cfi_def_cfa_offset 16
-; X64-NEXT:    movq (%rdi), %rdi
-; X64-NEXT:    movl (%rsi), %esi
-; X64-NEXT:    movb $0, %al
-; X64-NEXT:    callq variadic_callee
-; X64-NEXT:    popq %rax
-; X64-NEXT:    retq
-
-  %addr = load i8*, i8** %addr_ptr
-  %val = load i32, i32* %val_ptr
-  call void (i8*, ...) @variadic_callee(i8* %addr, i32 %val)
-  ret void
-}
-
-define void @test_variadic_call_2(i8** %addr_ptr, double* %val_ptr) {
-; X32-LABEL: test_variadic_call_2:
-; X32:       # %bb.0:
-; X32-NEXT:    subl $12, %esp
-; X32-NEXT:    .cfi_def_cfa_offset 16
-; X32-NEXT:    movl 16(%esp), %eax
-; X32-NEXT:    movl 20(%esp), %ecx
-; X32-NEXT:    movl (%eax), %eax
-; X32-NEXT:    movl (%ecx), %edx
-; X32-NEXT:    movl 4(%ecx), %ecx
-; X32-NEXT:    movl %eax, (%esp)
-; X32-NEXT:    movl $4, %eax
-; X32-NEXT:    leal (%esp,%eax), %eax
-; X32-NEXT:    movl %edx, 4(%esp)
-; X32-NEXT:    movl %ecx, 4(%eax)
-; X32-NEXT:    calll variadic_callee
-; X32-NEXT:    addl $12, %esp
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_variadic_call_2:
-; X64:       # %bb.0:
-; X64-NEXT:    pushq %rax
-; X64-NEXT:    .cfi_def_cfa_offset 16
-; X64-NEXT:    movq (%rdi), %rdi
-; X64-NEXT:    movq (%rsi), %rcx
-; X64-NEXT:    movb $1, %al
-; X64-NEXT:    movq %rcx, %xmm0
-; X64-NEXT:    callq variadic_callee
-; X64-NEXT:    popq %rax
-; X64-NEXT:    retq
-
-  %addr = load i8*, i8** %addr_ptr
-  %val = load double, double* %val_ptr
-  call void (i8*, ...) @variadic_callee(i8* %addr, double %val)
-  ret void
-}

external/llvm/test/CodeGen/X86/GlobalISel/cmp.ll

@@ -1,159 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu    -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL
-
-define i32 @test_icmp_eq_i8(i8 %a, i8 %b) {
-; ALL-LABEL: test_icmp_eq_i8:
-; ALL:       # %bb.0:
-; ALL-NEXT:    cmpb %sil, %dil
-; ALL-NEXT:    sete %al
-; ALL-NEXT:    andl $1, %eax
-; ALL-NEXT:    retq
-  %r = icmp eq i8 %a, %b
-  %res =  zext i1 %r to i32
-  ret i32 %res
-}
-
-define i32 @test_icmp_eq_i16(i16 %a, i16 %b) {
-; ALL-LABEL: test_icmp_eq_i16:
-; ALL:       # %bb.0:
-; ALL-NEXT:    cmpw %si, %di
-; ALL-NEXT:    sete %al
-; ALL-NEXT:    andl $1, %eax
-; ALL-NEXT:    retq
-  %r = icmp eq i16 %a, %b
-  %res =  zext i1 %r to i32
-  ret i32 %res
-}
-
-define i32 @test_icmp_eq_i64(i64 %a, i64 %b) {
-; ALL-LABEL: test_icmp_eq_i64:
-; ALL:       # %bb.0:
-; ALL-NEXT:    cmpq %rsi, %rdi
-; ALL-NEXT:    sete %al
-; ALL-NEXT:    andl $1, %eax
-; ALL-NEXT:    retq
-  %r = icmp eq i64 %a, %b
-  %res =  zext i1 %r to i32
-  ret i32 %res
-}
-
-define i32 @test_icmp_eq_i32(i32 %a, i32 %b) {
-; ALL-LABEL: test_icmp_eq_i32:
-; ALL:       # %bb.0:
-; ALL-NEXT:    cmpl %esi, %edi
-; ALL-NEXT:    sete %al
-; ALL-NEXT:    andl $1, %eax
-; ALL-NEXT:    retq
-  %r = icmp eq i32 %a, %b
-  %res =  zext i1 %r to i32
-  ret i32 %res
-}
-
-define i32 @test_icmp_ne_i32(i32 %a, i32 %b) {
-; ALL-LABEL: test_icmp_ne_i32:
-; ALL:       # %bb.0:
-; ALL-NEXT:    cmpl %esi, %edi
-; ALL-NEXT:    setne %al
-; ALL-NEXT:    andl $1, %eax
-; ALL-NEXT:    retq
-  %r = icmp ne i32 %a, %b
-  %res =  zext i1 %r to i32
-  ret i32 %res
-}
-
-define i32 @test_icmp_ugt_i32(i32 %a, i32 %b) {
-; ALL-LABEL: test_icmp_ugt_i32:
-; ALL:       # %bb.0:
-; ALL-NEXT:    cmpl %esi, %edi
-; ALL-NEXT:    seta %al
-; ALL-NEXT:    andl $1, %eax
-; ALL-NEXT:    retq
-  %r = icmp ugt i32 %a, %b
-  %res =  zext i1 %r to i32
-  ret i32 %res
-}
-
-define i32 @test_icmp_uge_i32(i32 %a, i32 %b) {
-; ALL-LABEL: test_icmp_uge_i32:
-; ALL:       # %bb.0:
-; ALL-NEXT:    cmpl %esi, %edi
-; ALL-NEXT:    setae %al
-; ALL-NEXT:    andl $1, %eax
-; ALL-NEXT:    retq
-  %r = icmp uge i32 %a, %b
-  %res =  zext i1 %r to i32
-  ret i32 %res
-}
-
-define i32 @test_icmp_ult_i32(i32 %a, i32 %b) {
-; ALL-LABEL: test_icmp_ult_i32:
-; ALL:       # %bb.0:
-; ALL-NEXT:    cmpl %esi, %edi
-; ALL-NEXT:    setb %al
-; ALL-NEXT:    andl $1, %eax
-; ALL-NEXT:    retq
-  %r = icmp ult i32 %a, %b
-  %res =  zext i1 %r to i32
-  ret i32 %res
-}
-
-define i32 @test_icmp_ule_i32(i32 %a, i32 %b) {
-; ALL-LABEL: test_icmp_ule_i32:
-; ALL:       # %bb.0:
-; ALL-NEXT:    cmpl %esi, %edi
-; ALL-NEXT:    setbe %al
-; ALL-NEXT:    andl $1, %eax
-; ALL-NEXT:    retq
-  %r = icmp ule i32 %a, %b
-  %res =  zext i1 %r to i32
-  ret i32 %res
-}
-
-define i32 @test_icmp_sgt_i32(i32 %a, i32 %b) {
-; ALL-LABEL: test_icmp_sgt_i32:
-; ALL:       # %bb.0:
-; ALL-NEXT:    cmpl %esi, %edi
-; ALL-NEXT:    setg %al
-; ALL-NEXT:    andl $1, %eax
-; ALL-NEXT:    retq
-  %r = icmp sgt i32 %a, %b
-  %res =  zext i1 %r to i32
-  ret i32 %res
-}
-
-define i32 @test_icmp_sge_i32(i32 %a, i32 %b) {
-; ALL-LABEL: test_icmp_sge_i32:
-; ALL:       # %bb.0:
-; ALL-NEXT:    cmpl %esi, %edi
-; ALL-NEXT:    setge %al
-; ALL-NEXT:    andl $1, %eax
-; ALL-NEXT:    retq
-  %r = icmp sge i32 %a, %b
-  %res =  zext i1 %r to i32
-  ret i32 %res
-}
-
-define i32 @test_icmp_slt_i32(i32 %a, i32 %b) {
-; ALL-LABEL: test_icmp_slt_i32:
-; ALL:       # %bb.0:
-; ALL-NEXT:    cmpl %esi, %edi
-; ALL-NEXT:    setl %al
-; ALL-NEXT:    andl $1, %eax
-; ALL-NEXT:    retq
-  %r = icmp slt i32 %a, %b
-  %res =  zext i1 %r to i32
-  ret i32 %res
-}
-
-define i32 @test_icmp_sle_i32(i32 %a, i32 %b) {
-; ALL-LABEL: test_icmp_sle_i32:
-; ALL:       # %bb.0:
-; ALL-NEXT:    cmpl %esi, %edi
-; ALL-NEXT:    setle %al
-; ALL-NEXT:    andl $1, %eax
-; ALL-NEXT:    retq
-  %r = icmp sle i32 %a, %b
-  %res =  zext i1 %r to i32
-  ret i32 %res
-}
-

external/llvm/test/CodeGen/X86/GlobalISel/constant.ll

@@ -1,63 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
-
-define i8 @const_i8() {
-; ALL-LABEL: const_i8:
-; ALL:       # %bb.0:
-; ALL-NEXT:    movb $2, %al
-; ALL-NEXT:    retq
-  ret i8 2
-}
-
-define i16 @const_i16() {
-; ALL-LABEL: const_i16:
-; ALL:       # %bb.0:
-; ALL-NEXT:    movw $3, %ax
-; ALL-NEXT:    retq
-  ret i16 3
-}
-
-define i32 @const_i32() {
-; ALL-LABEL: const_i32:
-; ALL:       # %bb.0:
-; ALL-NEXT:    movl $4, %eax
-; ALL-NEXT:    retq
-  ret i32 4
-}
-
-define i64 @const_i64() {
-; ALL-LABEL: const_i64:
-; ALL:       # %bb.0:
-; ALL-NEXT:    movabsq $68719476720, %rax # imm = 0xFFFFFFFF0
-; ALL-NEXT:    retq
-  ret i64 68719476720
-}
-
-;i64 value fit into u32
-define i64 @const_i64_u32() {
-; ALL-LABEL: const_i64_u32:
-; ALL:       # %bb.0:
-; ALL-NEXT:    movq $1879048192, %rax # imm = 0x70000000
-; ALL-NEXT:    retq
-  ret i64 1879048192
-}
-
-;i64 value fit into i32
-define i64 @const_i64_i32() {
-; ALL-LABEL: const_i64_i32:
-; ALL:       # %bb.0:
-; ALL-NEXT:    movq $-1, %rax
-; ALL-NEXT:    retq
-  ret i64 -1
-}
-
-define void @main(i32 ** %data) {
-; ALL-LABEL: main:
-; ALL:       # %bb.0:
-; ALL-NEXT:    movq $0, %rax
-; ALL-NEXT:    movq %rax, (%rdi)
-; ALL-NEXT:    retq
-  store i32* null, i32** %data, align 8
-  ret void
-}
-

external/llvm/test/CodeGen/X86/GlobalISel/ext-x86-64.ll

@@ -1,41 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu    -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
-
-; TODO merge with ext.ll after i64 sext supported on 32bit platform
-
-define i64 @test_zext_i1(i8 %a) {
-; X64-LABEL: test_zext_i1:
-; X64:       # %bb.0:
-; X64-NEXT:    # kill: def %edi killed %edi def %rdi
-; X64-NEXT:    andq $1, %rdi
-; X64-NEXT:    movq %rdi, %rax
-; X64-NEXT:    retq
-  %val = trunc i8 %a to i1
-  %r = zext i1 %val to i64
-  ret i64 %r
-}
-
-define i64 @test_sext_i8(i8 %val) {
-; X64-LABEL: test_sext_i8:
-; X64:       # %bb.0:
-; X64-NEXT:    movsbq %dil, %rax
-; X64-NEXT:    retq
-  %r = sext i8 %val to i64
-  ret i64 %r
-}
-
-define i64 @test_sext_i16(i16 %val) {
-; X64-LABEL: test_sext_i16:
-; X64:       # %bb.0:
-; X64-NEXT:    movswq %di, %rax
-; X64-NEXT:    retq
-  %r = sext i16 %val to i64
-  ret i64 %r
-}
-
-; TODO enable after selection supported
-;define i64 @test_sext_i32(i32 %val) {
-;  %r = sext i32 %val to i64
-;  ret i64 %r
-;}
-

external/llvm/test/CodeGen/X86/GlobalISel/ext.ll

@@ -1,113 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu    -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
-; RUN: llc -mtriple=i386-linux-gnu      -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X32
-
-define i8 @test_zext_i1toi8(i32 %a) {
-; X64-LABEL: test_zext_i1toi8:
-; X64:       # %bb.0:
-; X64-NEXT:    andb $1, %dil
-; X64-NEXT:    movl %edi, %eax
-; X64-NEXT:    retq
-;
-; X32-LABEL: test_zext_i1toi8:
-; X32:       # %bb.0:
-; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT:    andb $1, %al
-; X32-NEXT:    # kill: def %al killed %al killed %eax
-; X32-NEXT:    retl
-  %val = trunc i32 %a to i1
-  %r = zext i1 %val to i8
-  ret i8 %r
-}
-
-define i16 @test_zext_i1toi16(i32 %a) {
-; X64-LABEL: test_zext_i1toi16:
-; X64:       # %bb.0:
-; X64-NEXT:    andw $1, %di
-; X64-NEXT:    movl %edi, %eax
-; X64-NEXT:    retq
-;
-; X32-LABEL: test_zext_i1toi16:
-; X32:       # %bb.0:
-; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT:    andw $1, %ax
-; X32-NEXT:    # kill: def %ax killed %ax killed %eax
-; X32-NEXT:    retl
-  %val = trunc i32 %a to i1
-  %r = zext i1 %val to i16
-  ret i16 %r
-}
-
-define i32 @test_zext_i1(i32 %a) {
-; X64-LABEL: test_zext_i1:
-; X64:       # %bb.0:
-; X64-NEXT:    andl $1, %edi
-; X64-NEXT:    movl %edi, %eax
-; X64-NEXT:    retq
-;
-; X32-LABEL: test_zext_i1:
-; X32:       # %bb.0:
-; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT:    andl $1, %eax
-; X32-NEXT:    retl
-  %val = trunc i32 %a to i1
-  %r = zext i1 %val to i32
-  ret i32 %r
-}
-
-define i32 @test_zext_i8(i8 %val) {
-; X64-LABEL: test_zext_i8:
-; X64:       # %bb.0:
-; X64-NEXT:    movzbl %dil, %eax
-; X64-NEXT:    retq
-;
-; X32-LABEL: test_zext_i8:
-; X32:       # %bb.0:
-; X32-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
-; X32-NEXT:    retl
-  %r = zext i8 %val to i32
-  ret i32 %r
-}
-
-define i32 @test_zext_i16(i16 %val) {
-; X64-LABEL: test_zext_i16:
-; X64:       # %bb.0:
-; X64-NEXT:    movzwl %di, %eax
-; X64-NEXT:    retq
-;
-; X32-LABEL: test_zext_i16:
-; X32:       # %bb.0:
-; X32-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
-; X32-NEXT:    retl
-  %r = zext i16 %val to i32
-  ret i32 %r
-}
-
-define i32 @test_sext_i8(i8 %val) {
-; X64-LABEL: test_sext_i8:
-; X64:       # %bb.0:
-; X64-NEXT:    movsbl %dil, %eax
-; X64-NEXT:    retq
-;
-; X32-LABEL: test_sext_i8:
-; X32:       # %bb.0:
-; X32-NEXT:    movsbl {{[0-9]+}}(%esp), %eax
-; X32-NEXT:    retl
-  %r = sext i8 %val to i32
-  ret i32 %r
-}
-
-define i32 @test_sext_i16(i16 %val) {
-; X64-LABEL: test_sext_i16:
-; X64:       # %bb.0:
-; X64-NEXT:    movswl %di, %eax
-; X64-NEXT:    retq
-;
-; X32-LABEL: test_sext_i16:
-; X32:       # %bb.0:
-; X32-NEXT:    movswl {{[0-9]+}}(%esp), %eax
-; X32-NEXT:    retl
-  %r = sext i16 %val to i32
-  ret i32 %r
-}
-

external/llvm/test/CodeGen/X86/GlobalISel/fadd-scalar.ll

@@ -1,20 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
-define float @test_fadd_float(float %arg1, float %arg2) {
-; ALL-LABEL: test_fadd_float:
-; ALL:       # %bb.0:
-; ALL-NEXT:    addss %xmm1, %xmm0
-; ALL-NEXT:    retq
-  %ret = fadd float %arg1, %arg2
-  ret float %ret
-}
-
-define double @test_fadd_double(double %arg1, double %arg2) {
-; ALL-LABEL: test_fadd_double:
-; ALL:       # %bb.0:
-; ALL-NEXT:    addsd %xmm1, %xmm0
-; ALL-NEXT:    retq
-  %ret = fadd double %arg1, %arg2
-  ret double %ret
-}
-

external/llvm/test/CodeGen/X86/GlobalISel/fconstant.ll

@@ -1,40 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+sse2 -global-isel                       -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK64 --check-prefix=CHECK_SMALL --check-prefix=CHECK_SMALL64 --check-prefix=CHECK_NOPIC64
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+sse2 -global-isel -code-model=large     -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK64 --check-prefix=CHECK_LARGE --check-prefix=CHECK_LARGE64
-; RUN: llc -mtriple=i386-linux-gnu   -mattr=+sse2 -global-isel                       -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK32 --check-prefix=CHECK_SMALL --check-prefix=CHECK_SMALL32
-; RUN: llc -mtriple=i386-linux-gnu   -mattr=+sse2 -global-isel -code-model=large     -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK32 --check-prefix=CHECK_LARGE --check-prefix=CHECK_LARGE32
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+sse2 -global-isel -relocation-model=pic -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK64 --check-prefix=CHECK_SMALL --check-prefix=CHECK_SMALL64 --check-prefix=CHECK_PIC64
-
-define void @test_float(float* %a , float %b) {
-; CHECK_SMALL64-LABEL: test_float:
-; CHECK_SMALL64:       # %bb.0: # %entry
-; CHECK_SMALL64-NEXT:    movss .LCPI0_0(%rip), %xmm1 # xmm1 = mem[0],zero,zero,zero
-; CHECK_SMALL64-NEXT:    addss %xmm0, %xmm1
-; CHECK_SMALL64-NEXT:    movd %xmm1, %eax
-; CHECK_SMALL64-NEXT:    movl %eax, (%rdi)
-; CHECK_SMALL64-NEXT:    retq
-;
-; CHECK_LARGE64-LABEL: test_float:
-; CHECK_LARGE64:       # %bb.0: # %entry
-; CHECK_LARGE64-NEXT:    movabsq $.LCPI0_0, %rax
-; CHECK_LARGE64-NEXT:    addss (%rax), %xmm0
-; CHECK_LARGE64-NEXT:    movd %xmm0, %eax
-; CHECK_LARGE64-NEXT:    movl %eax, (%rdi)
-; CHECK_LARGE64-NEXT:    retq
-;
-; CHECK32-LABEL: test_float:
-; CHECK32:       # %bb.0: # %entry
-; CHECK32-NEXT:    movl 4(%esp), %eax
-; CHECK32-NEXT:    movl 8(%esp), %ecx
-; CHECK32-NEXT:    movss .LCPI0_0, %xmm0 # xmm0 = mem[0],zero,zero,zero
-; CHECK32-NEXT:    movd %ecx, %xmm1
-; CHECK32-NEXT:    addss %xmm0, %xmm1
-; CHECK32-NEXT:    movd %xmm1, %ecx
-; CHECK32-NEXT:    movl %ecx, (%eax)
-; CHECK32-NEXT:    retl
-entry:
-  %aa = fadd float 5.500000e+00, %b
-  store float %aa, float* %a
-  ret void
-}
-

external/llvm/test/CodeGen/X86/GlobalISel/fdiv-scalar.ll

@@ -1,20 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
-define float @test_fdiv_float(float %arg1, float %arg2) {
-; ALL-LABEL: test_fdiv_float:
-; ALL:       # %bb.0:
-; ALL-NEXT:    divss %xmm1, %xmm0
-; ALL-NEXT:    retq
-  %ret = fdiv float %arg1, %arg2
-  ret float %ret
-}
-
-define double @test_fdiv_double(double %arg1, double %arg2) {
-; ALL-LABEL: test_fdiv_double:
-; ALL:       # %bb.0:
-; ALL-NEXT:    divsd %xmm1, %xmm0
-; ALL-NEXT:    retq
-  %ret = fdiv double %arg1, %arg2
-  ret double %ret
-}
-

external/llvm/test/CodeGen/X86/GlobalISel/fmul-scalar.ll

@@ -1,20 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
-define float @test_fmul_float(float %arg1, float %arg2) {
-; ALL-LABEL: test_fmul_float:
-; ALL:       # %bb.0:
-; ALL-NEXT:    mulss %xmm1, %xmm0
-; ALL-NEXT:    retq
-  %ret = fmul float %arg1, %arg2
-  ret float %ret
-}
-
-define double @test_fmul_double(double %arg1, double %arg2) {
-; ALL-LABEL: test_fmul_double:
-; ALL:       # %bb.0:
-; ALL-NEXT:    mulsd %xmm1, %xmm0
-; ALL-NEXT:    retq
-  %ret = fmul double %arg1, %arg2
-  ret double %ret
-}
-

external/llvm/test/CodeGen/X86/GlobalISel/fpext-scalar.ll

@@ -1,12 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=CHECK
-
-define double @test(float %a) {
-; CHECK-LABEL: test:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    cvtss2sd %xmm0, %xmm0
-; CHECK-NEXT:    retq
-entry:
-  %conv = fpext float %a to double
-  ret double %conv
-}

external/llvm/test/CodeGen/X86/GlobalISel/frameIndex.ll

@@ -1,29 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu    -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
-; RUN: llc -mtriple=x86_64-linux-gnu                 -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
-; RUN: llc -mtriple=i386-linux-gnu      -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X32
-; RUN: llc -mtriple=i386-linux-gnu                   -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X32
-; RUN: llc -mtriple=x86_64-linux-gnux32 -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X32ABI
-; RUN: llc -mtriple=x86_64-linux-gnux32              -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X32ABI
-
-define i32* @allocai32() {
-; X64-LABEL: allocai32:
-; X64:       # %bb.0:
-; X64-NEXT:    leaq -4(%rsp), %rax
-; X64-NEXT:    retq
-;
-; X32-LABEL: allocai32:
-; X32:       # %bb.0:
-; X32-NEXT:    pushl %eax
-; X32-NEXT:    .cfi_def_cfa_offset 8
-; X32-NEXT:    movl %esp, %eax
-; X32-NEXT:    popl %ecx
-; X32-NEXT:    retl
-;
-; X32ABI-LABEL: allocai32:
-; X32ABI:       # %bb.0:
-; X32ABI-NEXT:    leal -4(%rsp), %eax
-; X32ABI-NEXT:    retq
-  %ptr1 = alloca i32
-  ret i32* %ptr1
-}

external/llvm/test/CodeGen/X86/GlobalISel/fsub-scalar.ll

@@ -1,20 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
-define float @test_fsub_float(float %arg1, float %arg2) {
-; ALL-LABEL: test_fsub_float:
-; ALL:       # %bb.0:
-; ALL-NEXT:    subss %xmm1, %xmm0
-; ALL-NEXT:    retq
-  %ret = fsub float %arg1, %arg2
-  ret float %ret
-}
-
-define double @test_fsub_double(double %arg1, double %arg2) {
-; ALL-LABEL: test_fsub_double:
-; ALL:       # %bb.0:
-; ALL-NEXT:    subsd %xmm1, %xmm0
-; ALL-NEXT:    retq
-  %ret = fsub double %arg1, %arg2
-  ret double %ret
-}
-

external/llvm/test/CodeGen/X86/GlobalISel/gep.ll

@@ -1,136 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64_GISEL
-; RUN: llc -mtriple=x86_64-linux-gnu              -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
-
-define i32* @test_gep_i8(i32 *%arr, i8 %ind) {
-; X64_GISEL-LABEL: test_gep_i8:
-; X64_GISEL:       # %bb.0:
-; X64_GISEL-NEXT:    movq $4, %rax
-; X64_GISEL-NEXT:    movsbq %sil, %rcx
-; X64_GISEL-NEXT:    imulq %rax, %rcx
-; X64_GISEL-NEXT:    leaq (%rdi,%rcx), %rax
-; X64_GISEL-NEXT:    retq
-;
-; X64-LABEL: test_gep_i8:
-; X64:       # %bb.0:
-; X64-NEXT:    # kill: def %esi killed %esi def %rsi
-; X64-NEXT:    movsbq %sil, %rax
-; X64-NEXT:    leaq (%rdi,%rax,4), %rax
-; X64-NEXT:    retq
-  %arrayidx = getelementptr i32, i32* %arr, i8 %ind
-  ret i32* %arrayidx
-}
-
-define i32* @test_gep_i8_const(i32 *%arr) {
-; X64_GISEL-LABEL: test_gep_i8_const:
-; X64_GISEL:       # %bb.0:
-; X64_GISEL-NEXT:    movq $80, %rax
-; X64_GISEL-NEXT:    leaq (%rdi,%rax), %rax
-; X64_GISEL-NEXT:    retq
-;
-; X64-LABEL: test_gep_i8_const:
-; X64:       # %bb.0:
-; X64-NEXT:    leaq 80(%rdi), %rax
-; X64-NEXT:    retq
-  %arrayidx = getelementptr i32, i32* %arr, i8 20
-  ret i32* %arrayidx
-}
-
-define i32* @test_gep_i16(i32 *%arr, i16 %ind) {
-; X64_GISEL-LABEL: test_gep_i16:
-; X64_GISEL:       # %bb.0:
-; X64_GISEL-NEXT:    movq $4, %rax
-; X64_GISEL-NEXT:    movswq %si, %rcx
-; X64_GISEL-NEXT:    imulq %rax, %rcx
-; X64_GISEL-NEXT:    leaq (%rdi,%rcx), %rax
-; X64_GISEL-NEXT:    retq
-;
-; X64-LABEL: test_gep_i16:
-; X64:       # %bb.0:
-; X64-NEXT:    # kill: def %esi killed %esi def %rsi
-; X64-NEXT:    movswq %si, %rax
-; X64-NEXT:    leaq (%rdi,%rax,4), %rax
-; X64-NEXT:    retq
-  %arrayidx = getelementptr i32, i32* %arr, i16 %ind
-  ret i32* %arrayidx
-}
-
-define i32* @test_gep_i16_const(i32 *%arr) {
-; X64_GISEL-LABEL: test_gep_i16_const:
-; X64_GISEL:       # %bb.0:
-; X64_GISEL-NEXT:    movq $80, %rax
-; X64_GISEL-NEXT:    leaq (%rdi,%rax), %rax
-; X64_GISEL-NEXT:    retq
-;
-; X64-LABEL: test_gep_i16_const:
-; X64:       # %bb.0:
-; X64-NEXT:    leaq 80(%rdi), %rax
-; X64-NEXT:    retq
-  %arrayidx = getelementptr i32, i32* %arr, i16 20
-  ret i32* %arrayidx
-}
-
-define i32* @test_gep_i32(i32 *%arr, i32 %ind) {
-; X64_GISEL-LABEL: test_gep_i32:
-; X64_GISEL:       # %bb.0:
-; X64_GISEL-NEXT:    movq $4, %rax
-; X64_GISEL-NEXT:    movslq %esi, %rcx
-; X64_GISEL-NEXT:    imulq %rax, %rcx
-; X64_GISEL-NEXT:    leaq (%rdi,%rcx), %rax
-; X64_GISEL-NEXT:    retq
-;
-; X64-LABEL: test_gep_i32:
-; X64:       # %bb.0:
-; X64-NEXT:    movslq %esi, %rax
-; X64-NEXT:    leaq (%rdi,%rax,4), %rax
-; X64-NEXT:    retq
-  %arrayidx = getelementptr i32, i32* %arr, i32 %ind
-  ret i32* %arrayidx
-}
-
-define i32* @test_gep_i32_const(i32 *%arr) {
-; X64_GISEL-LABEL: test_gep_i32_const:
-; X64_GISEL:       # %bb.0:
-; X64_GISEL-NEXT:    movq $20, %rax
-; X64_GISEL-NEXT:    leaq (%rdi,%rax), %rax
-; X64_GISEL-NEXT:    retq
-;
-; X64-LABEL: test_gep_i32_const:
-; X64:       # %bb.0:
-; X64-NEXT:    leaq 20(%rdi), %rax
-; X64-NEXT:    retq
-  %arrayidx = getelementptr i32, i32* %arr, i32 5
-  ret i32* %arrayidx
-}
-
-define i32* @test_gep_i64(i32 *%arr, i64 %ind) {
-; X64_GISEL-LABEL: test_gep_i64:
-; X64_GISEL:       # %bb.0:
-; X64_GISEL-NEXT:    movq $4, %rax
-; X64_GISEL-NEXT:    imulq %rsi, %rax
-; X64_GISEL-NEXT:    leaq (%rdi,%rax), %rax
-; X64_GISEL-NEXT:    retq
-;
-; X64-LABEL: test_gep_i64:
-; X64:       # %bb.0:
-; X64-NEXT:    leaq (%rdi,%rsi,4), %rax
-; X64-NEXT:    retq
-  %arrayidx = getelementptr i32, i32* %arr, i64 %ind
-  ret i32* %arrayidx
-}
-
-define i32* @test_gep_i64_const(i32 *%arr) {
-; X64_GISEL-LABEL: test_gep_i64_const:
-; X64_GISEL:       # %bb.0:
-; X64_GISEL-NEXT:    movq $20, %rax
-; X64_GISEL-NEXT:    leaq (%rdi,%rax), %rax
-; X64_GISEL-NEXT:    retq
-;
-; X64-LABEL: test_gep_i64_const:
-; X64:       # %bb.0:
-; X64-NEXT:    leaq 20(%rdi), %rax
-; X64-NEXT:    retq
-  %arrayidx = getelementptr i32, i32* %arr, i64 5
-  ret i32* %arrayidx
-}
-