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Imported Upstream version 5.18.0.167
Former-commit-id: 289509151e0fee68a1b591a20c9f109c3c789d3a
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external/llvm/test/CodeGen/SystemZ/tdc-05.ll
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external/llvm/test/CodeGen/SystemZ/tdc-05.ll
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; Test the Test Data Class instruction logic operation conversion from
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; compares, combined with signbit or other compares to ensure worthiness.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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;
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declare float @llvm.fabs.f32(float)
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declare double @llvm.fabs.f64(double)
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declare fp128 @llvm.fabs.f128(fp128)
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; Compare with 0, extract sign bit
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define i32 @f1(float %x) {
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; CHECK-LABEL: f1
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; CHECK: tceb %f0, 2047
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%cast = bitcast float %x to i32
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%sign = icmp slt i32 %cast, 0
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%fcmp = fcmp ugt float %x, 0.0
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%res = or i1 %sign, %fcmp
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%xres = zext i1 %res to i32
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ret i32 %xres
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}
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; Compare with inf, extract negated sign bit
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define i32 @f2(float %x) {
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; CHECK-LABEL: f2
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; CHECK: tceb %f0, 2698
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%cast = bitcast float %x to i32
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%sign = icmp sgt i32 %cast, -1
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%fcmp = fcmp ult float %x, 0x7ff0000000000000
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%res = and i1 %sign, %fcmp
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%xres = zext i1 %res to i32
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ret i32 %xres
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}
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; Compare with minnorm, extract negated sign bit
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define i32 @f3(float %x) {
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; CHECK-LABEL: f3
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; CHECK: tceb %f0, 2176
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%cast = bitcast float %x to i32
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%sign = icmp sgt i32 %cast, -1
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%fcmp = fcmp olt float %x, 0x3810000000000000
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%res = and i1 %sign, %fcmp
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%xres = zext i1 %res to i32
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ret i32 %xres
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}
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; Test float isnormal, from clang.
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define i32 @f4(float %x) {
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; CHECK-LABEL: f4
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; CHECK: tceb %f0, 768
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%y = call float @llvm.fabs.f32(float %x)
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%ord = fcmp ord float %x, 0.0
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%a = fcmp ult float %y, 0x7ff0000000000000
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%b = fcmp uge float %y, 0x3810000000000000
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%c = and i1 %a, %b
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%res = and i1 %ord, %c
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%xres = zext i1 %res to i32
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ret i32 %xres
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}
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; Check for negative 0.
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define i32 @f5(float %x) {
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; CHECK-LABEL: f5
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; CHECK: tceb %f0, 1024
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%cast = bitcast float %x to i32
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%sign = icmp slt i32 %cast, 0
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%fcmp = fcmp oeq float %x, 0.0
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%res = and i1 %sign, %fcmp
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%xres = zext i1 %res to i32
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ret i32 %xres
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}
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; Test isnormal, from clang.
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define i32 @f6(double %x) {
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; CHECK-LABEL: f6
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; CHECK: tcdb %f0, 768
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%y = call double @llvm.fabs.f64(double %x)
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%ord = fcmp ord double %x, 0.0
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%a = fcmp ult double %y, 0x7ff0000000000000
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%b = fcmp uge double %y, 0x0010000000000000
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%c = and i1 %ord, %a
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%res = and i1 %b, %c
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%xres = zext i1 %res to i32
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ret i32 %xres
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}
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; Test isinf || isnan, from clang.
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define i32 @f7(double %x) {
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; CHECK-LABEL: f7
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; CHECK: tcdb %f0, 63
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%y = call double @llvm.fabs.f64(double %x)
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%a = fcmp oeq double %y, 0x7ff0000000000000
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%b = fcmp uno double %x, 0.0
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%res = or i1 %a, %b
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%xres = zext i1 %res to i32
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ret i32 %xres
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}
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