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Imported Upstream version 5.18.0.167

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Former-commit-id: 289509151e0fee68a1b591a20c9f109c3c789d3a
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Xamarin Public Jenkins (auto-signing)
2018-10-20 08:25:10 +00:00
parent e19d552987
commit b084638f15
28489 changed files with 184 additions and 3866856 deletions
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121
external/llvm/test/CodeGen/SystemZ/int-cmp-36.ll vendored
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@ -1,121 +0,0 @@
; Test 32-bit comparisons in which the second operand is sign-extended
; from a PC-relative i16.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
@g = global i16 1
@h = global i16 1, align 1, section "foo"
; Check signed comparison.
define i32 @f1(i32 %src1) {
; CHECK-LABEL: f1:
; CHECK: chrl %r2, g
; CHECK-NEXT: blr %r14
; CHECK: br %r14
entry:
%val = load i16 , i16 *@g
%src2 = sext i16 %val to i32
%cond = icmp slt i32 %src1, %src2
br i1 %cond, label %exit, label %mulb
mulb:
%mul = mul i32 %src1, %src1
br label %exit
exit:
%res = phi i32 [ %src1, %entry ], [ %mul, %mulb ]
ret i32 %res
}
; Check unsigned comparison, which cannot use CHRL.
define i32 @f2(i32 %src1) {
; CHECK-LABEL: f2:
; CHECK-NOT: chrl
; CHECK: br %r14
entry:
%val = load i16 , i16 *@g
%src2 = sext i16 %val to i32
%cond = icmp ult i32 %src1, %src2
br i1 %cond, label %exit, label %mulb
mulb:
%mul = mul i32 %src1, %src1
br label %exit
exit:
%res = phi i32 [ %src1, %entry ], [ %mul, %mulb ]
ret i32 %res
}
; Check equality.
define i32 @f3(i32 %src1) {
; CHECK-LABEL: f3:
; CHECK: chrl %r2, g
; CHECK-NEXT: ber %r14
; CHECK: br %r14
entry:
%val = load i16 , i16 *@g
%src2 = sext i16 %val to i32
%cond = icmp eq i32 %src1, %src2
br i1 %cond, label %exit, label %mulb
mulb:
%mul = mul i32 %src1, %src1
br label %exit
exit:
%res = phi i32 [ %src1, %entry ], [ %mul, %mulb ]
ret i32 %res
}
; Check inequality.
define i32 @f4(i32 %src1) {
; CHECK-LABEL: f4:
; CHECK: chrl %r2, g
; CHECK-NEXT: blhr %r14
; CHECK: br %r14
entry:
%val = load i16 , i16 *@g
%src2 = sext i16 %val to i32
%cond = icmp ne i32 %src1, %src2
br i1 %cond, label %exit, label %mulb
mulb:
%mul = mul i32 %src1, %src1
br label %exit
exit:
%res = phi i32 [ %src1, %entry ], [ %mul, %mulb ]
ret i32 %res
}
; Repeat f1 with an unaligned address.
define i32 @f5(i32 %src1) {
; CHECK-LABEL: f5:
; CHECK: lgrl [[REG:%r[0-5]]], h@GOT
; CHECK: ch %r2, 0([[REG]])
; CHECK-NEXT: blr %r14
; CHECK: br %r14
entry:
%val = load i16 , i16 *@h, align 1
%src2 = sext i16 %val to i32
%cond = icmp slt i32 %src1, %src2
br i1 %cond, label %exit, label %mulb
mulb:
%mul = mul i32 %src1, %src1
br label %exit
exit:
%res = phi i32 [ %src1, %entry ], [ %mul, %mulb ]
ret i32 %res
}
; Check the comparison can be reversed if that allows CHRL to be used.
define i32 @f6(i32 %src2) {
; CHECK-LABEL: f6:
; CHECK: chrl %r2, g
; CHECK-NEXT: bhr %r14
; CHECK: br %r14
entry:
%val = load i16 , i16 *@g
%src1 = sext i16 %val to i32
%cond = icmp slt i32 %src1, %src2
br i1 %cond, label %exit, label %mulb
mulb:
%mul = mul i32 %src2, %src2
br label %exit
exit:
%res = phi i32 [ %src2, %entry ], [ %mul, %mulb ]
ret i32 %res
}