You've already forked linux-packaging-mono
Imported Upstream version 5.18.0.167
Former-commit-id: 289509151e0fee68a1b591a20c9f109c3c789d3a
This commit is contained in:
Xamarin Public Jenkins (auto-signing)
parent
e19d552987
commit
b084638f15
184
external/llvm/test/CodeGen/RISCV/i32-icmp.ll
vendored
184
external/llvm/test/CodeGen/RISCV/i32-icmp.ll
vendored
@ -1,184 +0,0 @@
|
||||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
||||
; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
|
||||
; RUN: | FileCheck %s -check-prefix=RV32I
|
||||
|
||||
; TODO: check the generated instructions for the equivalent of seqz, snez,
|
||||
; sltz, sgtz map to something simple
|
||||
|
||||
define i32 @icmp_eq(i32 %a, i32 %b) nounwind {
|
||||
; RV32I-LABEL: icmp_eq:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw s0, 8(sp)
|
||||
; RV32I-NEXT: addi s0, sp, 16
|
||||
; RV32I-NEXT: xor a0, a0, a1
|
||||
; RV32I-NEXT: seqz a0, a0
|
||||
; RV32I-NEXT: lw s0, 8(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%1 = icmp eq i32 %a, %b
|
||||
%2 = zext i1 %1 to i32
|
||||
ret i32 %2
|
||||
}
|
||||
|
||||
define i32 @icmp_ne(i32 %a, i32 %b) nounwind {
|
||||
; RV32I-LABEL: icmp_ne:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw s0, 8(sp)
|
||||
; RV32I-NEXT: addi s0, sp, 16
|
||||
; RV32I-NEXT: xor a0, a0, a1
|
||||
; RV32I-NEXT: snez a0, a0
|
||||
; RV32I-NEXT: lw s0, 8(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%1 = icmp ne i32 %a, %b
|
||||
%2 = zext i1 %1 to i32
|
||||
ret i32 %2
|
||||
}
|
||||
|
||||
define i32 @icmp_ugt(i32 %a, i32 %b) nounwind {
|
||||
; RV32I-LABEL: icmp_ugt:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw s0, 8(sp)
|
||||
; RV32I-NEXT: addi s0, sp, 16
|
||||
; RV32I-NEXT: sltu a0, a1, a0
|
||||
; RV32I-NEXT: lw s0, 8(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%1 = icmp ugt i32 %a, %b
|
||||
%2 = zext i1 %1 to i32
|
||||
ret i32 %2
|
||||
}
|
||||
|
||||
define i32 @icmp_uge(i32 %a, i32 %b) nounwind {
|
||||
; RV32I-LABEL: icmp_uge:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw s0, 8(sp)
|
||||
; RV32I-NEXT: addi s0, sp, 16
|
||||
; RV32I-NEXT: sltu a0, a0, a1
|
||||
; RV32I-NEXT: xori a0, a0, 1
|
||||
; RV32I-NEXT: lw s0, 8(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%1 = icmp uge i32 %a, %b
|
||||
%2 = zext i1 %1 to i32
|
||||
ret i32 %2
|
||||
}
|
||||
|
||||
define i32 @icmp_ult(i32 %a, i32 %b) nounwind {
|
||||
; RV32I-LABEL: icmp_ult:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw s0, 8(sp)
|
||||
; RV32I-NEXT: addi s0, sp, 16
|
||||
; RV32I-NEXT: sltu a0, a0, a1
|
||||
; RV32I-NEXT: lw s0, 8(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%1 = icmp ult i32 %a, %b
|
||||
%2 = zext i1 %1 to i32
|
||||
ret i32 %2
|
||||
}
|
||||
|
||||
define i32 @icmp_ule(i32 %a, i32 %b) nounwind {
|
||||
; RV32I-LABEL: icmp_ule:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw s0, 8(sp)
|
||||
; RV32I-NEXT: addi s0, sp, 16
|
||||
; RV32I-NEXT: sltu a0, a1, a0
|
||||
; RV32I-NEXT: xori a0, a0, 1
|
||||
; RV32I-NEXT: lw s0, 8(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%1 = icmp ule i32 %a, %b
|
||||
%2 = zext i1 %1 to i32
|
||||
ret i32 %2
|
||||
}
|
||||
|
||||
define i32 @icmp_sgt(i32 %a, i32 %b) nounwind {
|
||||
; RV32I-LABEL: icmp_sgt:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw s0, 8(sp)
|
||||
; RV32I-NEXT: addi s0, sp, 16
|
||||
; RV32I-NEXT: slt a0, a1, a0
|
||||
; RV32I-NEXT: lw s0, 8(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%1 = icmp sgt i32 %a, %b
|
||||
%2 = zext i1 %1 to i32
|
||||
ret i32 %2
|
||||
}
|
||||
|
||||
define i32 @icmp_sge(i32 %a, i32 %b) nounwind {
|
||||
; RV32I-LABEL: icmp_sge:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw s0, 8(sp)
|
||||
; RV32I-NEXT: addi s0, sp, 16
|
||||
; RV32I-NEXT: slt a0, a0, a1
|
||||
; RV32I-NEXT: xori a0, a0, 1
|
||||
; RV32I-NEXT: lw s0, 8(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%1 = icmp sge i32 %a, %b
|
||||
%2 = zext i1 %1 to i32
|
||||
ret i32 %2
|
||||
}
|
||||
|
||||
define i32 @icmp_slt(i32 %a, i32 %b) nounwind {
|
||||
; RV32I-LABEL: icmp_slt:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw s0, 8(sp)
|
||||
; RV32I-NEXT: addi s0, sp, 16
|
||||
; RV32I-NEXT: slt a0, a0, a1
|
||||
; RV32I-NEXT: lw s0, 8(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%1 = icmp slt i32 %a, %b
|
||||
%2 = zext i1 %1 to i32
|
||||
ret i32 %2
|
||||
}
|
||||
|
||||
define i32 @icmp_sle(i32 %a, i32 %b) nounwind {
|
||||
; RV32I-LABEL: icmp_sle:
|
||||
; RV32I: # %bb.0:
|
||||
; RV32I-NEXT: addi sp, sp, -16
|
||||
; RV32I-NEXT: sw ra, 12(sp)
|
||||
; RV32I-NEXT: sw s0, 8(sp)
|
||||
; RV32I-NEXT: addi s0, sp, 16
|
||||
; RV32I-NEXT: slt a0, a1, a0
|
||||
; RV32I-NEXT: xori a0, a0, 1
|
||||
; RV32I-NEXT: lw s0, 8(sp)
|
||||
; RV32I-NEXT: lw ra, 12(sp)
|
||||
; RV32I-NEXT: addi sp, sp, 16
|
||||
; RV32I-NEXT: ret
|
||||
%1 = icmp sle i32 %a, %b
|
||||
%2 = zext i1 %1 to i32
|
||||
ret i32 %2
|
||||
}
|
||||
|
||||
; TODO: check variants with an immediate?
|
||||
Reference in New Issue
Block a user