Imported Upstream version 5.18.0.167

Former-commit-id: 289509151e0fee68a1b591a20c9f109c3c789d3a

external/llvm/test/CodeGen/PowerPC/testComparesiltss.ll

@@ -1,83 +0,0 @@
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
-; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN:   --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
-; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
-; RUN:   --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-
-@glob = common local_unnamed_addr global i16 0, align 2
-
-; Function Attrs: norecurse nounwind readnone
-define signext i32 @test_iltss(i16 signext %a, i16 signext %b) {
-; CHECK-LABEL: test_iltss:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    sub [[REG:r[0-9]+]], r3, r4
-; CHECK-NEXT:    rldicl r3, [[REG]], 1, 63
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp slt i16 %a, %b
-  %conv2 = zext i1 %cmp to i32
-  ret i32 %conv2
-}
-
-; Function Attrs: norecurse nounwind readnone
-define signext i32 @test_iltss_sext(i16 signext %a, i16 signext %b) {
-; CHECK-LABEL: test_iltss_sext:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    sub [[REG:r[0-9]+]], r3, r4
-; CHECK-NEXT:    sradi r3, [[REG]], 63
-; CHECK-NEXT:    blr
-entry:
-  %cmp = icmp slt i16 %a, %b
-  %sub = sext i1 %cmp to i32
-  ret i32 %sub
-}
-
-; Function Attrs: norecurse nounwind readnone
-define signext i32 @test_iltss_sext_z(i16 signext %a) {
-; CHECK-LABEL: test_iltss_sext_z:
-; CHECK:       srawi r3, r3, 31
-; CHECK-NEXT:  blr
-entry:
-  %cmp = icmp slt i16 %a, 0
-  %sub = sext i1 %cmp to i32
-  ret i32 %sub
-}
-
-; Function Attrs: norecurse nounwind
-define void @test_iltss_store(i16 signext %a, i16 signext %b) {
-; CHECK-LABEL: test_iltss_store:
-; CHECK:       # %bb.0: # %entry
-; CHECK:         sub [[REG:r[0-9]+]], r3, r4
-; CHECK:         rldicl {{r[0-9]+}}, [[REG]], 1, 63
-entry:
-  %cmp = icmp slt i16 %a, %b
-  %conv3 = zext i1 %cmp to i16
-  store i16 %conv3, i16* @glob, align 2
-  ret void
-}
-
-; Function Attrs: norecurse nounwind
-define void @test_iltss_sext_store(i16 signext %a, i16 signext %b) {
-; CHECK-LABEL: test_iltss_sext_store:
-; CHECK:       # %bb.0: # %entry
-; CHECK:         sub [[REG:r[0-9]+]], r3, r4
-; CHECK:         sradi {{r[0-9]+}}, [[REG]], 63
-entry:
-  %cmp = icmp slt i16 %a, %b
-  %conv3 = sext i1 %cmp to i16
-  store i16 %conv3, i16* @glob, align 2
-  ret void
-}
-
-; Function Attrs: norecurse nounwind
-define void @test_iltss_sext_z_store(i16 signext %a) {
-; CHECK-LABEL: test_iltss_sext_z_store:
-; CHECK:       srwi {{r[0-9]+}}, r3, 15
-entry:
-  %cmp = icmp slt i16 %a, 0
-  %sub = sext i1 %cmp to i16
-  store i16 %sub, i16* @glob, align 2
-  ret void
-}