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Imported Upstream version 5.18.0.167
Former-commit-id: 289509151e0fee68a1b591a20c9f109c3c789d3a
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@ -1,6 +0,0 @@
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; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32--
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define void @test() {
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%tr1 = lshr i32 1, 0 ; <i32> [#uses=0]
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ret void
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}
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@ -1,7 +0,0 @@
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; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32--
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define void @main() {
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%tr4 = shl i64 1, 0 ; <i64> [#uses=0]
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ret void
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}
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@ -1,9 +0,0 @@
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; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32--
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define void @main() {
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%shamt = add i8 0, 1 ; <i8> [#uses=1]
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%shift.upgrd.1 = zext i8 %shamt to i64 ; <i64> [#uses=1]
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%tr2 = ashr i64 1, %shift.upgrd.1 ; <i64> [#uses=0]
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ret void
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}
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@ -1,4 +0,0 @@
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; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | not grep .comm.*X,0
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@X = linkonce global { } zeroinitializer ; <{ }*> [#uses=0]
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@ -1,8 +0,0 @@
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; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32--
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define i32 @main() {
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%setle = icmp sle i64 1, 0 ; <i1> [#uses=1]
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%select = select i1 true, i1 %setle, i1 true ; <i1> [#uses=0]
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ret i32 0
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}
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@ -1,5 +0,0 @@
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; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32--
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define i64 @test() {
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ret i64 undef
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}
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@ -1,13 +0,0 @@
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; this should not crash the ppc backend
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; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32--
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define i32 @test(i32 %j.0.0.i) {
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%tmp.85.i = and i32 %j.0.0.i, 7 ; <i32> [#uses=1]
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%tmp.161278.i = bitcast i32 %tmp.85.i to i32 ; <i32> [#uses=1]
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%tmp.5.i77.i = lshr i32 %tmp.161278.i, 3 ; <i32> [#uses=1]
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ret i32 %tmp.5.i77.i
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}
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@ -1,11 +0,0 @@
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; This function should have exactly one call to fixdfdi, no more!
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; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mattr=-64bit | \
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; RUN: grep "bl .*fixdfdi" | count 1
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define double @test2(double %tmp.7705) {
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%mem_tmp.2.0.in = fptosi double %tmp.7705 to i64 ; <i64> [#uses=1]
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%mem_tmp.2.0 = sitofp i64 %mem_tmp.2.0.in to double ; <double> [#uses=1]
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ret double %mem_tmp.2.0
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}
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@ -1,11 +0,0 @@
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; This was erroneously being turned into an rlwinm instruction.
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; The sign bit does matter in this case.
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; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | grep srawi
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define i32 @test(i32 %X) {
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%Y = and i32 %X, -2 ; <i32> [#uses=1]
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%Z = ashr i32 %Y, 11 ; <i32> [#uses=1]
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ret i32 %Z
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}
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@ -1,18 +0,0 @@
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; RUN: llc -verify-machineinstrs < %s
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target datalayout = "E-p:32:32"
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target triple = "powerpc-apple-darwin8.2.0"
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define void @bar(i32 %G, i32 %E, i32 %F, i32 %A, i32 %B, i32 %C, i32 %D, i8* %fmt, ...) {
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%ap = alloca i8* ; <i8**> [#uses=2]
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%va.upgrd.1 = bitcast i8** %ap to i8* ; <i8*> [#uses=1]
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call void @llvm.va_start( i8* %va.upgrd.1 )
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%tmp.1 = load i8*, i8** %ap ; <i8*> [#uses=1]
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%tmp.0 = call double @foo( i8* %tmp.1 ) ; <double> [#uses=0]
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ret void
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}
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declare void @llvm.va_start(i8*)
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declare double @foo(i8*)
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@ -1,10 +0,0 @@
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; RUN: llc -verify-machineinstrs < %s | not grep ", f1"
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target datalayout = "E-p:32:32"
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target triple = "powerpc-apple-darwin8.2.0"
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; Dead argument should reserve an FP register.
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define double @bar(double %DEAD, double %X, double %Y) {
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%tmp.2 = fadd double %X, %Y ; <double> [#uses=1]
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ret double %tmp.2
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}
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@ -1,20 +0,0 @@
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; RUN: llc -verify-machineinstrs < %s
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; REQUIRES: default_triple
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define void @iterative_hash_host_wide_int() {
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%zero = alloca i32 ; <i32*> [#uses=2]
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%b = alloca i32 ; <i32*> [#uses=1]
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store i32 0, i32* %zero
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%tmp = load i32, i32* %zero ; <i32> [#uses=1]
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%tmp5 = bitcast i32 %tmp to i32 ; <i32> [#uses=1]
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%tmp6.u = add i32 %tmp5, 32 ; <i32> [#uses=1]
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%tmp6 = bitcast i32 %tmp6.u to i32 ; <i32> [#uses=1]
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%tmp7 = load i64, i64* null ; <i64> [#uses=1]
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%tmp6.upgrd.1 = trunc i32 %tmp6 to i8 ; <i8> [#uses=1]
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%shift.upgrd.2 = zext i8 %tmp6.upgrd.1 to i64 ; <i64> [#uses=1]
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%tmp8 = ashr i64 %tmp7, %shift.upgrd.2 ; <i64> [#uses=1]
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%tmp8.upgrd.3 = trunc i64 %tmp8 to i32 ; <i32> [#uses=1]
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store i32 %tmp8.upgrd.3, i32* %b
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unreachable
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}
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@ -1,9 +0,0 @@
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; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32--
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define double @CalcSpeed(float %tmp127) {
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%tmp145 = fpext float %tmp127 to double ; <double> [#uses=1]
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%tmp150 = call double asm "frsqrte $0,$1", "=f,f"( double %tmp145 ) ; <double> [#uses=1]
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ret double %tmp150
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}
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@ -1,10 +0,0 @@
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; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-apple-darwin8 -mcpu=g5 | \
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; RUN: grep "vspltish v.*, 10"
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define void @test(<8 x i16>* %P) {
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%tmp = load <8 x i16>, <8 x i16>* %P ; <<8 x i16>> [#uses=1]
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%tmp1 = add <8 x i16> %tmp, < i16 10, i16 10, i16 10, i16 10, i16 10, i16 10, i16 10, i16 10 > ; <<8 x i16>> [#uses=1]
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store <8 x i16> %tmp1, <8 x i16>* %P
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ret void
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}
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@ -1,58 +0,0 @@
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; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5
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; END.
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define void @test(i8* %stack) {
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entry:
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%tmp9 = icmp eq i32 0, 0 ; <i1> [#uses=1]
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%tmp30 = icmp eq i32 0, 0 ; <i1> [#uses=1]
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br i1 %tmp30, label %cond_next54, label %cond_true31
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cond_true860: ; preds = %bb855
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%tmp879 = tail call <4 x float> @llvm.ppc.altivec.vmaddfp( <4 x float> zeroinitializer, <4 x float> zeroinitializer, <4 x float> zeroinitializer ) ; <<4 x float>> [#uses=1]
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%tmp880 = bitcast <4 x float> %tmp879 to <4 x i32> ; <<4 x i32>> [#uses=2]
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%tmp883 = shufflevector <4 x i32> %tmp880, <4 x i32> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x i32>> [#uses=1]
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%tmp883.upgrd.1 = bitcast <4 x i32> %tmp883 to <4 x float> ; <<4 x float>> [#uses=1]
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%tmp885 = shufflevector <4 x i32> %tmp880, <4 x i32> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 > ; <<4 x i32>> [#uses=1]
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%tmp885.upgrd.2 = bitcast <4 x i32> %tmp885 to <4 x float> ; <<4 x float>> [#uses=1]
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br label %cond_next905
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cond_true31: ; preds = %entry
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ret void
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cond_next54: ; preds = %entry
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br i1 %tmp9, label %cond_false385, label %bb279
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bb279: ; preds = %cond_next54
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ret void
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cond_false385: ; preds = %cond_next54
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%tmp388 = icmp eq i32 0, 0 ; <i1> [#uses=1]
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br i1 %tmp388, label %cond_next463, label %cond_true389
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cond_true389: ; preds = %cond_false385
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ret void
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cond_next463: ; preds = %cond_false385
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%tmp1208107 = icmp ugt i8* null, %stack ; <i1> [#uses=1]
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br i1 %tmp1208107, label %cond_true1209.preheader, label %bb1212
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cond_true498: ; preds = %cond_true1209.preheader
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ret void
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cond_true519: ; preds = %cond_true1209.preheader
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%bothcond = or i1 false, false ; <i1> [#uses=1]
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br i1 %bothcond, label %bb855, label %bb980
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cond_false548: ; preds = %cond_true1209.preheader
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ret void
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bb855: ; preds = %cond_true519
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%tmp859 = icmp eq i32 0, 0 ; <i1> [#uses=1]
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br i1 %tmp859, label %cond_true860, label %cond_next905
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cond_next905: ; preds = %bb855, %cond_true860
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%vfpw2.4 = phi <4 x float> [ %tmp885.upgrd.2, %cond_true860 ], [ undef, %bb855 ] ; <<4 x float>> [#uses=0]
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%vfpw1.4 = phi <4 x float> [ %tmp883.upgrd.1, %cond_true860 ], [ undef, %bb855 ] ; <<4 x float>> [#uses=0]
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%tmp930 = bitcast <4 x float> zeroinitializer to <4 x i32> ; <<4 x i32>> [#uses=0]
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ret void
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bb980: ; preds = %cond_true519
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ret void
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cond_true1209.preheader: ; preds = %cond_next463
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%tmp496 = and i32 0, 12288 ; <i32> [#uses=1]
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switch i32 %tmp496, label %cond_false548 [
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i32 0, label %cond_true498
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i32 4096, label %cond_true519
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]
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bb1212: ; preds = %cond_next463
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ret void
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}
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declare <4 x float> @llvm.ppc.altivec.vmaddfp(<4 x float>, <4 x float>, <4 x float>)
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@ -1,55 +0,0 @@
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; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32--
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; END.
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%struct.attr_desc = type { i8*, %struct.attr_desc*, %struct.attr_value*, %struct.attr_value*, i32 }
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%struct.attr_value = type { %struct.rtx_def*, %struct.attr_value*, %struct.insn_ent*, i32, i32 }
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%struct.insn_def = type { %struct.insn_def*, %struct.rtx_def*, i32, i32, i32, i32, i32 }
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%struct.insn_ent = type { %struct.insn_ent*, %struct.insn_def* }
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%struct.rtx_def = type { i16, i8, i8, %struct.u }
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%struct.u = type { [1 x i64] }
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define void @find_attr() {
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entry:
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%tmp26 = icmp eq %struct.attr_desc* null, null ; <i1> [#uses=1]
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br i1 %tmp26, label %bb30, label %cond_true27
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cond_true27: ; preds = %entry
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ret void
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bb30: ; preds = %entry
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%tmp67 = icmp eq %struct.attr_desc* null, null ; <i1> [#uses=1]
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br i1 %tmp67, label %cond_next92, label %cond_true68
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cond_true68: ; preds = %bb30
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ret void
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cond_next92: ; preds = %bb30
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%tmp173 = getelementptr %struct.attr_desc, %struct.attr_desc* null, i32 0, i32 4 ; <i32*> [#uses=2]
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%tmp174 = load i32, i32* %tmp173 ; <i32> [#uses=1]
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%tmp177 = and i32 %tmp174, -9 ; <i32> [#uses=1]
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store i32 %tmp177, i32* %tmp173
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%tmp180 = getelementptr %struct.attr_desc, %struct.attr_desc* null, i32 0, i32 4 ; <i32*> [#uses=1]
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%tmp181 = load i32, i32* %tmp180 ; <i32> [#uses=1]
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%tmp185 = getelementptr %struct.attr_desc, %struct.attr_desc* null, i32 0, i32 4 ; <i32*> [#uses=2]
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%tmp186 = load i32, i32* %tmp185 ; <i32> [#uses=1]
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%tmp183187 = shl i32 %tmp181, 1 ; <i32> [#uses=1]
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%tmp188 = and i32 %tmp183187, 16 ; <i32> [#uses=1]
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%tmp190 = and i32 %tmp186, -17 ; <i32> [#uses=1]
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%tmp191 = or i32 %tmp190, %tmp188 ; <i32> [#uses=1]
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store i32 %tmp191, i32* %tmp185
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%tmp193 = getelementptr %struct.attr_desc, %struct.attr_desc* null, i32 0, i32 4 ; <i32*> [#uses=1]
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%tmp194 = load i32, i32* %tmp193 ; <i32> [#uses=1]
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%tmp198 = getelementptr %struct.attr_desc, %struct.attr_desc* null, i32 0, i32 4 ; <i32*> [#uses=2]
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%tmp199 = load i32, i32* %tmp198 ; <i32> [#uses=1]
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%tmp196200 = shl i32 %tmp194, 2 ; <i32> [#uses=1]
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%tmp201 = and i32 %tmp196200, 64 ; <i32> [#uses=1]
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%tmp203 = and i32 %tmp199, -65 ; <i32> [#uses=1]
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%tmp204 = or i32 %tmp203, %tmp201 ; <i32> [#uses=1]
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store i32 %tmp204, i32* %tmp198
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%tmp206 = getelementptr %struct.attr_desc, %struct.attr_desc* null, i32 0, i32 4 ; <i32*> [#uses=1]
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%tmp207 = load i32, i32* %tmp206 ; <i32> [#uses=1]
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%tmp211 = getelementptr %struct.attr_desc, %struct.attr_desc* null, i32 0, i32 4 ; <i32*> [#uses=2]
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%tmp212 = load i32, i32* %tmp211 ; <i32> [#uses=1]
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%tmp209213 = shl i32 %tmp207, 1 ; <i32> [#uses=1]
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%tmp214 = and i32 %tmp209213, 128 ; <i32> [#uses=1]
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%tmp216 = and i32 %tmp212, -129 ; <i32> [#uses=1]
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%tmp217 = or i32 %tmp216, %tmp214 ; <i32> [#uses=1]
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store i32 %tmp217, i32* %tmp211
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ret void
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}
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@ -1,33 +0,0 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s
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@lens = external global i8* ; <i8**> [#uses=1]
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@vals = external global i32* ; <i32**> [#uses=1]
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define i32 @test(i32 %i) {
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; CHECK-LABEL: test:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addis 4, 2, .LC0@toc@ha
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; CHECK-NEXT: extsw 3, 3
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; CHECK-NEXT: addis 5, 2, .LC1@toc@ha
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; CHECK-NEXT: ld 4, .LC0@toc@l(4)
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; CHECK-NEXT: ld 4, 0(4)
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; CHECK-NEXT: lbzx 3, 4, 3
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; CHECK-NEXT: ld 4, .LC1@toc@l(5)
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; CHECK-NEXT: subfic 3, 3, 1
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; CHECK-NEXT: extsw 3, 3
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; CHECK-NEXT: ld 4, 0(4)
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; CHECK-NEXT: sldi 3, 3, 2
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; CHECK-NEXT: lwzx 3, 4, 3
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; CHECK-NEXT: blr
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%tmp = load i8*, i8** @lens ; <i8*> [#uses=1]
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%tmp1 = getelementptr i8, i8* %tmp, i32 %i ; <i8*> [#uses=1]
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%tmp.upgrd.1 = load i8, i8* %tmp1 ; <i8> [#uses=1]
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%tmp2 = zext i8 %tmp.upgrd.1 to i32 ; <i32> [#uses=1]
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%tmp3 = load i32*, i32** @vals ; <i32*> [#uses=1]
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%tmp5 = sub i32 1, %tmp2 ; <i32> [#uses=1]
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%tmp6 = getelementptr i32, i32* %tmp3, i32 %tmp5 ; <i32*> [#uses=1]
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%tmp7 = load i32, i32* %tmp6 ; <i32> [#uses=1]
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ret i32 %tmp7
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}
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@ -1,11 +0,0 @@
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; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32--
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define void @img2buf(i32 %symbol_size_in_bytes, i16* %ui16) nounwind {
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%tmp93 = load i16, i16* null ; <i16> [#uses=1]
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%tmp99 = call i16 @llvm.bswap.i16( i16 %tmp93 ) ; <i16> [#uses=1]
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store i16 %tmp99, i16* %ui16
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ret void
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}
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declare i16 @llvm.bswap.i16(i16)
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@ -1,8 +0,0 @@
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; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 | grep vsldoi
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; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 | not grep vor
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define <4 x float> @func(<4 x float> %fp0, <4 x float> %fp1) {
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%tmp76 = shufflevector <4 x float> %fp0, <4 x float> %fp1, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>> [#uses=1]
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ret <4 x float> %tmp76
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}
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@ -1,31 +0,0 @@
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; RUN: llc -verify-machineinstrs < %s
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; REQUIRES: default_triple
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%struct..0anon = type { i32 }
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%struct.rtx_def = type { i16, i8, i8, [1 x %struct..0anon] }
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define fastcc void @immed_double_const(i32 %i0, i32 %i1) {
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entry:
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%tmp1 = load i32, i32* null ; <i32> [#uses=1]
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switch i32 %tmp1, label %bb103 [
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||||
i32 1, label %bb
|
||||
i32 3, label %bb
|
||||
]
|
||||
bb: ; preds = %entry, %entry
|
||||
%tmp14 = icmp sgt i32 0, 31 ; <i1> [#uses=1]
|
||||
br i1 %tmp14, label %cond_next77, label %cond_next17
|
||||
cond_next17: ; preds = %bb
|
||||
ret void
|
||||
cond_next77: ; preds = %bb
|
||||
%tmp79.not = icmp ne i32 %i1, 0 ; <i1> [#uses=1]
|
||||
%tmp84 = icmp slt i32 %i0, 0 ; <i1> [#uses=2]
|
||||
%bothcond1 = or i1 %tmp79.not, %tmp84 ; <i1> [#uses=1]
|
||||
br i1 %bothcond1, label %bb88, label %bb99
|
||||
bb88: ; preds = %cond_next77
|
||||
%bothcond2 = and i1 false, %tmp84 ; <i1> [#uses=0]
|
||||
ret void
|
||||
bb99: ; preds = %cond_next77
|
||||
ret void
|
||||
bb103: ; preds = %entry
|
||||
ret void
|
||||
}
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user