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Imported Upstream version 5.18.0.167
Former-commit-id: 289509151e0fee68a1b591a20c9f109c3c789d3a
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external/llvm/test/CodeGen/Mips/brconlt.ll
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29
external/llvm/test/CodeGen/Mips/brconlt.ll
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@ -1,29 +0,0 @@
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; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
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; RUN: llc -march=mips -mattr=micromips -mcpu=mips32r6 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=MM32R6
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@i = global i32 5, align 4
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@j = global i32 10, align 4
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@k = global i32 5, align 4
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@result = global i32 0, align 4
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define void @test() nounwind {
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entry:
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%0 = load i32, i32* @j, align 4
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%1 = load i32, i32* @i, align 4
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%cmp = icmp slt i32 %0, %1
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br i1 %cmp, label %if.end, label %if.then
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; 16: slt ${{[0-9]+}}, ${{[0-9]+}}
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; MM32R6: slt ${{[0-9]+}}, ${{[0-9]+}}
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; 16: btnez $[[LABEL:[0-9A-Ba-b_]+]]
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; 16: $[[LABEL]]:
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if.then: ; preds = %entry
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store i32 1, i32* @result, align 4
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br label %if.end
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if.end: ; preds = %entry, %if.then
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ret void
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}
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