Imported Upstream version 5.18.0.167

Former-commit-id: 289509151e0fee68a1b591a20c9f109c3c789d3a

external/llvm/test/CodeGen/Mips/2008-06-05-Carry.ll

@@ -1,23 +0,0 @@
-; RUN: llc -march=mips < %s | FileCheck %s
-
-define i64 @add64(i64 %u, i64 %v) nounwind  {
-entry:
-; CHECK-LABEL: add64:
-; CHECK: addu
-; CHECK-DAG: sltu
-; CHECK-DAG: addu
-; CHECK: addu
-  %tmp2 = add i64 %u, %v
-  ret i64 %tmp2
-}
-
-define i64 @sub64(i64 %u, i64 %v) nounwind  {
-entry:
-; CHECK-LABEL: sub64
-; CHECK-DAG: sltu
-; CHECK-DAG: subu
-; CHECK: subu
-; CHECK: subu
-  %tmp2 = sub i64 %u, %v
-  ret i64 %tmp2
-}

external/llvm/test/CodeGen/Mips/2008-07-03-SRet.ll

@@ -1,18 +0,0 @@
-; RUN: llc -march=mips < %s | FileCheck %s
-
-%struct.sret0 = type { i32, i32, i32 }
-
-define void @test0(%struct.sret0* noalias sret %agg.result, i32 %dummy) nounwind {
-entry:
-; CHECK: sw ${{[0-9]+}}, {{[0-9]+}}($4)
-; CHECK: sw ${{[0-9]+}}, {{[0-9]+}}($4)
-; CHECK: sw ${{[0-9]+}}, {{[0-9]+}}($4)
-  getelementptr %struct.sret0, %struct.sret0* %agg.result, i32 0, i32 0    ; <i32*>:0 [#uses=1]
-  store i32 %dummy, i32* %0, align 4
-  getelementptr %struct.sret0, %struct.sret0* %agg.result, i32 0, i32 1    ; <i32*>:1 [#uses=1]
-  store i32 %dummy, i32* %1, align 4
-  getelementptr %struct.sret0, %struct.sret0* %agg.result, i32 0, i32 2    ; <i32*>:2 [#uses=1]
-  store i32 %dummy, i32* %2, align 4
-  ret void
-}
-

external/llvm/test/CodeGen/Mips/2008-07-06-fadd64.ll

@@ -1,8 +0,0 @@
-; RUN: llc -march=mips -mattr=single-float  < %s | FileCheck %s
-
-define double @dofloat(double %a, double %b) nounwind {
-entry:
-; CHECK: __adddf3
-	fadd double %a, %b		; <double>:0 [#uses=1]
-	ret double %0
-}

external/llvm/test/CodeGen/Mips/2008-07-07-FPExtend.ll

@@ -1,8 +0,0 @@
-; RUN: llc -march=mips -mattr=single-float  < %s | FileCheck %s
-
-define double @dofloat(float %a) nounwind {
-entry:
-; CHECK: __extendsfdf2
-	fpext float %a to double		; <double>:0 [#uses=1]
-	ret double %0
-}

external/llvm/test/CodeGen/Mips/2008-07-07-Float2Int.ll

@@ -1,17 +0,0 @@
-; RUN: llc -march=mips < %s | FileCheck %s
-
-define i32 @fptoint(float %a) nounwind {
-entry:
-; CHECK: trunc.w.s 
-  fptosi float %a to i32		; <i32>:0 [#uses=1]
-  ret i32 %0
-}
-
-define i32 @fptouint(float %a) nounwind {
-entry:
-; CHECK: fptouint
-; CHECK: trunc.w.s 
-; CHECK: trunc.w.s 
-  fptoui float %a to i32		; <i32>:0 [#uses=1]
-  ret i32 %0
-}

external/llvm/test/CodeGen/Mips/2008-07-07-IntDoubleConvertions.ll

@@ -1,34 +0,0 @@
-; RUN: llc -march=mips -mattr=single-float  < %s | FileCheck %s
-
-define double @int2fp(i32 %a) nounwind {
-entry:
-; CHECK: int2fp
-; CHECK: __floatsidf
-	sitofp i32 %a to double		; <double>:0 [#uses=1]
-	ret double %0
-}
-
-define double @uint2double(i32 %a) nounwind {
-entry:
-; CHECK: uint2double
-; CHECK: __floatunsidf
-	uitofp i32 %a to double		; <double>:0 [#uses=1]
-	ret double %0
-}
-
-define i32 @double2int(double %a) nounwind {
-entry:
-; CHECK: double2int
-; CHECK: __fixdfsi
-  fptosi double %a to i32   ; <i32>:0 [#uses=1]
-  ret i32 %0
-}
-
-define i32 @double2uint(double %a) nounwind {
-entry:
-; CHECK: double2uint
-; CHECK: __fixunsdfsi
-  fptoui double %a to i32   ; <i32>:0 [#uses=1]
-  ret i32 %0
-}
-

external/llvm/test/CodeGen/Mips/2008-07-15-InternalConstant.ll

@@ -1,23 +0,0 @@
-; RUN: llc -march=mips -relocation-model=static  < %s | FileCheck %s
-
-@.str = internal unnamed_addr constant [10 x i8] c"AAAAAAAAA\00"
-@i0 = internal unnamed_addr constant [5 x i32] [ i32 0, i32 1, i32 2, i32 3, i32 4 ]
-
-define i8* @foo() nounwind {
-entry:
-; CHECK: foo
-; CHECK: %hi(.str)
-; CHECK: %lo(.str)
-	ret i8* getelementptr ([10 x i8], [10 x i8]* @.str, i32 0, i32 0)
-}
-
-define i32* @bar() nounwind  {
-entry:
-; CHECK: bar
-; CHECK: %hi(i0)
-; CHECK: %lo(i0)
-  ret i32* getelementptr ([5 x i32], [5 x i32]* @i0, i32 0, i32 0)
-}
-
-; CHECK: rodata.str1.4,"aMS",@progbits
-; CHECK: rodata,"a",@progbits

external/llvm/test/CodeGen/Mips/2008-07-15-SmallSection.ll

@@ -1,62 +0,0 @@
-; RUN: llc < %s -march=mips -mcpu=mips32 -mips-ssection-threshold=8 -verify-machineinstrs \
-; RUN:     -relocation-model=static -mattr=+noabicalls -mgpopt \
-; RUN:   | FileCheck %s --check-prefixes=BASIC,COMMON,ADDR32
-; RUN: llc < %s -march=mips -mcpu=mips32 -mips-ssection-threshold=8 -verify-machineinstrs \
-; RUN:     -relocation-model=static -mattr=+noabicalls -mgpopt -membedded-data \
-; RUN:   | FileCheck %s --check-prefixes=EMBDATA,COMMON,ADDR32
-
-; RUN: llc < %s -march=mips64 -mcpu=mips4 -mips-ssection-threshold=8 -verify-machineinstrs \
-; RUN:     -relocation-model=static -mattr=+noabicalls -mgpopt -target-abi n64 \
-; RUN:   | FileCheck %s --check-prefixes=BASIC,COMMON,N64
-; RUN: llc < %s -march=mips64 -mcpu=mips4 -mips-ssection-threshold=8 -verify-machineinstrs \
-; RUN:     -relocation-model=static -mattr=+noabicalls,+sym32 -mgpopt -target-abi n64 \
-; RUN:   | FileCheck %s --check-prefixes=BASIC,COMMON,N64
-; RUN: llc < %s -march=mips64 -mcpu=mips4 -mips-ssection-threshold=8 -verify-machineinstrs \
-; RUN:     -relocation-model=static -mattr=+noabicalls -mgpopt -target-abi n32 \
-; RUN:   | FileCheck %s --check-prefixes=BASIC,COMMON,ADDR32
-
-; Test the layout of objects when compiling for static, noabicalls environment.
-
-%struct.anon = type { i32, i32 }
-
-; Check that when synthesizing a pointer to the second element of foo, that
-; we use the correct addition operation. O32 and N32 have 32-bit address
-; spaces, so they use addiu. N64 has a 64bit address space, but has a submode
-; where symbol sizes are 32 bits. In those cases we use daddiu.
-
-; CHECK-LABEL: A1:
-; N64:       daddiu ${{[0-9]+}}, $gp, %gp_rel(foo)
-; ADDR32:    addiu ${{[0-9]+}}, $gp, %gp_rel(foo)
-
-; BASIC: .type  s0,@object
-; BASIC-NEXT: .section .sdata,"aw",@progbits
-
-; EMDATA: .type  s0,@object
-; EMDATA-NEXT: .section .rodata,"a",@progbits
-
-@s0 = constant [8 x i8] c"AAAAAAA\00", align 4
-
-; BASIC: .type  foo,@object
-; BASIC-NOT:  .section
-
-; EMBDATA: .type  foo,@object
-; EMBDATA-NEXT:  .section .sdata,"aw",@progbits
-@foo = global %struct.anon { i32 2, i32 3 }
-
-; COMMON:  .type bar,@object
-; COMMON-NEXT:  .section  .sbss,"aw",@nobits
-@bar = global %struct.anon zeroinitializer
-
-define i8* @A0() nounwind {
-entry:
-	ret i8* getelementptr ([8 x i8], [8 x i8]* @s0, i32 0, i32 0)
-}
-
-define i32 @A1() nounwind {
-entry:
-  load i32, i32* getelementptr (%struct.anon, %struct.anon* @foo, i32 0, i32 0), align 8 
-  load i32, i32* getelementptr (%struct.anon, %struct.anon* @foo, i32 0, i32 1), align 4 
-  add i32 %1, %0
-  ret i32 %2
-}
-

external/llvm/test/CodeGen/Mips/2008-07-16-SignExtInReg.ll

@@ -1,18 +0,0 @@
-; RUN: llc < %s -march=mips -mcpu=mips32r2 | FileCheck %s
-; RUN: llc < %s -march=mips64 -mcpu=mips64r2 | FileCheck %s
-; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips32r2 -mattr=+mips16 < %s | FileCheck %s
-
-define signext i8 @A(i8 %e.0, i8 signext %sum)  nounwind {
-entry:
-; CHECK: seb
-	add i8 %sum, %e.0		; <i8>:0 [#uses=1]
-	ret i8 %0
-}
-
-define signext i16 @B(i16 %e.0, i16 signext %sum) nounwind {
-entry:
-; CHECK: seh
-	add i16 %sum, %e.0		; <i16>:0 [#uses=1]
-	ret i16 %0
-}
-

external/llvm/test/CodeGen/Mips/2008-07-22-Cstpool.ll

@@ -1,13 +0,0 @@
-; RUN: llc -march=mips < %s | FileCheck %s
-
-define float @F(float %a) nounwind {
-; CHECK: .rodata.cst4,"aM",@progbits 
-entry:
-; CHECK: ($CPI0_{{[0-1]}})
-; CHECK: ($CPI0_{{[0,1]}}) 
-; CHECK: ($CPI0_{{[0,1]}}) 
-; CHECK: ($CPI0_{{[0,1]}}) 
-  fadd float %a, 0x4011333340000000		; <float>:0 [#uses=1]
-  fadd float %0, 0x4010666660000000		; <float>:1 [#uses=1]
-  ret float %1
-}

external/llvm/test/CodeGen/Mips/2008-07-23-fpcmp.ll

@@ -1,38 +0,0 @@
-; RUN: llc < %s -march=mips -o %t
-; RUN: grep "c\..*\.s" %t | count 3
-; RUN: grep "bc1[tf]" %t | count 3
-
-; FIXME: Disabled because branch instructions are generated where
-; conditional move instructions are expected.
-; REQUIRES: disabled
-
-target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
-target triple = "mipsallegrexel-unknown-psp-elf"
-
-define float @A(float %a, float %b) nounwind {
-entry:
-	fcmp ogt float %a, 1.000000e+00		; <i1>:0 [#uses=1]
-	br i1 %0, label %bb, label %bb2
-
-bb:		; preds = %entry
-	fadd float %a, 1.000000e+00		; <float>:1 [#uses=1]
-	ret float %1
-
-bb2:		; preds = %entry
-	ret float %b
-}
-
-define float @B(float %a, float %b) nounwind {
-entry:
-  fcmp ogt float %a, 1.000000e+00   ; <i1>:0 [#uses=1]
-  %.0 = select i1 %0, float %a, float %b    ; <float> [#uses=1]
-  ret float %.0
-}
-
-define i32 @C(i32 %a, i32 %b, float %j) nounwind {
-entry:
-  fcmp ogt float %j, 1.000000e+00   ; <i1>:0 [#uses=1]
-  %.0 = select i1 %0, i32 %a, i32 %b    ; <i32> [#uses=1]
-  ret i32 %.0
-}
-

external/llvm/test/CodeGen/Mips/2008-07-29-icmp.ll

@@ -1,15 +0,0 @@
-; RUN: llc < %s -march=mips | grep "b[ne][eq]" | count 1
-
-; FIXME: Disabled because branch instructions are generated where
-; conditional move instructions are expected.
-; REQUIRES: disabled
-
-target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
-target triple = "mipsallegrexel-unknown-psp-elf"
-
-define float @A(float %a, float %b, i32 %j) nounwind {
-entry:
-	icmp sgt i32 %j, 1		; <i1>:0 [#uses=1]
-	%.0 = select i1 %0, float %a, float %b		; <float> [#uses=1]
-	ret float %.0
-}

external/llvm/test/CodeGen/Mips/2008-07-31-fcopysign.ll

@@ -1,18 +0,0 @@
-; RUN: llc < %s -march=mips -o %t
-; RUN: grep abs.s  %t | count 1
-; RUN: grep neg.s %t | count 1
-
-; FIXME: Should not emit abs.s or neg.s since these instructions produce
-;        incorrect results if the operand is NaN.
-; REQUIRES: disabled
-
-target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
-target triple = "mipsallegrexel-unknown-psp-elf"
-
-define float @A(float %i, float %j) nounwind  {
-entry:
-	tail call float @copysignf( float %i, float %j ) nounwind readnone 		; <float>:0 [#uses=1]
-	ret float %0
-}
-
-declare float @copysignf(float, float) nounwind readnone 

external/llvm/test/CodeGen/Mips/2008-08-01-AsmInline.ll

@@ -1,71 +0,0 @@
-; RUN: llc -march=mips -mcpu=mips32 < %s | FileCheck %s
-; RUN: llc -march=mips64el -mcpu=mips64r2 -target-abi=n64 < %s | FileCheck %s
-
-%struct.DWstruct = type { i32, i32 }
-
-define i32 @A0(i32 %u, i32 %v) nounwind  {
-entry:
-; CHECK: multu 
-; CHECK: mflo
-; CHECK: mfhi
-  %asmtmp = tail call %struct.DWstruct asm "multu $2,$3", "={lo},={hi},d,d"( i32 %u, i32 %v ) nounwind
-  %asmresult = extractvalue %struct.DWstruct %asmtmp, 0
-  %asmresult1 = extractvalue %struct.DWstruct %asmtmp, 1    ; <i32> [#uses=1]
-  %res = add i32 %asmresult, %asmresult1
-  ret i32 %res
-}
-
-@gi2 = external global i32
-@gi1 = external global i32
-@gi0 = external global i32
-@gf0 = external global float
-@gf1 = external global float
-@gd0 = external global double
-@gd1 = external global double
-
-define void @foo0() nounwind {
-entry:
-; CHECK: addu
-  %0 = load i32, i32* @gi1, align 4
-  %1 = load i32, i32* @gi0, align 4
-  %2 = tail call i32 asm "addu $0, $1, $2", "=r,r,r"(i32 %0, i32 %1) nounwind
-  store i32 %2, i32* @gi2, align 4
-  ret void
-}
-
-define void @foo2() nounwind {
-entry:
-; CHECK: neg.s
-  %0 = load float, float* @gf1, align 4
-  %1 = tail call float asm "neg.s $0, $1", "=f,f"(float %0) nounwind
-  store float %1, float* @gf0, align 4
-  ret void
-}
-
-define void @foo3() nounwind {
-entry:
-; CHECK: neg.d
-  %0 = load double, double* @gd1, align 8
-  %1 = tail call double asm "neg.d $0, $1", "=f,f"(double %0) nounwind
-  store double %1, double* @gd0, align 8
-  ret void
-}
-
-; Check that RA doesn't allocate registers in the clobber list.
-; CHECK-LABEL: foo4:
-; CHECK: #APP
-; CHECK-NOT: ulh $2
-; CHECK: #NO_APP
-; CHECK: #APP
-; CHECK-NOT: $f0
-; CHECK: #NO_APP
-
-define void @foo4() {
-entry:
-  %0 = tail call i32 asm sideeffect "ulh $0,16($$sp)\0A\09", "=r,~{$2}"()
-  store i32 %0, i32* @gi2, align 4
-  %1 = load float, float* @gf0, align 4
-  %2 = tail call double asm sideeffect "cvt.d.s $0, $1\0A\09", "=f,f,~{$f0}"(float %1)
-  store double %2, double* @gd0, align 8
-  ret void
-}

external/llvm/test/CodeGen/Mips/2008-08-03-ReturnDouble.ll

@@ -1,18 +0,0 @@
-; Double return in abicall (default)
-; RUN: llc < %s -march=mips
-; PR2615
-
-define double @main(...) {
-entry:
-        %retval = alloca double         ; <double*> [#uses=3]
-        store double 0.000000e+00, double* %retval
-        %r = alloca double              ; <double*> [#uses=1]
-        load double, double* %r         ; <double>:0 [#uses=1]
-        store double %0, double* %retval
-        br label %return
-
-return:         ; preds = %entry
-        load double, double* %retval            ; <double>:1 [#uses=1]
-        ret double %1
-}
-

external/llvm/test/CodeGen/Mips/2008-08-03-fabs64.ll

@@ -1,18 +0,0 @@
-; DISABLED: llc < %s -march=mips -o %t
-; DISABLED: grep {lui.*32767} %t | count 1
-; DISABLED: grep {ori.*65535} %t | count 1
-; RUN: false
-; XFAIL: *
-
-target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
-target triple = "mipsallegrexel-unknown-psp-elf"
-
-define double @A(double %c, double %d) nounwind readnone  {
-entry:
-	tail call double @fabs( double %c ) nounwind readnone 		; <double>:0 [#uses=1]
-	tail call double @fabs( double %d ) nounwind readnone 		; <double>:0 [#uses=1]
-  fadd double %0, %1
-  ret double %2
-}
-
-declare double @fabs(double) nounwind readnone 

external/llvm/test/CodeGen/Mips/2008-08-04-Bitconvert.ll

@@ -1,15 +0,0 @@
-; RUN: llc -march=mips < %s | FileCheck %s
-
-define float @A(i32 %u) nounwind  {
-entry:
-; CHECK: mtc1 
-  bitcast i32 %u to float
-  ret float %0
-}
-
-define i32 @B(float %u) nounwind  {
-entry:
-; CHECK: mfc1 
-  bitcast float %u to i32
-  ret i32 %0
-}

external/llvm/test/CodeGen/Mips/2008-08-06-Alloca.ll

@@ -1,15 +0,0 @@
-; RUN: llc -march=mips < %s | FileCheck %s
-
-define i32 @twoalloca(i32 %size) nounwind {
-entry:
-; CHECK: subu ${{[0-9]+}}, $sp
-; CHECK: subu ${{[0-9]+}}, $sp
-  alloca i8, i32 %size    ; <i8*>:0 [#uses=1]
-  alloca i8, i32 %size    ; <i8*>:1 [#uses=1]
-  call i32 @foo( i8* %0 ) nounwind    ; <i32>:2 [#uses=1]
-  call i32 @foo( i8* %1 ) nounwind    ; <i32>:3 [#uses=1]
-  add i32 %3, %2    ; <i32>:4 [#uses=1]
-  ret i32 %4
-}
-
-declare i32 @foo(i8*)

external/llvm/test/CodeGen/Mips/2008-08-07-CC.ll

@@ -1,12 +0,0 @@
-; RUN: llc < %s -march=mips
-; Mips must ignore fastcc
-
-target datalayout =
-"e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
-target triple = "mipsallegrexel-unknown-psp-elf"
-
-define internal fastcc i32 @A(i32 %u) nounwind  {
-entry:
-  ret i32 %u 
-}
-

external/llvm/test/CodeGen/Mips/2008-08-07-FPRound.ll

@@ -1,8 +0,0 @@
-; RUN: llc -march=mips -mattr=single-float  < %s | FileCheck %s
-
-define float @round2float(double %a) nounwind {
-entry:
-; CHECK: __truncdfsf2
-	fptrunc double %a to float		; <float>:0 [#uses=1]
-	ret float %0
-}