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Imported Upstream version 5.18.0.167

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Former-commit-id: 289509151e0fee68a1b591a20c9f109c3c789d3a
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Xamarin Public Jenkins (auto-signing)
2018-10-20 08:25:10 +00:00
parent e19d552987
commit b084638f15
28489 changed files with 184 additions and 3866856 deletions
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21
external/llvm/test/CodeGen/ARM/inlineasm-X-allocation.ll vendored
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@ -1,21 +0,0 @@
; RUN: llc -mtriple=armv7-none-eabi -mattr=-neon,-vfpv2 %s -o - | FileCheck %s -check-prefix=novfp
; RUN: llc -mtriple=armv7-none-eabi -mattr=+neon %s -float-abi=hard -o - | FileCheck %s -check-prefix=vfp
; vfp-LABEL: f1
; vfp-CHECK: vadd.f32 s0, s0, s0
; In the novfp case, the compiler is forced to assign a core register.
; Although this register class can't be used with the vadd.f32 instruction,
; the compiler behaved as expected since it is allowed to emit anything.
; novfp-LABEL: f1
; novfp-CHECK: vadd.f32 r0, r0, r0
; This can be generated by a function such as:
; void f1(float f) {asm volatile ("add.f32 $0, $0, $0" : : "X" (f));}
define arm_aapcs_vfpcc void @f1(float %f) {
entry:
call void asm sideeffect "vadd.f32 $0, $0, $0", "X" (float %f) nounwind
ret void
}