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Imported Upstream version 5.18.0.167
Former-commit-id: 289509151e0fee68a1b591a20c9f109c3c789d3a
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external/llvm/test/CodeGen/ARM/ifconv-regmask.ll
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external/llvm/test/CodeGen/ARM/ifconv-regmask.ll
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@ -1,35 +0,0 @@
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; RUN: llc < %s -mtriple=thumbv7s-apple-ios6.0.0 -verify-machineinstrs
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%union.opcode = type { i32 }
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@opcode = external global %union.opcode, align 4
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; Function Attrs: nounwind ssp
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define i32 @sfu() {
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entry:
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%bf.load = load i32, i32* getelementptr inbounds (%union.opcode, %union.opcode* @opcode, i32 0, i32 0), align 4
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%bf.lshr = lshr i32 %bf.load, 26
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%bf.clear = and i32 %bf.lshr, 7
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switch i32 %bf.clear, label %return [
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i32 0, label %sw.bb
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i32 1, label %sw.bb1
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]
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sw.bb: ; preds = %entry
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%call = tail call i32 @func0()
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br label %return
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sw.bb1: ; preds = %entry
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%call2 = tail call i32 @func1()
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br label %return
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return: ; preds = %sw.bb1, %sw.bb, %entry
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%retval.0 = phi i32 [ %call2, %sw.bb1 ], [ %call, %sw.bb ], [ -1, %entry ]
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ret i32 %retval.0
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}
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; Function Attrs: nounwind ssp
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declare i32 @func0()
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; Function Attrs: nounwind ssp
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declare i32 @func1()
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