You've already forked linux-packaging-mono
Imported Upstream version 5.18.0.167
Former-commit-id: 289509151e0fee68a1b591a20c9f109c3c789d3a
This commit is contained in:
Xamarin Public Jenkins (auto-signing)
parent
e19d552987
commit
b084638f15
16
external/llvm/test/CodeGen/ARM/Windows/aapcs.ll
vendored
16
external/llvm/test/CodeGen/ARM/Windows/aapcs.ll
vendored
@ -1,16 +0,0 @@
|
||||
; RUN: llc -mtriple=thumbv7-windows-itanium -mcpu=cortex-a9 -o - %s | FileCheck %s
|
||||
|
||||
; AAPCS mandates an 8-byte stack alignment. The alloca is implicitly aligned,
|
||||
; and no bic is required.
|
||||
|
||||
declare void @callee(i8 *%i)
|
||||
|
||||
define void @caller() {
|
||||
%i = alloca i8, align 8
|
||||
call void @callee(i8* %i)
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECK: sub sp, #8
|
||||
; CHECK-NOT: bic
|
||||
|
||||
24
external/llvm/test/CodeGen/ARM/Windows/alloca.ll
vendored
24
external/llvm/test/CodeGen/ARM/Windows/alloca.ll
vendored
@ -1,24 +0,0 @@
|
||||
; RUN: llc -O0 -mtriple thumbv7-windows-itanium -filetype asm -o - %s | FileCheck %s
|
||||
|
||||
declare arm_aapcs_vfpcc i32 @num_entries()
|
||||
|
||||
define arm_aapcs_vfpcc void @test___builtin_alloca() {
|
||||
entry:
|
||||
%array = alloca i8*, align 4
|
||||
%call = call arm_aapcs_vfpcc i32 @num_entries()
|
||||
%mul = mul i32 4, %call
|
||||
%0 = alloca i8, i32 %mul
|
||||
store i8* %0, i8** %array, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECK: bl num_entries
|
||||
; Any register is actually valid here, but turns out we use lr,
|
||||
; because we do not have the kill flag on R0.
|
||||
; CHECK: mov.w [[R1:lr]], #7
|
||||
; CHECK: add.w [[R0:r[0-9]+]], [[R1]], [[R0]], lsl #2
|
||||
; CHECK: bic [[R0]], [[R0]], #7
|
||||
; CHECK: lsrs r4, [[R0]], #2
|
||||
; CHECK: bl __chkstk
|
||||
; CHECK: sub.w sp, sp, r4
|
||||
|
||||
@ -1,15 +0,0 @@
|
||||
; RUN: llc -mtriple thumbv7--windows-itanium -filetype asm -o - %s | FileCheck %s
|
||||
|
||||
declare void @llvm.eh.sjlj.longjmp(i8*)
|
||||
|
||||
define arm_aapcs_vfpcc void @test___builtin_longjump(i8* %b) {
|
||||
entry:
|
||||
tail call void @llvm.eh.sjlj.longjmp(i8* %b)
|
||||
unreachable
|
||||
}
|
||||
|
||||
; CHECK: push.w {r11, lr}
|
||||
; CHECK: ldr.w r11, [r0]
|
||||
; CHECK: ldr.w sp, [r0, #8]
|
||||
; CHECK: ldr.w pc, [r0, #4]
|
||||
|
||||
@ -1,27 +0,0 @@
|
||||
; RUN: llc -mtriple thumbv7--windows-itanium -code-model large -verify-machineinstrs -filetype obj -o - %s \
|
||||
; RUN: | llvm-objdump -no-show-raw-insn -d - | FileCheck %s
|
||||
|
||||
; ModuleID = 'reduced.c'
|
||||
target datalayout = "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:64-v128:64:128-a:0:32-n32-S64"
|
||||
target triple = "thumbv7--windows-itanium"
|
||||
|
||||
define arm_aapcs_vfpcc i8 @isel(i32 %i) {
|
||||
entry:
|
||||
%i.addr = alloca i32, align 4
|
||||
%buffer = alloca [4096 x i8], align 1
|
||||
store i32 %i, i32* %i.addr, align 4
|
||||
%0 = load i32, i32* %i.addr, align 4
|
||||
%rem = urem i32 %0, 4096
|
||||
%arrayidx = getelementptr inbounds [4096 x i8], [4096 x i8]* %buffer, i32 0, i32 %rem
|
||||
%1 = load volatile i8, i8* %arrayidx, align 1
|
||||
ret i8 %1
|
||||
}
|
||||
|
||||
; CHECK-LABEL: isel
|
||||
; CHECK: push {r4, r5}
|
||||
; CHECK: movw r12, #0
|
||||
; CHECK: movt r12, #0
|
||||
; CHECK: movw r4, #{{\d*}}
|
||||
; CHECK: blx r12
|
||||
; CHECK: sub.w sp, sp, r4
|
||||
|
||||
24
external/llvm/test/CodeGen/ARM/Windows/chkstk.ll
vendored
24
external/llvm/test/CodeGen/ARM/Windows/chkstk.ll
vendored
@ -1,24 +0,0 @@
|
||||
; RUN: llc -mtriple=thumbv7-windows -mcpu=cortex-a9 -verify-machineinstrs %s -o - \
|
||||
; RUN: | FileCheck -check-prefix CHECK-DEFAULT-CODE-MODEL %s
|
||||
|
||||
; RUN: llc -mtriple=thumbv7-windows -mcpu=cortex-a9 -code-model=large -verify-machineinstrs %s -o - \
|
||||
; RUN: | FileCheck -check-prefix CHECK-LARGE-CODE-MODEL %s
|
||||
|
||||
define arm_aapcs_vfpcc void @check_watermark() {
|
||||
entry:
|
||||
%buffer = alloca [4096 x i8], align 1
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECK-DEFAULT-CODE-MODEL: check_watermark:
|
||||
; CHECK-DEFAULT-CODE-MODEL: movw r4, #1024
|
||||
; CHECK-DEFAULT-CODE-MODEL: bl __chkstk
|
||||
; CHECK-DEFAULT-CODE-MODEL: sub.w sp, sp, r4
|
||||
|
||||
; CHECK-LARGE-CODE-MODEL: check_watermark:
|
||||
; CHECK-LARGE-CODE-MODEL: movw r12, :lower16:__chkstk
|
||||
; CHECK-LARGE-CODE-MODEL: movt r12, :upper16:__chkstk
|
||||
; CHECK-LARGE-CODE-MODEL: movw r4, #1024
|
||||
; CHECK-LARGE-CODE-MODEL: blx r12
|
||||
; CHECK-LARGE-CODE-MODEL: sub.w sp, sp, r4
|
||||
|
||||
185
external/llvm/test/CodeGen/ARM/Windows/dbzchk.ll
vendored
185
external/llvm/test/CodeGen/ARM/Windows/dbzchk.ll
vendored
@ -1,185 +0,0 @@
|
||||
; RUN: llc -mtriple thumbv7--windows-itanium -print-machineinstrs=expand-isel-pseudos -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s -check-prefix CHECK-DIV
|
||||
|
||||
; int f(int n, int d) {
|
||||
; if (n / d)
|
||||
; return 1;
|
||||
; return 0;
|
||||
; }
|
||||
|
||||
define arm_aapcs_vfpcc i32 @f(i32 %n, i32 %d) {
|
||||
entry:
|
||||
%retval = alloca i32, align 4
|
||||
%n.addr = alloca i32, align 4
|
||||
%d.addr = alloca i32, align 4
|
||||
store i32 %n, i32* %n.addr, align 4
|
||||
store i32 %d, i32* %d.addr, align 4
|
||||
%0 = load i32, i32* %n.addr, align 4
|
||||
%1 = load i32, i32* %d.addr, align 4
|
||||
%div = sdiv i32 %0, %1
|
||||
%tobool = icmp ne i32 %div, 0
|
||||
br i1 %tobool, label %if.then, label %if.end
|
||||
|
||||
if.then:
|
||||
store i32 1, i32* %retval, align 4
|
||||
br label %return
|
||||
|
||||
if.end:
|
||||
store i32 0, i32* %retval, align 4
|
||||
br label %return
|
||||
|
||||
return:
|
||||
%2 = load i32, i32* %retval, align 4
|
||||
ret i32 %2
|
||||
}
|
||||
|
||||
; CHECK-DIV-DAG: %bb.0
|
||||
; CHECK-DIV-DAG: Successors according to CFG: %bb.1({{.*}}) %bb.2
|
||||
; CHECK-DIV-DAG: %bb.1
|
||||
; CHECK-DIV-DAG: Successors according to CFG: %bb.3
|
||||
; CHECK-DIV-DAG: %bb.2
|
||||
; CHECK-DIV-DAG: Successors according to CFG: %bb.3
|
||||
; CHECK-DIV-DAG: %bb.3
|
||||
|
||||
; RUN: llc -mtriple thumbv7--windows-itanium -print-machineinstrs=expand-isel-pseudos -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s -check-prefix CHECK-MOD
|
||||
|
||||
; int r;
|
||||
; int g(int l, int m) {
|
||||
; if (m <= 0)
|
||||
; return 0;
|
||||
; return (r = l % m);
|
||||
; }
|
||||
|
||||
@r = common global i32 0, align 4
|
||||
|
||||
define arm_aapcs_vfpcc i32 @g(i32 %l, i32 %m) {
|
||||
entry:
|
||||
%cmp = icmp eq i32 %m, 0
|
||||
br i1 %cmp, label %return, label %if.end
|
||||
|
||||
if.end:
|
||||
%rem = urem i32 %l, %m
|
||||
store i32 %rem, i32* @r, align 4
|
||||
br label %return
|
||||
|
||||
return:
|
||||
%retval.0 = phi i32 [ %rem, %if.end ], [ 0, %entry ]
|
||||
ret i32 %retval.0
|
||||
}
|
||||
|
||||
; CHECK-MOD-DAG: %bb.0
|
||||
; CHECK-MOD-DAG: Successors according to CFG: %bb.2({{.*}}) %bb.1
|
||||
; CHECK-MOD-DAG: %bb.1
|
||||
; CHECK-MOD-DAG: Successors according to CFG: %bb.3
|
||||
; CHECK-MOD-DAG: %bb.3
|
||||
; CHECK-MOD-DAG: Successors according to CFG: %bb.2
|
||||
; CHECK-MOD-DAG: %bb.2
|
||||
|
||||
; RUN: llc -mtriple thumbv7--windows-itanium -print-machineinstrs=expand-isel-pseudos -verify-machineinstrs -filetype asm -o /dev/null %s 2>&1 | FileCheck %s -check-prefix CHECK-CFG
|
||||
; RUN: llc -mtriple thumbv7--windows-itanium -verify-machineinstrs -filetype asm -o - %s | FileCheck %s -check-prefix CHECK-CFG-ASM
|
||||
|
||||
; unsigned c;
|
||||
; extern unsigned long g(void);
|
||||
; int f(unsigned u, signed char b) {
|
||||
; if (b)
|
||||
; c = g() % u;
|
||||
; return c;
|
||||
; }
|
||||
|
||||
@c = common global i32 0, align 4
|
||||
|
||||
declare arm_aapcs_vfpcc i32 @i()
|
||||
|
||||
define arm_aapcs_vfpcc i32 @h(i32 %u, i8 signext %b) #0 {
|
||||
entry:
|
||||
%tobool = icmp eq i8 %b, 0
|
||||
br i1 %tobool, label %entry.if.end_crit_edge, label %if.then
|
||||
|
||||
entry.if.end_crit_edge:
|
||||
%.pre = load i32, i32* @c, align 4
|
||||
br label %if.end
|
||||
|
||||
if.then:
|
||||
%call = tail call arm_aapcs_vfpcc i32 @i()
|
||||
%rem = urem i32 %call, %u
|
||||
store i32 %rem, i32* @c, align 4
|
||||
br label %if.end
|
||||
|
||||
if.end:
|
||||
%0 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %rem, %if.then ]
|
||||
ret i32 %0
|
||||
}
|
||||
|
||||
attributes #0 = { optsize }
|
||||
|
||||
; CHECK-CFG-DAG: %bb.0
|
||||
; CHECK-CFG-DAG: t2Bcc %bb.2
|
||||
; CHECK-CFG-DAG: t2B %bb.1
|
||||
|
||||
; CHECK-CFG-DAG: %bb.1
|
||||
; CHECK-CFG-DAG: t2B %bb.3
|
||||
|
||||
; CHECK-CFG-DAG: %bb.2
|
||||
; CHECK-CFG-DAG: tCMPi8 %{{[0-9]}}, 0
|
||||
; CHECK-CFG-DAG: t2Bcc %bb.5
|
||||
|
||||
; CHECK-CFG-DAG: %bb.4
|
||||
|
||||
; CHECK-CFG-DAG: %bb.3
|
||||
; CHECK-CFG-DAG: tBX_RET
|
||||
|
||||
; CHECK-CFG-DAG: %bb.5
|
||||
; CHECK-CFG-DAG: t__brkdiv0
|
||||
|
||||
; CHECK-CFG-ASM-LABEL: h:
|
||||
; CHECK-CFG-ASM: cbz r{{[0-9]}}, .LBB2_4
|
||||
; CHECK-CFG-ASM: bl __rt_udiv
|
||||
; CHECK-CFG-ASM-LABEL: .LBB2_4:
|
||||
; CHECK-CFG-ASM: __brkdiv0
|
||||
|
||||
; RUN: llc -O1 -mtriple thumbv7--windows-itanium -verify-machineinstrs -filetype asm -o - %s | FileCheck %s -check-prefix CHECK-WIN__DBZCHK
|
||||
|
||||
; long k(void);
|
||||
; int l(void);
|
||||
; int j(int i) {
|
||||
; if (l() == -1)
|
||||
; return 0;
|
||||
; return k() % i;
|
||||
; }
|
||||
|
||||
declare arm_aapcs_vfpcc i32 @k()
|
||||
declare arm_aapcs_vfpcc i32 @l()
|
||||
|
||||
define arm_aapcs_vfpcc i32 @j(i32 %i) {
|
||||
entry:
|
||||
%retval = alloca i32, align 4
|
||||
%i.addr = alloca i32, align 4
|
||||
store i32 %i, i32* %i.addr, align 4
|
||||
%call = call arm_aapcs_vfpcc i32 @l()
|
||||
%cmp = icmp eq i32 %call, -1
|
||||
br i1 %cmp, label %if.then, label %if.end
|
||||
|
||||
if.then:
|
||||
store i32 0, i32* %retval, align 4
|
||||
br label %return
|
||||
|
||||
if.end:
|
||||
%call1 = call arm_aapcs_vfpcc i32 @k()
|
||||
%0 = load i32, i32* %i.addr, align 4
|
||||
%rem = srem i32 %call1, %0
|
||||
store i32 %rem, i32* %retval, align 4
|
||||
br label %return
|
||||
|
||||
return:
|
||||
%1 = load i32, i32* %retval, align 4
|
||||
ret i32 %1
|
||||
}
|
||||
|
||||
; CHECK-WIN__DBZCHK-LABEL: j:
|
||||
; CHECK-WIN__DBZCHK: cbz r{{[0-7]}}, .LBB
|
||||
; CHECK-WIN__DBZCHK-NOT: cbz r8, .LBB
|
||||
; CHECK-WIN__DBZCHK-NOT: cbz r9, .LBB
|
||||
; CHECK-WIN__DBZCHK-NOT: cbz r10, .LBB
|
||||
; CHECK-WIN__DBZCHK-NOT: cbz r11, .LBB
|
||||
; CHECK-WIN__DBZCHK-NOT: cbz ip, .LBB
|
||||
; CHECK-WIN__DBZCHK-NOT: cbz lr, .LBB
|
||||
|
||||
@ -1,15 +0,0 @@
|
||||
; RUN: llc -O0 -mtriple thumbv7--windows-itanium -filetype obj -o - %s | llvm-objdump -disassemble - | FileCheck %s
|
||||
|
||||
declare i32 @llvm.arm.space(i32, i32)
|
||||
|
||||
define arm_aapcs_vfpcc i32 @f(i32 %n, i32 %d) local_unnamed_addr {
|
||||
entry:
|
||||
%div = sdiv i32 %n, %d
|
||||
call i32 @llvm.arm.space(i32 128, i32 undef)
|
||||
ret i32 %div
|
||||
}
|
||||
|
||||
; CHECK: cmp r1, #0
|
||||
; CHECK: beq #
|
||||
; CHECK: bl
|
||||
|
||||
@ -1,49 +0,0 @@
|
||||
; RUN: llc -mtriple thumbv7-windows-itanium -filetype asm -o - %s | FileCheck %s
|
||||
; RUN: llc -mtriple thumbv7-windows-msvc -filetype asm -o - %s | FileCheck %s
|
||||
|
||||
define arm_aapcs_vfpcc i32 @sdiv32(i32 %divisor, i32 %divident) {
|
||||
entry:
|
||||
%div = sdiv i32 %divident, %divisor
|
||||
ret i32 %div
|
||||
}
|
||||
|
||||
; CHECK-LABEL: sdiv32:
|
||||
; CHECK: cbz r0
|
||||
; CHECK: bl __rt_sdiv
|
||||
; CHECK: __brkdiv0
|
||||
|
||||
define arm_aapcs_vfpcc i32 @udiv32(i32 %divisor, i32 %divident) {
|
||||
entry:
|
||||
%div = udiv i32 %divident, %divisor
|
||||
ret i32 %div
|
||||
}
|
||||
|
||||
; CHECK-LABEL: udiv32:
|
||||
; CHECK: cbz r0
|
||||
; CHECK: bl __rt_udiv
|
||||
; CHECK: __brkdiv0
|
||||
|
||||
define arm_aapcs_vfpcc i64 @sdiv64(i64 %divisor, i64 %divident) {
|
||||
entry:
|
||||
%div = sdiv i64 %divident, %divisor
|
||||
ret i64 %div
|
||||
}
|
||||
|
||||
; CHECK-LABEL: sdiv64:
|
||||
; CHECK: orrs.w r4, r0, r1
|
||||
; CHECK-NEXT: beq
|
||||
; CHECK: bl __rt_sdiv64
|
||||
; CHECK: __brkdiv0
|
||||
|
||||
define arm_aapcs_vfpcc i64 @udiv64(i64 %divisor, i64 %divident) {
|
||||
entry:
|
||||
%div = udiv i64 %divident, %divisor
|
||||
ret i64 %div
|
||||
}
|
||||
|
||||
; CHECK-LABEL: udiv64:
|
||||
; CHECK: orrs.w r4, r0, r1
|
||||
; CHECK-NEXT: beq
|
||||
; CHECK: bl __rt_udiv64
|
||||
; CHECK: __brkdiv0
|
||||
|
||||
@ -1,75 +0,0 @@
|
||||
; RUN: llc -mtriple thumbv7--windows-itanium -filetype asm -o - %s | FileCheck %s -check-prefix CHECK -check-prefix CHECK-GNU
|
||||
; RUN: llc -mtriple thumbv7--windows-gnu -filetype asm -o - %s | FileCheck %s -check-prefix CHECK -check-prefix CHECK-GNU
|
||||
; RUN: llc -mtriple thumbv7--windows-msvc -filetype asm -o - %s | FileCheck %s -check-prefix CHECK -check-prefix CHECK-MSVC
|
||||
|
||||
define void @f() {
|
||||
ret void
|
||||
}
|
||||
|
||||
define dllexport void @g() {
|
||||
ret void
|
||||
}
|
||||
|
||||
define dllexport void @h() unnamed_addr {
|
||||
ret void
|
||||
}
|
||||
|
||||
declare dllexport void @i()
|
||||
|
||||
define linkonce_odr dllexport void @j() {
|
||||
ret void
|
||||
}
|
||||
|
||||
define linkonce_odr dllexport void @k() alwaysinline {
|
||||
ret void
|
||||
}
|
||||
|
||||
define weak_odr dllexport void @l() {
|
||||
ret void
|
||||
}
|
||||
|
||||
@m = dllexport global i32 0, align 4
|
||||
@n = dllexport unnamed_addr constant i32 0
|
||||
@o = common dllexport global i32 0, align 4
|
||||
@p = weak_odr dllexport global i32 0, align 4
|
||||
@q = weak_odr dllexport unnamed_addr constant i32 0
|
||||
|
||||
@r = dllexport alias void (), void () * @f
|
||||
@s = dllexport alias void (), void () * @g
|
||||
@t = dllexport alias void (), void () * @f
|
||||
@u = weak_odr dllexport alias void (), void () * @g
|
||||
|
||||
; CHECK: .section .drectve
|
||||
; CHECK-GNU-NOT: -export:f
|
||||
; CHECK-GNU: -export:g
|
||||
; CHECK-GNU-SAME: -export:h
|
||||
; CHECK-GNU-NOT: -export:i
|
||||
; CHECK-GNU-SAME: -export:j
|
||||
; CHECK-GNU-SAME: -export:k
|
||||
; CHECK-GNU-SAME: -export:l
|
||||
; CHECK-GNU-SAME: -export:m,data
|
||||
; CHECK-GNU-SAME: -export:n,data
|
||||
; CHECK-GNU-SAME: -export:o,data
|
||||
; CHECK-GNU-SAME: -export:p,data
|
||||
; CHECK-GNU-SAME: -export:q,data
|
||||
; CHECK-GNU-SAME: -export:r
|
||||
; CHECK-GNU-SAME: -export:s
|
||||
; CHECK-GNU-SAME: -export:t
|
||||
; CHECK-GNU-SAME: -export:u
|
||||
; CHECK-MSVC-NOT: /EXPORT:f
|
||||
; CHECK-MSVC: /EXPORT:g
|
||||
; CHECK-MSVC-SAME: /EXPORT:h
|
||||
; CHECK-MSVC-NOT: /EXPORT:i
|
||||
; CHECK-MSVC-SAME: /EXPORT:j
|
||||
; CHECK-MSVC-SAME: /EXPORT:k
|
||||
; CHECK-MSVC-SAME: /EXPORT:l
|
||||
; CHECK-MSVC-SAME: /EXPORT:m,DATA
|
||||
; CHECK-MSVC-SAME: /EXPORT:n,DATA
|
||||
; CHECK-MSVC-SAME: /EXPORT:o,DATA
|
||||
; CHECK-MSVC-SAME: /EXPORT:p,DATA
|
||||
; CHECK-MSVC-SAME: /EXPORT:q,DATA
|
||||
; CHECK-MSVC-SAME: /EXPORT:r
|
||||
; CHECK-MSVC-SAME: /EXPORT:s
|
||||
; CHECK-MSVC-SAME: /EXPORT:t
|
||||
; CHECK-MSVC-SAME: /EXPORT:u
|
||||
|
||||
@ -1,61 +0,0 @@
|
||||
; RUN: llc -mtriple thumbv7-windows -filetype asm -o - %s | FileCheck %s
|
||||
|
||||
; ModuleID = 'dllimport.c'
|
||||
|
||||
@var = external dllimport global i32
|
||||
@ext = external global i32
|
||||
declare dllimport arm_aapcs_vfpcc i32 @external()
|
||||
declare arm_aapcs_vfpcc i32 @internal()
|
||||
|
||||
define arm_aapcs_vfpcc i32 @get_var() {
|
||||
%1 = load i32, i32* @var, align 4
|
||||
ret i32 %1
|
||||
}
|
||||
|
||||
; CHECK-LABEL: get_var
|
||||
; CHECK: movw r0, :lower16:__imp_var
|
||||
; CHECK: movt r0, :upper16:__imp_var
|
||||
; CHECK: ldr r0, [r0]
|
||||
; CHECK: ldr r0, [r0]
|
||||
; CHECK: bx lr
|
||||
|
||||
define arm_aapcs_vfpcc i32 @get_ext() {
|
||||
%1 = load i32, i32* @ext, align 4
|
||||
ret i32 %1
|
||||
}
|
||||
|
||||
; CHECK-LABEL: get_ext
|
||||
; CHECK: movw r0, :lower16:ext
|
||||
; CHECK: movt r0, :upper16:ext
|
||||
; CHECK: ldr r0, [r0]
|
||||
; CHECK: bx lr
|
||||
|
||||
define arm_aapcs_vfpcc i32* @get_var_pointer() {
|
||||
ret i32* @var
|
||||
}
|
||||
|
||||
; CHECK-LABEL: get_var_pointer
|
||||
; CHECK: movw r0, :lower16:__imp_var
|
||||
; CHECK: movt r0, :upper16:__imp_var
|
||||
; CHECK: ldr r0, [r0]
|
||||
; CHECK: bx lr
|
||||
|
||||
define arm_aapcs_vfpcc i32 @call_external() {
|
||||
%call = tail call arm_aapcs_vfpcc i32 @external()
|
||||
ret i32 %call
|
||||
}
|
||||
|
||||
; CHECK-LABEL: call_external
|
||||
; CHECK: movw r0, :lower16:__imp_external
|
||||
; CHECK: movt r0, :upper16:__imp_external
|
||||
; CHECK: ldr r0, [r0]
|
||||
; CHECK: bx r0
|
||||
|
||||
define arm_aapcs_vfpcc i32 @call_internal() {
|
||||
%call = tail call arm_aapcs_vfpcc i32 @internal()
|
||||
ret i32 %call
|
||||
}
|
||||
|
||||
; CHECK-LABEL: call_internal
|
||||
; CHECK: b internal
|
||||
|
||||
@ -1,22 +0,0 @@
|
||||
; RUN: llc -mtriple thumbv7-windows -disable-fp-elim -filetype asm -o - %s \
|
||||
; RUN: | FileCheck %s
|
||||
|
||||
declare void @callee(i32)
|
||||
|
||||
define i32 @calleer(i32 %i) {
|
||||
entry:
|
||||
%i.addr = alloca i32, align 4
|
||||
%j = alloca i32, align 4
|
||||
store i32 %i, i32* %i.addr, align 4
|
||||
%0 = load i32, i32* %i.addr, align 4
|
||||
%add = add nsw i32 %0, 1
|
||||
store i32 %add, i32* %j, align 4
|
||||
%1 = load i32, i32* %j, align 4
|
||||
call void @callee(i32 %1)
|
||||
%2 = load i32, i32* %j, align 4
|
||||
%add1 = add nsw i32 %2, 1
|
||||
ret i32 %add1
|
||||
}
|
||||
|
||||
; CHECK: push.w {r11, lr}
|
||||
|
||||
@ -1,16 +0,0 @@
|
||||
; RUN: llc -mtriple=thumbv7-windows -filetype asm -o - %s | FileCheck %s
|
||||
|
||||
@i = internal global i32 0, align 4
|
||||
|
||||
; Function Attrs: minsize
|
||||
define arm_aapcs_vfpcc i32* @function() #0 {
|
||||
entry:
|
||||
ret i32* @i
|
||||
}
|
||||
|
||||
attributes #0 = { minsize }
|
||||
|
||||
; CHECK: function:
|
||||
; CHECK: movw r0, :lower16:i
|
||||
; CHECK: movt r0, :upper16:i
|
||||
; CHECK: bx lr
|
||||
@ -1,16 +0,0 @@
|
||||
; RUN: llc -mtriple=thumbv7-windows-itanium -mcpu=cortex-a9 -o - %s \
|
||||
; RUN: | FileCheck %s -check-prefix CHECK-WIN
|
||||
|
||||
; RUN: llc -mtriple=thumbv7-windows-gnu -mcpu=cortex-a9 -o - %s \
|
||||
; RUN: | FileCheck %s -check-prefix CHECK-GNU
|
||||
|
||||
define float @function(float %f, float %g) nounwind {
|
||||
entry:
|
||||
%h = fadd float %f, %g
|
||||
ret float %h
|
||||
}
|
||||
|
||||
; CHECK-WIN: vadd.f32 s0, s0, s1
|
||||
|
||||
; CHECK-GNU: vadd.f32 s0, s0, s1
|
||||
|
||||
@ -1,24 +0,0 @@
|
||||
; RUN: llc -mtriple thumbv7--windows-itanium -filetype asm -o - %s | FileCheck %s
|
||||
|
||||
declare void @llvm.trap()
|
||||
declare arm_aapcs_vfpcc zeroext i1 @g()
|
||||
|
||||
define arm_aapcs_vfpcc i8* @f() {
|
||||
entry:
|
||||
%call = tail call arm_aapcs_vfpcc zeroext i1 @g()
|
||||
br i1 %call, label %if.then, label %if.end
|
||||
|
||||
if.then:
|
||||
ret i8* bitcast (i1 ()* @g to i8*)
|
||||
|
||||
if.end:
|
||||
tail call void @llvm.trap()
|
||||
unreachable
|
||||
}
|
||||
|
||||
; CHECK: push.w {r11, lr}
|
||||
; CHECK: bl g
|
||||
; CHECK: movw [[REG:r[0-9]+]], :lower16:g
|
||||
; CHECK: movt [[REG]], :upper16:g
|
||||
; CHECK: pop.w {r11, pc}
|
||||
|
||||
@ -1,75 +0,0 @@
|
||||
; RUN: llc -mtriple thumbv7-windows-itanium -filetype asm -o - %s | FileCheck %s
|
||||
; RUN: llc -mtriple thumbv7-windows-msvc -filetype asm -o - %s | FileCheck %s
|
||||
|
||||
define arm_aapcs_vfpcc i64 @stoi64(float %f) {
|
||||
entry:
|
||||
%conv = fptosi float %f to i64
|
||||
ret i64 %conv
|
||||
}
|
||||
|
||||
; CHECK-LABEL: stoi64
|
||||
; CHECK: bl __stoi64
|
||||
|
||||
define arm_aapcs_vfpcc i64 @stou64(float %f) {
|
||||
entry:
|
||||
%conv = fptoui float %f to i64
|
||||
ret i64 %conv
|
||||
}
|
||||
|
||||
; CHECK-LABEL: stou64
|
||||
; CHECK: bl __stou64
|
||||
|
||||
define arm_aapcs_vfpcc float @i64tos(i64 %i64) {
|
||||
entry:
|
||||
%conv = sitofp i64 %i64 to float
|
||||
ret float %conv
|
||||
}
|
||||
|
||||
; CHECK-LABEL: i64tos
|
||||
; CHECK: bl __i64tos
|
||||
|
||||
define arm_aapcs_vfpcc float @u64tos(i64 %u64) {
|
||||
entry:
|
||||
%conv = uitofp i64 %u64 to float
|
||||
ret float %conv
|
||||
}
|
||||
|
||||
; CHECK-LABEL: u64tos
|
||||
; CHECK: bl __u64tos
|
||||
|
||||
define arm_aapcs_vfpcc i64 @dtoi64(double %d) {
|
||||
entry:
|
||||
%conv = fptosi double %d to i64
|
||||
ret i64 %conv
|
||||
}
|
||||
|
||||
; CHECK-LABEL: dtoi64
|
||||
; CHECK: bl __dtoi64
|
||||
|
||||
define arm_aapcs_vfpcc i64 @dtou64(double %d) {
|
||||
entry:
|
||||
%conv = fptoui double %d to i64
|
||||
ret i64 %conv
|
||||
}
|
||||
|
||||
; CHECK-LABEL: dtou64
|
||||
; CHECK: bl __dtou64
|
||||
|
||||
define arm_aapcs_vfpcc double @i64tod(i64 %i64) {
|
||||
entry:
|
||||
%conv = sitofp i64 %i64 to double
|
||||
ret double %conv
|
||||
}
|
||||
|
||||
; CHECK-LABEL: i64tod
|
||||
; CHECK: bl __i64tod
|
||||
|
||||
define arm_aapcs_vfpcc double @u64tod(i64 %i64) {
|
||||
entry:
|
||||
%conv = uitofp i64 %i64 to double
|
||||
ret double %conv
|
||||
}
|
||||
|
||||
; CHECK-LABEL: u64tod
|
||||
; CHECK: bl __u64tod
|
||||
|
||||
@ -1,18 +0,0 @@
|
||||
; RUN: llc -mtriple=thumbv7-windows -mcpu=cortex-a9 -relocation-model pic -mattr=+long-calls -o - %s \
|
||||
; RUN: | FileCheck %s
|
||||
|
||||
declare arm_aapcs_vfpcc void @callee()
|
||||
|
||||
define arm_aapcs_vfpcc void @caller() nounwind {
|
||||
entry:
|
||||
tail call void @callee()
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECK-LABEL: caller
|
||||
; CHECK: ldr [[REG:r[0-9]+]], [[CPI:\.LCPI[_0-9]+]]
|
||||
; CHECK: bx [[REG]]
|
||||
; CHECK: .p2align 2
|
||||
; CHECK: [[CPI]]:
|
||||
; CHECK: .long callee
|
||||
|
||||
@ -1,9 +0,0 @@
|
||||
; RUN: llc -mtriple=thumbv7-windows -mcpu=cortex-a9 -o - %s | FileCheck %s
|
||||
|
||||
define void @function() nounwind {
|
||||
entry:
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECK-LABEL: function
|
||||
|
||||
18
external/llvm/test/CodeGen/ARM/Windows/memset.ll
vendored
18
external/llvm/test/CodeGen/ARM/Windows/memset.ll
vendored
@ -1,18 +0,0 @@
|
||||
; RUN: llc -mtriple thumbv7--windows-itanium -filetype asm -o - %s | FileCheck %s
|
||||
|
||||
@source = common global [512 x i8] zeroinitializer, align 4
|
||||
|
||||
declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind
|
||||
|
||||
define void @function() {
|
||||
entry:
|
||||
call void @llvm.memset.p0i8.i32(i8* bitcast ([512 x i8]* @source to i8*), i8 0, i32 512, i32 0, i1 false)
|
||||
unreachable
|
||||
}
|
||||
|
||||
; CHECK: movw r0, :lower16:source
|
||||
; CHECK: movt r0, :upper16:source
|
||||
; CHECK: movs r1, #0
|
||||
; CHECK: mov.w r2, #512
|
||||
; CHECK: memset
|
||||
|
||||
@ -1,28 +0,0 @@
|
||||
; RUN: llc -mtriple thumbv7-windows-itanium -filetype asm -o - %s | FileCheck %s
|
||||
|
||||
@_begin = external global i8
|
||||
@_end = external global i8
|
||||
|
||||
declare arm_aapcs_vfpcc void @force_emission()
|
||||
|
||||
define arm_aapcs_vfpcc void @bundle() {
|
||||
entry:
|
||||
br i1 icmp uge (i32 sub (i32 ptrtoint (i8* @_end to i32), i32 ptrtoint (i8* @_begin to i32)), i32 4), label %if.then, label %if.end
|
||||
|
||||
if.then:
|
||||
tail call arm_aapcs_vfpcc void @force_emission()
|
||||
br label %if.end
|
||||
|
||||
if.end:
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECK-LABEL: bundle
|
||||
; CHECK-NOT: subs r0, r1, r0
|
||||
; CHECK: movw r0, :lower16:_begin
|
||||
; CHECK-NEXT: movt r0, :upper16:_begin
|
||||
; CHECK-NEXT: movw r1, :lower16:_end
|
||||
; CHECK-NEXT: movt r1, :upper16:_end
|
||||
; CHECK-NEXT: subs r0, r1, r0
|
||||
; CHECK-NEXT: cmp r0, #4
|
||||
|
||||
@ -1,27 +0,0 @@
|
||||
; RUN: llc -mtriple=thumbv7-windows -o - %s \
|
||||
; RUN: | FileCheck %s -check-prefix CHECK-WINDOWS
|
||||
|
||||
; RUN: llc -mtriple=thumbv7-eabi -o - %s \
|
||||
; RUN: | FileCheck %s -check-prefix CHECK-EABI
|
||||
|
||||
@i = common global i32 0, align 4
|
||||
@j = common global i32 0, align 4
|
||||
|
||||
; Function Attrs: nounwind optsize readonly
|
||||
define i32 @relocation(i32 %j, i32 %k) {
|
||||
entry:
|
||||
%0 = load i32, i32* @i, align 4
|
||||
%1 = load i32, i32* @j, align 4
|
||||
%add = add nsw i32 %1, %0
|
||||
ret i32 %add
|
||||
}
|
||||
|
||||
; CHECK-WINDOWS: movw r[[i:[0-4]]], :lower16:i
|
||||
; CHECK-WINDOWS-NEXT: movt r[[i]], :upper16:i
|
||||
; CHECK-WINDOWS: movw r[[j:[0-4]]], :lower16:j
|
||||
; CHECK-WINDOWS-NEXT: movt r[[j]], :upper16:j
|
||||
|
||||
; CHECK-EABI: movw r[[i:[0-4]]], :lower16:i
|
||||
; CHECK-EABI: movw r[[j:[0-4]]], :lower16:j
|
||||
; CHECK-EABI-NEXT: movt r[[i]], :upper16:i
|
||||
; CHECK-EABI-NEXT: movt r[[j]], :upper16:j
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user