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Imported Upstream version 5.18.0.167
Former-commit-id: 289509151e0fee68a1b591a20c9f109c3c789d3a
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@ -1,53 +0,0 @@
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; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=neon | FileCheck %s
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define void @test_store_f128(fp128* %ptr, fp128 %val) #0 {
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; CHECK-LABEL: test_store_f128
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; CHECK: str {{q[0-9]+}}, [{{x[0-9]+}}]
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entry:
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store fp128 %val, fp128* %ptr, align 16
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ret void
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}
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define fp128 @test_load_f128(fp128* readonly %ptr) #2 {
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; CHECK-LABEL: test_load_f128
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; CHECK: ldr {{q[0-9]+}}, [{{x[0-9]+}}]
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entry:
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%0 = load fp128, fp128* %ptr, align 16
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ret fp128 %0
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}
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define void @test_vstrq_p128(i128* %ptr, i128 %val) #0 {
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; CHECK-LABEL: test_vstrq_p128
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; CHECK: stp {{x[0-9]+}}, {{x[0-9]+}}, [{{x[0-9]+}}]
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entry:
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%0 = bitcast i128* %ptr to fp128*
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%1 = bitcast i128 %val to fp128
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store fp128 %1, fp128* %0, align 16
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ret void
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}
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define i128 @test_vldrq_p128(i128* readonly %ptr) #2 {
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; CHECK-LABEL: test_vldrq_p128
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; CHECK: ldp {{x[0-9]+}}, {{x[0-9]+}}, [{{x[0-9]+}}]
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entry:
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%0 = bitcast i128* %ptr to fp128*
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%1 = load fp128, fp128* %0, align 16
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%2 = bitcast fp128 %1 to i128
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ret i128 %2
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}
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define void @test_ld_st_p128(i128* nocapture %ptr) #0 {
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; CHECK-LABEL: test_ld_st_p128
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; CHECK: ldr {{q[0-9]+}}, [{{x[0-9]+}}]
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; CHECK-NEXT: str {{q[0-9]+}}, [{{x[0-9]+}}, #16]
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entry:
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%0 = bitcast i128* %ptr to fp128*
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%1 = load fp128, fp128* %0, align 16
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%add.ptr = getelementptr inbounds i128, i128* %ptr, i64 1
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%2 = bitcast i128* %add.ptr to fp128*
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store fp128 %1, fp128* %2, align 16
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ret void
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}
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@ -1,28 +0,0 @@
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; RUN: llc -O0 -stop-after=irtranslator -global-isel -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64-apple-ios9.0"
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; CHECK-LABEL: name: test_varargs
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; CHECK: [[ANSWER:%[0-9]+]]:_(s32) = G_CONSTANT i32 42
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; CHECK: [[D_ONE:%[0-9]+]]:_(s64) = G_FCONSTANT double 1.000000e+00
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; CHECK: [[TWELVE:%[0-9]+]]:_(s64) = G_CONSTANT i64 12
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; CHECK: [[THREE:%[0-9]+]]:_(s8) = G_CONSTANT i8 3
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; CHECK: [[ONE:%[0-9]+]]:_(s16) = G_CONSTANT i16 1
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; CHECK: [[FOUR:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
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; CHECK: [[F_ONE:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.000000e+00
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; CHECK: [[TWO:%[0-9]+]]:_(s64) = G_FCONSTANT double 2.000000e+00
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; CHECK: %w0 = COPY [[ANSWER]]
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; CHECK: %d0 = COPY [[D_ONE]]
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; CHECK: %x1 = COPY [[TWELVE]]
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; CHECK: G_STORE [[THREE]](s8), {{%[0-9]+}}(p0) :: (store 1 into stack, align 0)
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; CHECK: G_STORE [[ONE]](s16), {{%[0-9]+}}(p0) :: (store 2 into stack + 8, align 0)
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; CHECK: G_STORE [[FOUR]](s32), {{%[0-9]+}}(p0) :: (store 4 into stack + 16, align 0)
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; CHECK: G_STORE [[F_ONE]](s32), {{%[0-9]+}}(p0) :: (store 4 into stack + 24, align 0)
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; CHECK: G_STORE [[TWO]](s64), {{%[0-9]+}}(p0) :: (store 8 into stack + 32, align 0)
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declare void @varargs(i32, double, i64, ...)
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define void @test_varargs() {
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call void(i32, double, i64, ...) @varargs(i32 42, double 1.0, i64 12, i8 3, i16 1, i32 4, float 1.0, double 2.0)
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ret void
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}
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@ -1,98 +0,0 @@
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; RUN: llc -O0 -stop-after=irtranslator -global-isel -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64-linux-gnu"
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; CHECK-LABEL: name: args_i32
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; CHECK: %[[ARG0:[0-9]+]]:_(s32) = COPY %w0
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; CHECK: %{{[0-9]+}}:_(s32) = COPY %w1
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; CHECK: %{{[0-9]+}}:_(s32) = COPY %w2
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; CHECK: %{{[0-9]+}}:_(s32) = COPY %w3
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; CHECK: %{{[0-9]+}}:_(s32) = COPY %w4
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; CHECK: %{{[0-9]+}}:_(s32) = COPY %w5
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; CHECK: %{{[0-9]+}}:_(s32) = COPY %w6
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; CHECK: %{{[0-9]+}}:_(s32) = COPY %w7
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; CHECK: %w0 = COPY %[[ARG0]]
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define i32 @args_i32(i32 %w0, i32 %w1, i32 %w2, i32 %w3,
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i32 %w4, i32 %w5, i32 %w6, i32 %w7) {
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ret i32 %w0
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}
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; CHECK-LABEL: name: args_i64
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; CHECK: %[[ARG0:[0-9]+]]:_(s64) = COPY %x0
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; CHECK: %{{[0-9]+}}:_(s64) = COPY %x1
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; CHECK: %{{[0-9]+}}:_(s64) = COPY %x2
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; CHECK: %{{[0-9]+}}:_(s64) = COPY %x3
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; CHECK: %{{[0-9]+}}:_(s64) = COPY %x4
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; CHECK: %{{[0-9]+}}:_(s64) = COPY %x5
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; CHECK: %{{[0-9]+}}:_(s64) = COPY %x6
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; CHECK: %{{[0-9]+}}:_(s64) = COPY %x7
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; CHECK: %x0 = COPY %[[ARG0]]
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define i64 @args_i64(i64 %x0, i64 %x1, i64 %x2, i64 %x3,
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i64 %x4, i64 %x5, i64 %x6, i64 %x7) {
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ret i64 %x0
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}
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; CHECK-LABEL: name: args_ptrs
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; CHECK: %[[ARG0:[0-9]+]]:_(p0) = COPY %x0
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; CHECK: %{{[0-9]+}}:_(p0) = COPY %x1
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; CHECK: %{{[0-9]+}}:_(p0) = COPY %x2
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; CHECK: %{{[0-9]+}}:_(p0) = COPY %x3
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; CHECK: %{{[0-9]+}}:_(p0) = COPY %x4
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; CHECK: %{{[0-9]+}}:_(p0) = COPY %x5
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; CHECK: %{{[0-9]+}}:_(p0) = COPY %x6
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; CHECK: %{{[0-9]+}}:_(p0) = COPY %x7
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; CHECK: %x0 = COPY %[[ARG0]]
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define i8* @args_ptrs(i8* %x0, i16* %x1, <2 x i8>* %x2, {i8, i16, i32}* %x3,
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[3 x float]* %x4, double* %x5, i8* %x6, i8* %x7) {
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ret i8* %x0
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}
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; CHECK-LABEL: name: args_arr
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; CHECK: %[[ARG0:[0-9]+]]:_(s64) = COPY %d0
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; CHECK: %d0 = COPY %[[ARG0]]
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define [1 x double] @args_arr([1 x double] %d0) {
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ret [1 x double] %d0
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}
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; CHECK-LABEL: name: test_varargs
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; CHECK: [[ANSWER:%[0-9]+]]:_(s32) = G_CONSTANT i32 42
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; CHECK: [[D_ONE:%[0-9]+]]:_(s64) = G_FCONSTANT double 1.000000e+00
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; CHECK: [[TWELVE:%[0-9]+]]:_(s64) = G_CONSTANT i64 12
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; CHECK: [[THREE:%[0-9]+]]:_(s8) = G_CONSTANT i8 3
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; CHECK: [[ONE:%[0-9]+]]:_(s16) = G_CONSTANT i16 1
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; CHECK: [[FOUR:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
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; CHECK: [[F_ONE:%[0-9]+]]:_(s32) = G_FCONSTANT float 1.000000e+00
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; CHECK: [[TWO:%[0-9]+]]:_(s64) = G_FCONSTANT double 2.000000e+00
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; CHECK: %w0 = COPY [[ANSWER]]
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; CHECK: %d0 = COPY [[D_ONE]]
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; CHECK: %x1 = COPY [[TWELVE]]
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; CHECK: [[THREE_TMP:%[0-9]+]]:_(s32) = G_ANYEXT [[THREE]]
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; CHECK: %w2 = COPY [[THREE_TMP]](s32)
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; CHECK: [[ONE_TMP:%[0-9]+]]:_(s32) = G_ANYEXT [[ONE]]
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; CHECK: %w3 = COPY [[ONE_TMP]](s32)
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; CHECK: %w4 = COPY [[FOUR]](s32)
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; CHECK: %s1 = COPY [[F_ONE]](s32)
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; CHECK: %d2 = COPY [[TWO]](s64)
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declare void @varargs(i32, double, i64, ...)
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define void @test_varargs() {
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call void(i32, double, i64, ...) @varargs(i32 42, double 1.0, i64 12, i8 3, i16 1, i32 4, float 1.0, double 2.0)
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ret void
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}
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; signext/zeroext parameters on the stack: not part of any real ABI as far as I
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; know, but ELF currently allocates 8 bytes for a signext parameter on the
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; stack. The ADJCALLSTACK ops should reflect this, even if the difference is
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; theoretical.
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declare void @stack_ext_needed([8 x i64], i8 signext %in)
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; CHECK-LABEL: name: test_stack_ext_needed
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; CHECK: ADJCALLSTACKDOWN 8
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; CHECK: BL @stack_ext_needed
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; CHECK: ADJCALLSTACKUP 8
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define void @test_stack_ext_needed() {
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call void @stack_ext_needed([8 x i64] undef, i8 signext 42)
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ret void
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}
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@ -1,248 +0,0 @@
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; RUN: not llc -O0 -global-isel -global-isel-abort=1 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefix=ERROR
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; RUN: llc -O0 -global-isel -global-isel-abort=0 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s --check-prefix=FALLBACK
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; RUN: llc -O0 -global-isel -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o %t.out 2> %t.err
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; RUN: FileCheck %s --check-prefix=FALLBACK-WITH-REPORT-OUT < %t.out
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; RUN: FileCheck %s --check-prefix=FALLBACK-WITH-REPORT-ERR < %t.err
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; RUN: not llc -global-isel -mtriple aarch64_be %s -o - 2>&1 | FileCheck %s --check-prefix=BIG-ENDIAN
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; This file checks that the fallback path to selection dag works.
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; The test is fragile in the sense that it must be updated to expose
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; something that fails with global-isel.
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; When we cannot produce a test case anymore, that means we can remove
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; the fallback path.
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64--"
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; BIG-ENDIAN: unable to translate in big endian mode
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; We use __fixunstfti as the common denominator for __fixunstfti on Linux and
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; ___fixunstfti on iOS
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; ERROR: unable to lower arguments: i128 (i128)* (in function: ABIi128)
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; FALLBACK: ldr q0,
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; FALLBACK-NEXT: bl __fixunstfti
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;
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; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to lower arguments: i128 (i128)* (in function: ABIi128)
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; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for ABIi128
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; FALLBACK-WITH-REPORT-OUT-LABEL: ABIi128:
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; FALLBACK-WITH-REPORT-OUT: ldr q0,
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; FALLBACK-WITH-REPORT-OUT-NEXT: bl __fixunstfti
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define i128 @ABIi128(i128 %arg1) {
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%farg1 = bitcast i128 %arg1 to fp128
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%res = fptoui fp128 %farg1 to i128
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ret i128 %res
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}
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; It happens that we don't handle ConstantArray instances yet during
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; translation. Any other constant would be fine too.
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; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to translate constant: [1 x double] (in function: constant)
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; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for constant
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; FALLBACK-WITH-REPORT-OUT-LABEL: constant:
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; FALLBACK-WITH-REPORT-OUT: fmov d0, #1.0
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define [1 x double] @constant() {
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ret [1 x double] [double 1.0]
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}
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; The key problem here is that we may fail to create an MBB referenced by a
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; PHI. If so, we cannot complete the G_PHI and mustn't try or bad things
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; happen.
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; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: cannot select: G_STORE %6(s32), %2(p0); mem:ST4[%addr] GPR:%6,%2 (in function: pending_phis)
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; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for pending_phis
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; FALLBACK-WITH-REPORT-OUT-LABEL: pending_phis:
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define i32 @pending_phis(i1 %tst, i32 %val, i32* %addr) {
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br i1 %tst, label %true, label %false
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end:
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%res = phi i32 [%val, %true], [42, %false]
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ret i32 %res
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true:
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store atomic i32 42, i32* %addr seq_cst, align 4
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br label %end
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false:
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br label %end
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}
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; General legalizer inability to handle types whose size wasn't a power of 2.
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; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: G_STORE %1(s42), %0(p0); mem:ST6[%addr](align=8) (in function: odd_type)
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; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for odd_type
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; FALLBACK-WITH-REPORT-OUT-LABEL: odd_type:
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define void @odd_type(i42* %addr) {
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%val42 = load i42, i42* %addr
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store i42 %val42, i42* %addr
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ret void
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}
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; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: G_STORE %1(<7 x s32>), %0(p0); mem:ST28[%addr](align=32) (in function: odd_vector)
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; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for odd_vector
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; FALLBACK-WITH-REPORT-OUT-LABEL: odd_vector:
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define void @odd_vector(<7 x i32>* %addr) {
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%vec = load <7 x i32>, <7 x i32>* %addr
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store <7 x i32> %vec, <7 x i32>* %addr
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ret void
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}
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; AArch64 was asserting instead of returning an invalid mapping for unknown
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; sizes.
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; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to translate instruction: ret: ' ret i128 undef' (in function: sequence_sizes)
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; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for sequence_sizes
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; FALLBACK-WITH-REPORT-LABEL: sequence_sizes:
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define i128 @sequence_sizes([8 x i8] %in) {
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ret i128 undef
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}
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; Just to make sure we don't accidentally emit a normal load/store.
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; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: cannot select: %2:gpr(s64) = G_LOAD %0(p0); mem:LD8[%addr] GPR:%2,%0 (in function: atomic_ops)
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; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for atomic_ops
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; FALLBACK-WITH-REPORT-LABEL: atomic_ops:
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define i64 @atomic_ops(i64* %addr) {
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store atomic i64 0, i64* %addr unordered, align 8
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%res = load atomic i64, i64* %addr seq_cst, align 8
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ret i64 %res
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}
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; Make sure we don't mess up metadata arguments.
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declare void @llvm.write_register.i64(metadata, i64)
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; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to translate instruction: call: ' call void @llvm.write_register.i64(metadata !0, i64 0)' (in function: test_write_register_intrin)
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; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for test_write_register_intrin
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; FALLBACK-WITH-REPORT-LABEL: test_write_register_intrin:
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define void @test_write_register_intrin() {
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call void @llvm.write_register.i64(metadata !{!"sp"}, i64 0)
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ret void
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}
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@_ZTIi = external global i8*
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declare i32 @__gxx_personality_v0(...)
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; Check that we fallback on invoke translation failures.
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; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to translate instruction: invoke: ' invoke void %callee(i128 0)
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; FALLBACK-WITH-REPORT-NEXT: to label %continue unwind label %broken' (in function: invoke_weird_type)
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; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for invoke_weird_type
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; FALLBACK-WITH-REPORT-OUT-LABEL: invoke_weird_type:
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define void @invoke_weird_type(void(i128)* %callee) personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
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invoke void %callee(i128 0)
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to label %continue unwind label %broken
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broken:
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landingpad { i8*, i32 } catch i8* bitcast(i8** @_ZTIi to i8*)
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ret void
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continue:
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ret void
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}
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; Check that we fallback on invoke translation failures.
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; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: %0:_(s128) = G_FCONSTANT fp128 0xL00000000000000004000000000000000
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; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for test_quad_dump
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; FALLBACK-WITH-REPORT-OUT-LABEL: test_quad_dump:
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define fp128 @test_quad_dump() {
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ret fp128 0xL00000000000000004000000000000000
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}
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; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: %0:_(p0) = G_EXTRACT_VECTOR_ELT %1(<2 x p0>), %2(s32); (in function: vector_of_pointers_extractelement)
|
||||
; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for vector_of_pointers_extractelement
|
||||
; FALLBACK-WITH-REPORT-OUT-LABEL: vector_of_pointers_extractelement:
|
||||
@var = global <2 x i16*> zeroinitializer
|
||||
define void @vector_of_pointers_extractelement() {
|
||||
br label %end
|
||||
|
||||
block:
|
||||
%dummy = extractelement <2 x i16*> %vec, i32 0
|
||||
store i16* %dummy, i16** undef
|
||||
ret void
|
||||
|
||||
end:
|
||||
%vec = load <2 x i16*>, <2 x i16*>* undef
|
||||
br label %block
|
||||
}
|
||||
|
||||
; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: G_STORE %0(<2 x p0>), %4(p0); mem:ST16[undef] (in function: vector_of_pointers_insertelement)
|
||||
; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for vector_of_pointers_insertelement
|
||||
; FALLBACK-WITH-REPORT-OUT-LABEL: vector_of_pointers_insertelement:
|
||||
define void @vector_of_pointers_insertelement() {
|
||||
br label %end
|
||||
|
||||
block:
|
||||
%dummy = insertelement <2 x i16*> %vec, i16* null, i32 0
|
||||
store <2 x i16*> %dummy, <2 x i16*>* undef
|
||||
ret void
|
||||
|
||||
end:
|
||||
%vec = load <2 x i16*>, <2 x i16*>* undef
|
||||
br label %block
|
||||
}
|
||||
|
||||
; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: G_STORE %1(s96), %3(p0); mem:ST12[undef](align=4) (in function: nonpow2_insertvalue_narrowing)
|
||||
; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for nonpow2_insertvalue_narrowing
|
||||
; FALLBACK-WITH-REPORT-OUT-LABEL: nonpow2_insertvalue_narrowing:
|
||||
%struct96 = type { float, float, float }
|
||||
define void @nonpow2_insertvalue_narrowing(float %a) {
|
||||
%dummy = insertvalue %struct96 undef, float %a, 0
|
||||
store %struct96 %dummy, %struct96* undef
|
||||
ret void
|
||||
}
|
||||
|
||||
; FALLBACK-WITH-REPORT-ERR remark: <unknown>:0:0: unable to legalize instruction: G_STORE %3, %4; mem:ST12[undef](align=16) (in function: nonpow2_add_narrowing)
|
||||
; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for nonpow2_add_narrowing
|
||||
; FALLBACK-WITH-REPORT-OUT-LABEL: nonpow2_add_narrowing:
|
||||
define void @nonpow2_add_narrowing() {
|
||||
%a = add i128 undef, undef
|
||||
%b = trunc i128 %a to i96
|
||||
%dummy = add i96 %b, %b
|
||||
store i96 %dummy, i96* undef
|
||||
ret void
|
||||
}
|
||||
|
||||
; FALLBACK-WITH-REPORT-ERR remark: <unknown>:0:0: unable to legalize instruction: G_STORE %3, %4; mem:ST12[undef](align=16) (in function: nonpow2_add_narrowing)
|
||||
; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for nonpow2_or_narrowing
|
||||
; FALLBACK-WITH-REPORT-OUT-LABEL: nonpow2_or_narrowing:
|
||||
define void @nonpow2_or_narrowing() {
|
||||
%a = add i128 undef, undef
|
||||
%b = trunc i128 %a to i96
|
||||
%dummy = or i96 %b, %b
|
||||
store i96 %dummy, i96* undef
|
||||
ret void
|
||||
}
|
||||
|
||||
; FALLBACK-WITH-REPORT-ERR remark: <unknown>:0:0: unable to legalize instruction: G_STORE %0, %1; mem:ST12[undef](align=16) (in function: nonpow2_load_narrowing)
|
||||
; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for nonpow2_load_narrowing
|
||||
; FALLBACK-WITH-REPORT-OUT-LABEL: nonpow2_load_narrowing:
|
||||
define void @nonpow2_load_narrowing() {
|
||||
%dummy = load i96, i96* undef
|
||||
store i96 %dummy, i96* undef
|
||||
ret void
|
||||
}
|
||||
|
||||
; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: G_STORE %3(s96), %0(p0); mem:ST12[%c](align=16) (in function: nonpow2_store_narrowing
|
||||
; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for nonpow2_store_narrowing
|
||||
; FALLBACK-WITH-REPORT-OUT-LABEL: nonpow2_store_narrowing:
|
||||
define void @nonpow2_store_narrowing(i96* %c) {
|
||||
%a = add i128 undef, undef
|
||||
%b = trunc i128 %a to i96
|
||||
store i96 %b, i96* %c
|
||||
ret void
|
||||
}
|
||||
|
||||
; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: G_STORE %0(s96), %1(p0); mem:ST12[undef](align=16) (in function: nonpow2_constant_narrowing)
|
||||
; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for nonpow2_constant_narrowing
|
||||
; FALLBACK-WITH-REPORT-OUT-LABEL: nonpow2_constant_narrowing:
|
||||
define void @nonpow2_constant_narrowing() {
|
||||
store i96 0, i96* undef
|
||||
ret void
|
||||
}
|
||||
|
||||
; Currently can't handle vector lengths that aren't an exact multiple of
|
||||
; natively supported vector lengths. Test that the fall-back works for those.
|
||||
; FALLBACK-WITH-REPORT-ERR-G_IMPLICIT_DEF-LEGALIZABLE: (FIXME: this is what is expected once we can legalize non-pow-of-2 G_IMPLICIT_DEF) remark: <unknown>:0:0: unable to legalize instruction: %1(<7 x s64>) = G_ADD %0, %0; (in function: nonpow2_vector_add_fewerelements
|
||||
; FALLBACK-WITH-REPORT-ERR: remark: <unknown>:0:0: unable to legalize instruction: %2:_(s64) = G_EXTRACT_VECTOR_ELT %1(<7 x s64>), %3(s64); (in function: nonpow2_vector_add_fewerelements)
|
||||
; FALLBACK-WITH-REPORT-ERR: warning: Instruction selection used fallback path for nonpow2_vector_add_fewerelements
|
||||
; FALLBACK-WITH-REPORT-OUT-LABEL: nonpow2_vector_add_fewerelements:
|
||||
define void @nonpow2_vector_add_fewerelements() {
|
||||
%dummy = add <7 x i64> undef, undef
|
||||
%ex = extractelement <7 x i64> %dummy, i64 0
|
||||
store i64 %ex, i64* undef
|
||||
ret void
|
||||
}
|
||||
@ -1,20 +0,0 @@
|
||||
; RUN: llc -verify-machineinstrs -mtriple=aarch64-apple-ios %s -stop-after=irtranslator -o - -global-isel | FileCheck %s
|
||||
|
||||
|
||||
; CHECK: name: test_stack_guard
|
||||
|
||||
; CHECK: stack:
|
||||
; CHECK: - { id: 0, name: StackGuardSlot, type: default, offset: 0, size: 8, alignment: 8,
|
||||
; CHECK-NOT: id: 1
|
||||
|
||||
; CHECK: [[GUARD_SLOT:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0.StackGuardSlot
|
||||
; CHECK: [[GUARD:%[0-9]+]]:gpr64sp(p0) = LOAD_STACK_GUARD :: (dereferenceable invariant load 8 from @__stack_chk_guard)
|
||||
; CHECK: G_STORE [[GUARD]](p0), [[GUARD_SLOT]](p0) :: (volatile store 8 into %stack.0.StackGuardSlot)
|
||||
declare void @llvm.stackprotector(i8*, i8**)
|
||||
define void @test_stack_guard_remat2() {
|
||||
%StackGuardSlot = alloca i8*
|
||||
call void @llvm.stackprotector(i8* undef, i8** %StackGuardSlot)
|
||||
ret void
|
||||
}
|
||||
|
||||
@__stack_chk_guard = external global i64*
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,94 +0,0 @@
|
||||
; RUN: llc -mtriple=aarch64-apple-ios -O0 -stop-after=irtranslator -global-isel -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
|
||||
|
||||
|
||||
; CHECK-LABEL: name: test_stack_slots
|
||||
; CHECK: fixedStack:
|
||||
; CHECK-DAG: - { id: [[STACK0:[0-9]+]], type: default, offset: 0, size: 1,
|
||||
; CHECK-DAG: - { id: [[STACK8:[0-9]+]], type: default, offset: 1, size: 1,
|
||||
; CHECK: [[LHS_ADDR:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.[[STACK0]]
|
||||
; CHECK: [[LHS:%[0-9]+]]:_(s8) = G_LOAD [[LHS_ADDR]](p0) :: (invariant load 1 from %fixed-stack.[[STACK0]], align 0)
|
||||
; CHECK: [[RHS_ADDR:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.[[STACK8]]
|
||||
; CHECK: [[RHS:%[0-9]+]]:_(s8) = G_LOAD [[RHS_ADDR]](p0) :: (invariant load 1 from %fixed-stack.[[STACK8]], align 0)
|
||||
; CHECK: [[SUM:%[0-9]+]]:_(s8) = G_ADD [[LHS]], [[RHS]]
|
||||
; CHECK: [[SUM32:%[0-9]+]]:_(s32) = G_SEXT [[SUM]](s8)
|
||||
; CHECK: %w0 = COPY [[SUM32]](s32)
|
||||
define signext i8 @test_stack_slots([8 x i64], i8 signext %lhs, i8 signext %rhs) {
|
||||
%sum = add i8 %lhs, %rhs
|
||||
ret i8 %sum
|
||||
}
|
||||
|
||||
; CHECK-LABEL: name: test_call_stack
|
||||
; CHECK: [[C42:%[0-9]+]]:_(s8) = G_CONSTANT i8 42
|
||||
; CHECK: [[C12:%[0-9]+]]:_(s8) = G_CONSTANT i8 12
|
||||
; CHECK: [[SP:%[0-9]+]]:_(p0) = COPY %sp
|
||||
; CHECK: [[C42_OFFS:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
|
||||
; CHECK: [[C42_LOC:%[0-9]+]]:_(p0) = G_GEP [[SP]], [[C42_OFFS]](s64)
|
||||
; CHECK: G_STORE [[C42]](s8), [[C42_LOC]](p0) :: (store 1 into stack, align 0)
|
||||
; CHECK: [[SP:%[0-9]+]]:_(p0) = COPY %sp
|
||||
; CHECK: [[C12_OFFS:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
|
||||
; CHECK: [[C12_LOC:%[0-9]+]]:_(p0) = G_GEP [[SP]], [[C12_OFFS]](s64)
|
||||
; CHECK: G_STORE [[C12]](s8), [[C12_LOC]](p0) :: (store 1 into stack + 1, align 0)
|
||||
; CHECK: BL @test_stack_slots
|
||||
define void @test_call_stack() {
|
||||
call signext i8 @test_stack_slots([8 x i64] undef, i8 signext 42, i8 signext 12)
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECK-LABEL: name: test_128bit_struct
|
||||
; CHECK: %x0 = COPY
|
||||
; CHECK: %x1 = COPY
|
||||
; CHECK: %x2 = COPY
|
||||
; CHECK: BL @take_128bit_struct
|
||||
define void @test_128bit_struct([2 x i64]* %ptr) {
|
||||
%struct = load [2 x i64], [2 x i64]* %ptr
|
||||
call void @take_128bit_struct([2 x i64]* null, [2 x i64] %struct)
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECK-LABEL: name: take_128bit_struct
|
||||
; CHECK: {{%.*}}:_(p0) = COPY %x0
|
||||
; CHECK: {{%.*}}:_(s64) = COPY %x1
|
||||
; CHECK: {{%.*}}:_(s64) = COPY %x2
|
||||
define void @take_128bit_struct([2 x i64]* %ptr, [2 x i64] %in) {
|
||||
store [2 x i64] %in, [2 x i64]* %ptr
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECK-LABEL: name: test_split_struct
|
||||
; CHECK: [[STRUCT:%[0-9]+]]:_(s128) = G_LOAD {{.*}}(p0)
|
||||
; CHECK: [[LO:%[0-9]+]]:_(s64) = G_EXTRACT [[STRUCT]](s128), 0
|
||||
; CHECK: [[HI:%[0-9]+]]:_(s64) = G_EXTRACT [[STRUCT]](s128), 64
|
||||
|
||||
; CHECK: [[SP:%[0-9]+]]:_(p0) = COPY %sp
|
||||
; CHECK: [[OFF:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
|
||||
; CHECK: [[ADDR:%[0-9]+]]:_(p0) = G_GEP [[SP]], [[OFF]]
|
||||
; CHECK: G_STORE [[LO]](s64), [[ADDR]](p0) :: (store 8 into stack, align 0)
|
||||
|
||||
; CHECK: [[SP:%[0-9]+]]:_(p0) = COPY %sp
|
||||
; CHECK: [[OFF:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
|
||||
; CHECK: [[ADDR:%[0-9]+]]:_(p0) = G_GEP [[SP]], [[OFF]]
|
||||
; CHECK: G_STORE [[HI]](s64), [[ADDR]](p0) :: (store 8 into stack + 8, align 0)
|
||||
define void @test_split_struct([2 x i64]* %ptr) {
|
||||
%struct = load [2 x i64], [2 x i64]* %ptr
|
||||
call void @take_split_struct([2 x i64]* null, i64 1, i64 2, i64 3,
|
||||
i64 4, i64 5, i64 6,
|
||||
[2 x i64] %struct)
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECK-LABEL: name: take_split_struct
|
||||
; CHECK: fixedStack:
|
||||
; CHECK-DAG: - { id: [[LO_FRAME:[0-9]+]], type: default, offset: 0, size: 8
|
||||
; CHECK-DAG: - { id: [[HI_FRAME:[0-9]+]], type: default, offset: 8, size: 8
|
||||
|
||||
; CHECK: [[LOPTR:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.[[LO_FRAME]]
|
||||
; CHECK: [[LO:%[0-9]+]]:_(s64) = G_LOAD [[LOPTR]](p0) :: (invariant load 8 from %fixed-stack.[[LO_FRAME]], align 0)
|
||||
|
||||
; CHECK: [[HIPTR:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.[[HI_FRAME]]
|
||||
; CHECK: [[HI:%[0-9]+]]:_(s64) = G_LOAD [[HIPTR]](p0) :: (invariant load 8 from %fixed-stack.[[HI_FRAME]], align 0)
|
||||
define void @take_split_struct([2 x i64]* %ptr, i64, i64, i64,
|
||||
i64, i64, i64,
|
||||
[2 x i64] %in) {
|
||||
store [2 x i64] %in, [2 x i64]* %ptr
|
||||
ret void
|
||||
}
|
||||
@ -1,278 +0,0 @@
|
||||
; RUN: llc -mtriple=aarch64-linux-gnu -O0 -stop-after=irtranslator -global-isel -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
|
||||
|
||||
; CHECK-LABEL: name: test_trivial_call
|
||||
; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def %sp, implicit %sp
|
||||
; CHECK: BL @trivial_callee, csr_aarch64_aapcs, implicit-def %lr
|
||||
; CHECK: ADJCALLSTACKUP 0, 0, implicit-def %sp, implicit %sp
|
||||
declare void @trivial_callee()
|
||||
define void @test_trivial_call() {
|
||||
call void @trivial_callee()
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECK-LABEL: name: test_simple_return
|
||||
; CHECK: BL @simple_return_callee, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit-def %x0
|
||||
; CHECK: [[RES:%[0-9]+]]:_(s64) = COPY %x0
|
||||
; CHECK: %x0 = COPY [[RES]]
|
||||
; CHECK: RET_ReallyLR implicit %x0
|
||||
declare i64 @simple_return_callee()
|
||||
define i64 @test_simple_return() {
|
||||
%res = call i64 @simple_return_callee()
|
||||
ret i64 %res
|
||||
}
|
||||
|
||||
; CHECK-LABEL: name: test_simple_arg
|
||||
; CHECK: [[IN:%[0-9]+]]:_(s32) = COPY %w0
|
||||
; CHECK: %w0 = COPY [[IN]]
|
||||
; CHECK: BL @simple_arg_callee, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %w0
|
||||
; CHECK: RET_ReallyLR
|
||||
declare void @simple_arg_callee(i32 %in)
|
||||
define void @test_simple_arg(i32 %in) {
|
||||
call void @simple_arg_callee(i32 %in)
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECK-LABEL: name: test_indirect_call
|
||||
; CHECK: registers:
|
||||
; Make sure the register feeding the indirect call is properly constrained.
|
||||
; CHECK: - { id: [[FUNC:[0-9]+]], class: gpr64, preferred-register: '' }
|
||||
; CHECK: %[[FUNC]]:gpr64(p0) = COPY %x0
|
||||
; CHECK: BLR %[[FUNC]](p0), csr_aarch64_aapcs, implicit-def %lr, implicit %sp
|
||||
; CHECK: RET_ReallyLR
|
||||
define void @test_indirect_call(void()* %func) {
|
||||
call void %func()
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECK-LABEL: name: test_multiple_args
|
||||
; CHECK: [[IN:%[0-9]+]]:_(s64) = COPY %x0
|
||||
; CHECK: [[ANSWER:%[0-9]+]]:_(s32) = G_CONSTANT i32 42
|
||||
; CHECK: %w0 = COPY [[ANSWER]]
|
||||
; CHECK: %x1 = COPY [[IN]]
|
||||
; CHECK: BL @multiple_args_callee, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %w0, implicit %x1
|
||||
; CHECK: RET_ReallyLR
|
||||
declare void @multiple_args_callee(i32, i64)
|
||||
define void @test_multiple_args(i64 %in) {
|
||||
call void @multiple_args_callee(i32 42, i64 %in)
|
||||
ret void
|
||||
}
|
||||
|
||||
|
||||
; CHECK-LABEL: name: test_struct_formal
|
||||
; CHECK: [[DBL:%[0-9]+]]:_(s64) = COPY %d0
|
||||
; CHECK: [[I64:%[0-9]+]]:_(s64) = COPY %x0
|
||||
; CHECK: [[I8_C:%[0-9]+]]:_(s32) = COPY %w1
|
||||
; CHECK: [[I8:%[0-9]+]]:_(s8) = G_TRUNC [[I8_C]]
|
||||
; CHECK: [[ADDR:%[0-9]+]]:_(p0) = COPY %x2
|
||||
|
||||
; CHECK: [[UNDEF:%[0-9]+]]:_(s192) = G_IMPLICIT_DEF
|
||||
; CHECK: [[ARG0:%[0-9]+]]:_(s192) = G_INSERT [[UNDEF]], [[DBL]](s64), 0
|
||||
; CHECK: [[ARG1:%[0-9]+]]:_(s192) = G_INSERT [[ARG0]], [[I64]](s64), 64
|
||||
; CHECK: [[ARG2:%[0-9]+]]:_(s192) = G_INSERT [[ARG1]], [[I8]](s8), 128
|
||||
; CHECK: [[ARG:%[0-9]+]]:_(s192) = COPY [[ARG2]]
|
||||
|
||||
; CHECK: G_STORE [[ARG]](s192), [[ADDR]](p0)
|
||||
; CHECK: RET_ReallyLR
|
||||
define void @test_struct_formal({double, i64, i8} %in, {double, i64, i8}* %addr) {
|
||||
store {double, i64, i8} %in, {double, i64, i8}* %addr
|
||||
ret void
|
||||
}
|
||||
|
||||
|
||||
; CHECK-LABEL: name: test_struct_return
|
||||
; CHECK: [[ADDR:%[0-9]+]]:_(p0) = COPY %x0
|
||||
; CHECK: [[VAL:%[0-9]+]]:_(s192) = G_LOAD [[ADDR]](p0)
|
||||
|
||||
; CHECK: [[DBL:%[0-9]+]]:_(s64) = G_EXTRACT [[VAL]](s192), 0
|
||||
; CHECK: [[I64:%[0-9]+]]:_(s64) = G_EXTRACT [[VAL]](s192), 64
|
||||
; CHECK: [[I32:%[0-9]+]]:_(s32) = G_EXTRACT [[VAL]](s192), 128
|
||||
|
||||
; CHECK: %d0 = COPY [[DBL]](s64)
|
||||
; CHECK: %x0 = COPY [[I64]](s64)
|
||||
; CHECK: %w1 = COPY [[I32]](s32)
|
||||
; CHECK: RET_ReallyLR implicit %d0, implicit %x0, implicit %w1
|
||||
define {double, i64, i32} @test_struct_return({double, i64, i32}* %addr) {
|
||||
%val = load {double, i64, i32}, {double, i64, i32}* %addr
|
||||
ret {double, i64, i32} %val
|
||||
}
|
||||
|
||||
; CHECK-LABEL: name: test_arr_call
|
||||
; CHECK: hasCalls: true
|
||||
; CHECK: [[ARG:%[0-9]+]]:_(s256) = G_LOAD
|
||||
|
||||
; CHECK: [[E0:%[0-9]+]]:_(s64) = G_EXTRACT [[ARG]](s256), 0
|
||||
; CHECK: [[E1:%[0-9]+]]:_(s64) = G_EXTRACT [[ARG]](s256), 64
|
||||
; CHECK: [[E2:%[0-9]+]]:_(s64) = G_EXTRACT [[ARG]](s256), 128
|
||||
; CHECK: [[E3:%[0-9]+]]:_(s64) = G_EXTRACT [[ARG]](s256), 192
|
||||
|
||||
; CHECK: %x0 = COPY [[E0]](s64)
|
||||
; CHECK: %x1 = COPY [[E1]](s64)
|
||||
; CHECK: %x2 = COPY [[E2]](s64)
|
||||
; CHECK: %x3 = COPY [[E3]](s64)
|
||||
; CHECK: BL @arr_callee, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %x0, implicit %x1, implicit %x2, implicit %x3, implicit-def %x0, implicit-def %x1, implicit-def %x2, implicit-def %x3
|
||||
; CHECK: [[E0:%[0-9]+]]:_(s64) = COPY %x0
|
||||
; CHECK: [[E1:%[0-9]+]]:_(s64) = COPY %x1
|
||||
; CHECK: [[E2:%[0-9]+]]:_(s64) = COPY %x2
|
||||
; CHECK: [[E3:%[0-9]+]]:_(s64) = COPY %x3
|
||||
; CHECK: [[RES:%[0-9]+]]:_(s256) = G_MERGE_VALUES [[E0]](s64), [[E1]](s64), [[E2]](s64), [[E3]](s64)
|
||||
; CHECK: G_EXTRACT [[RES]](s256), 64
|
||||
declare [4 x i64] @arr_callee([4 x i64])
|
||||
define i64 @test_arr_call([4 x i64]* %addr) {
|
||||
%arg = load [4 x i64], [4 x i64]* %addr
|
||||
%res = call [4 x i64] @arr_callee([4 x i64] %arg)
|
||||
%val = extractvalue [4 x i64] %res, 1
|
||||
ret i64 %val
|
||||
}
|
||||
|
||||
|
||||
; CHECK-LABEL: name: test_abi_exts_call
|
||||
; CHECK: [[VAL:%[0-9]+]]:_(s8) = G_LOAD
|
||||
; CHECK: [[VAL_TMP:%[0-9]+]]:_(s32) = G_ANYEXT [[VAL]]
|
||||
; CHECK: %w0 = COPY [[VAL_TMP]]
|
||||
; CHECK: BL @take_char, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %w0
|
||||
; CHECK: [[SVAL:%[0-9]+]]:_(s32) = G_SEXT [[VAL]](s8)
|
||||
; CHECK: %w0 = COPY [[SVAL]](s32)
|
||||
; CHECK: BL @take_char, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %w0
|
||||
; CHECK: [[ZVAL:%[0-9]+]]:_(s32) = G_ZEXT [[VAL]](s8)
|
||||
; CHECK: %w0 = COPY [[ZVAL]](s32)
|
||||
; CHECK: BL @take_char, csr_aarch64_aapcs, implicit-def %lr, implicit %sp, implicit %w0
|
||||
declare void @take_char(i8)
|
||||
define void @test_abi_exts_call(i8* %addr) {
|
||||
%val = load i8, i8* %addr
|
||||
call void @take_char(i8 %val)
|
||||
call void @take_char(i8 signext %val)
|
||||
call void @take_char(i8 zeroext %val)
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECK-LABEL: name: test_abi_sext_ret
|
||||
; CHECK: [[VAL:%[0-9]+]]:_(s8) = G_LOAD
|
||||
; CHECK: [[SVAL:%[0-9]+]]:_(s32) = G_SEXT [[VAL]](s8)
|
||||
; CHECK: %w0 = COPY [[SVAL]](s32)
|
||||
; CHECK: RET_ReallyLR implicit %w0
|
||||
define signext i8 @test_abi_sext_ret(i8* %addr) {
|
||||
%val = load i8, i8* %addr
|
||||
ret i8 %val
|
||||
}
|
||||
|
||||
; CHECK-LABEL: name: test_abi_zext_ret
|
||||
; CHECK: [[VAL:%[0-9]+]]:_(s8) = G_LOAD
|
||||
; CHECK: [[SVAL:%[0-9]+]]:_(s32) = G_ZEXT [[VAL]](s8)
|
||||
; CHECK: %w0 = COPY [[SVAL]](s32)
|
||||
; CHECK: RET_ReallyLR implicit %w0
|
||||
define zeroext i8 @test_abi_zext_ret(i8* %addr) {
|
||||
%val = load i8, i8* %addr
|
||||
ret i8 %val
|
||||
}
|
||||
|
||||
; CHECK-LABEL: name: test_stack_slots
|
||||
; CHECK: fixedStack:
|
||||
; CHECK-DAG: - { id: [[STACK0:[0-9]+]], type: default, offset: 0, size: 8,
|
||||
; CHECK-DAG: - { id: [[STACK8:[0-9]+]], type: default, offset: 8, size: 8,
|
||||
; CHECK-DAG: - { id: [[STACK16:[0-9]+]], type: default, offset: 16, size: 8,
|
||||
; CHECK: [[LHS_ADDR:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.[[STACK0]]
|
||||
; CHECK: [[LHS:%[0-9]+]]:_(s64) = G_LOAD [[LHS_ADDR]](p0) :: (invariant load 8 from %fixed-stack.[[STACK0]], align 0)
|
||||
; CHECK: [[RHS_ADDR:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.[[STACK8]]
|
||||
; CHECK: [[RHS:%[0-9]+]]:_(s64) = G_LOAD [[RHS_ADDR]](p0) :: (invariant load 8 from %fixed-stack.[[STACK8]], align 0)
|
||||
; CHECK: [[ADDR_ADDR:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.[[STACK16]]
|
||||
; CHECK: [[ADDR:%[0-9]+]]:_(p0) = G_LOAD [[ADDR_ADDR]](p0) :: (invariant load 8 from %fixed-stack.[[STACK16]], align 0)
|
||||
; CHECK: [[SUM:%[0-9]+]]:_(s64) = G_ADD [[LHS]], [[RHS]]
|
||||
; CHECK: G_STORE [[SUM]](s64), [[ADDR]](p0)
|
||||
define void @test_stack_slots([8 x i64], i64 %lhs, i64 %rhs, i64* %addr) {
|
||||
%sum = add i64 %lhs, %rhs
|
||||
store i64 %sum, i64* %addr
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECK-LABEL: name: test_call_stack
|
||||
; CHECK: [[C42:%[0-9]+]]:_(s64) = G_CONSTANT i64 42
|
||||
; CHECK: [[C12:%[0-9]+]]:_(s64) = G_CONSTANT i64 12
|
||||
; CHECK: [[PTR:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
|
||||
; CHECK: ADJCALLSTACKDOWN 24, 0, implicit-def %sp, implicit %sp
|
||||
; CHECK: [[SP:%[0-9]+]]:_(p0) = COPY %sp
|
||||
; CHECK: [[C42_OFFS:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
|
||||
; CHECK: [[C42_LOC:%[0-9]+]]:_(p0) = G_GEP [[SP]], [[C42_OFFS]](s64)
|
||||
; CHECK: G_STORE [[C42]](s64), [[C42_LOC]](p0) :: (store 8 into stack, align 0)
|
||||
; CHECK: [[SP:%[0-9]+]]:_(p0) = COPY %sp
|
||||
; CHECK: [[C12_OFFS:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
|
||||
; CHECK: [[C12_LOC:%[0-9]+]]:_(p0) = G_GEP [[SP]], [[C12_OFFS]](s64)
|
||||
; CHECK: G_STORE [[C12]](s64), [[C12_LOC]](p0) :: (store 8 into stack + 8, align 0)
|
||||
; CHECK: [[SP:%[0-9]+]]:_(p0) = COPY %sp
|
||||
; CHECK: [[PTR_OFFS:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
|
||||
; CHECK: [[PTR_LOC:%[0-9]+]]:_(p0) = G_GEP [[SP]], [[PTR_OFFS]](s64)
|
||||
; CHECK: G_STORE [[PTR]](p0), [[PTR_LOC]](p0) :: (store 8 into stack + 16, align 0)
|
||||
; CHECK: BL @test_stack_slots
|
||||
; CHECK: ADJCALLSTACKUP 24, 0, implicit-def %sp, implicit %sp
|
||||
define void @test_call_stack() {
|
||||
call void @test_stack_slots([8 x i64] undef, i64 42, i64 12, i64* null)
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECK-LABEL: name: test_mem_i1
|
||||
; CHECK: fixedStack:
|
||||
; CHECK-NEXT: - { id: [[SLOT:[0-9]+]], type: default, offset: 0, size: 1, alignment: 16, stack-id: 0,
|
||||
; CHECK-NEXT: isImmutable: true,
|
||||
; CHECK: [[ADDR:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.[[SLOT]]
|
||||
; CHECK: {{%[0-9]+}}:_(s1) = G_LOAD [[ADDR]](p0) :: (invariant load 1 from %fixed-stack.[[SLOT]], align 0)
|
||||
define void @test_mem_i1([8 x i64], i1 %in) {
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECK-LABEL: name: test_128bit_struct
|
||||
; CHECK: %x0 = COPY
|
||||
; CHECK: %x1 = COPY
|
||||
; CHECK: %x2 = COPY
|
||||
; CHECK: BL @take_128bit_struct
|
||||
define void @test_128bit_struct([2 x i64]* %ptr) {
|
||||
%struct = load [2 x i64], [2 x i64]* %ptr
|
||||
call void @take_128bit_struct([2 x i64]* null, [2 x i64] %struct)
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECK-LABEL: name: take_128bit_struct
|
||||
; CHECK: {{%.*}}:_(p0) = COPY %x0
|
||||
; CHECK: {{%.*}}:_(s64) = COPY %x1
|
||||
; CHECK: {{%.*}}:_(s64) = COPY %x2
|
||||
define void @take_128bit_struct([2 x i64]* %ptr, [2 x i64] %in) {
|
||||
store [2 x i64] %in, [2 x i64]* %ptr
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECK-LABEL: name: test_split_struct
|
||||
; CHECK: [[STRUCT:%[0-9]+]]:_(s128) = G_LOAD {{.*}}(p0)
|
||||
; CHECK: [[LO:%[0-9]+]]:_(s64) = G_EXTRACT [[STRUCT]](s128), 0
|
||||
; CHECK: [[HI:%[0-9]+]]:_(s64) = G_EXTRACT [[STRUCT]](s128), 64
|
||||
|
||||
; CHECK: [[SP:%[0-9]+]]:_(p0) = COPY %sp
|
||||
; CHECK: [[OFF:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
|
||||
; CHECK: [[ADDR:%[0-9]+]]:_(p0) = G_GEP [[SP]], [[OFF]]
|
||||
; CHECK: G_STORE [[LO]](s64), [[ADDR]](p0) :: (store 8 into stack, align 0)
|
||||
|
||||
; CHECK: [[SP:%[0-9]+]]:_(p0) = COPY %sp
|
||||
; CHECK: [[OFF:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
|
||||
; CHECK: [[ADDR:%[0-9]+]]:_(p0) = G_GEP [[SP]], [[OFF]]
|
||||
; CHECK: G_STORE [[HI]](s64), [[ADDR]](p0) :: (store 8 into stack + 8, align 0)
|
||||
define void @test_split_struct([2 x i64]* %ptr) {
|
||||
%struct = load [2 x i64], [2 x i64]* %ptr
|
||||
call void @take_split_struct([2 x i64]* null, i64 1, i64 2, i64 3,
|
||||
i64 4, i64 5, i64 6,
|
||||
[2 x i64] %struct)
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECK-LABEL: name: take_split_struct
|
||||
; CHECK: fixedStack:
|
||||
; CHECK-DAG: - { id: [[LO_FRAME:[0-9]+]], type: default, offset: 0, size: 8
|
||||
; CHECK-DAG: - { id: [[HI_FRAME:[0-9]+]], type: default, offset: 8, size: 8
|
||||
|
||||
; CHECK: [[LOPTR:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.[[LO_FRAME]]
|
||||
; CHECK: [[LO:%[0-9]+]]:_(s64) = G_LOAD [[LOPTR]](p0) :: (invariant load 8 from %fixed-stack.[[LO_FRAME]], align 0)
|
||||
|
||||
; CHECK: [[HIPTR:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.[[HI_FRAME]]
|
||||
; CHECK: [[HI:%[0-9]+]]:_(s64) = G_LOAD [[HIPTR]](p0) :: (invariant load 8 from %fixed-stack.[[HI_FRAME]], align 0)
|
||||
define void @take_split_struct([2 x i64]* %ptr, i64, i64, i64,
|
||||
i64, i64, i64,
|
||||
[2 x i64] %in) {
|
||||
store [2 x i64] %in, [2 x i64]* %ptr
|
||||
ret void
|
||||
}
|
||||
@ -1,42 +0,0 @@
|
||||
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
|
||||
--- |
|
||||
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
|
||||
target triple = "aarch64--"
|
||||
|
||||
define void @test_anyext_crash() {
|
||||
entry:
|
||||
br label %block2
|
||||
|
||||
block2:
|
||||
%0 = trunc i16 0 to i8
|
||||
%1 = uitofp i8 %0 to double
|
||||
br label %block2
|
||||
}
|
||||
|
||||
|
||||
...
|
||||
---
|
||||
name: test_anyext_crash
|
||||
alignment: 2
|
||||
legalized: false
|
||||
registers:
|
||||
- { id: 0, class: _, preferred-register: '' }
|
||||
- { id: 1, class: _, preferred-register: '' }
|
||||
- { id: 2, class: _, preferred-register: '' }
|
||||
body: |
|
||||
bb.1:
|
||||
; Check we don't crash due to trying to legalize a dead instruction.
|
||||
; CHECK-LABEL: test_anyext_crash
|
||||
; CHECK-LABEL: bb.1:
|
||||
successors: %bb.2
|
||||
|
||||
%0(s16) = G_CONSTANT i16 0
|
||||
|
||||
bb.2:
|
||||
successors: %bb.2
|
||||
|
||||
%1(s8) = G_TRUNC %0(s16)
|
||||
%2(s64) = G_UITOFP %1(s8)
|
||||
G_BR %bb.2
|
||||
|
||||
...
|
||||
@ -1,72 +0,0 @@
|
||||
; RUN: llc -global-isel -mtriple=aarch64 %s -stop-after=irtranslator -o - | FileCheck %s
|
||||
; RUN: llc -mtriple=aarch64 -global-isel --global-isel-abort=0 -o /dev/null
|
||||
|
||||
; CHECK-LABEL: name: debug_declare
|
||||
; CHECK: stack:
|
||||
; CHECK: - { id: {{.*}}, name: in.addr, type: default, offset: 0, size: {{.*}}, alignment: {{.*}},
|
||||
; CHECK-NEXT: callee-saved-register: '', callee-saved-restored: true,
|
||||
; CHECK-NEXT: di-variable: '!11', di-expression: '!DIExpression()',
|
||||
; CHECK: DBG_VALUE debug-use %0(s32), debug-use %noreg, !11, !DIExpression(), debug-location !12
|
||||
define void @debug_declare(i32 %in) #0 !dbg !7 {
|
||||
entry:
|
||||
%in.addr = alloca i32, align 4
|
||||
store i32 %in, i32* %in.addr, align 4
|
||||
call void @llvm.dbg.declare(metadata i32* %in.addr, metadata !11, metadata !DIExpression()), !dbg !12
|
||||
call void @llvm.dbg.declare(metadata i32 %in, metadata !11, metadata !DIExpression()), !dbg !12
|
||||
ret void, !dbg !12
|
||||
}
|
||||
|
||||
; CHECK-LABEL: name: debug_declare_vla
|
||||
; CHECK: DBG_VALUE debug-use %{{[0-9]+}}(p0), debug-use %noreg, !14, !DIExpression(), debug-location !15
|
||||
define void @debug_declare_vla(i32 %in) #0 !dbg !13 {
|
||||
entry:
|
||||
%vla.addr = alloca i32, i32 %in
|
||||
call void @llvm.dbg.declare(metadata i32* %vla.addr, metadata !14, metadata !DIExpression()), !dbg !15
|
||||
ret void, !dbg !15
|
||||
}
|
||||
|
||||
; CHECK-LABEL: name: debug_value
|
||||
; CHECK: [[IN:%[0-9]+]]:_(s32) = COPY %w0
|
||||
define void @debug_value(i32 %in) #0 !dbg !16 {
|
||||
%addr = alloca i32
|
||||
; CHECK: DBG_VALUE debug-use [[IN]](s32), debug-use %noreg, !17, !DIExpression(), debug-location !18
|
||||
call void @llvm.dbg.value(metadata i32 %in, i64 0, metadata !17, metadata !DIExpression()), !dbg !18
|
||||
store i32 %in, i32* %addr
|
||||
; CHECK: DBG_VALUE debug-use %1(p0), debug-use %noreg, !17, !DIExpression(DW_OP_deref), debug-location !18
|
||||
call void @llvm.dbg.value(metadata i32* %addr, i64 0, metadata !17, metadata !DIExpression(DW_OP_deref)), !dbg !18
|
||||
; CHECK: DBG_VALUE 123, 0, !17, !DIExpression(), debug-location !18
|
||||
call void @llvm.dbg.value(metadata i32 123, i64 0, metadata !17, metadata !DIExpression()), !dbg !18
|
||||
; CHECK: DBG_VALUE float 1.000000e+00, 0, !17, !DIExpression(), debug-location !18
|
||||
call void @llvm.dbg.value(metadata float 1.000000e+00, i64 0, metadata !17, metadata !DIExpression()), !dbg !18
|
||||
; CHECK: DBG_VALUE %noreg, 0, !17, !DIExpression(), debug-location !18
|
||||
call void @llvm.dbg.value(metadata i32* null, i64 0, metadata !17, metadata !DIExpression()), !dbg !18
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: nounwind readnone
|
||||
declare void @llvm.dbg.declare(metadata, metadata, metadata)
|
||||
declare void @llvm.dbg.value(metadata, i64, metadata, metadata)
|
||||
|
||||
!llvm.dbg.cu = !{!0}
|
||||
!llvm.module.flags = !{!3, !4, !5}
|
||||
!llvm.ident = !{!6}
|
||||
|
||||
!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 4.0.0 (trunk 289075) (llvm/trunk 289080)", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
|
||||
!1 = !DIFile(filename: "tmp.c", directory: "/Users/tim/llvm/build")
|
||||
!2 = !{}
|
||||
!3 = !{i32 2, !"Dwarf Version", i32 4}
|
||||
!4 = !{i32 2, !"Debug Info Version", i32 3}
|
||||
!5 = !{i32 1, !"PIC Level", i32 2}
|
||||
!6 = !{!"clang version 4.0.0 (trunk 289075) (llvm/trunk 289080)"}
|
||||
!7 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 1, type: !8, isLocal: false, isDefinition: true, scopeLine: 1, flags: DIFlagPrototyped, isOptimized: false, unit: !0, variables: !2)
|
||||
!8 = !DISubroutineType(types: !9)
|
||||
!9 = !{null, !10}
|
||||
!10 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
|
||||
!11 = !DILocalVariable(name: "in", arg: 1, scope: !7, file: !1, line: 1, type: !10)
|
||||
!12 = !DILocation(line: 1, column: 14, scope: !7)
|
||||
!13 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 1, type: !8, isLocal: false, isDefinition: true, scopeLine: 1, flags: DIFlagPrototyped, isOptimized: false, unit: !0, variables: !2)
|
||||
!14 = !DILocalVariable(name: "in", arg: 1, scope: !13, file: !1, line: 1, type: !10)
|
||||
!15 = !DILocation(line: 1, column: 14, scope: !13)
|
||||
!16 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 1, type: !8, isLocal: false, isDefinition: true, scopeLine: 1, flags: DIFlagPrototyped, isOptimized: false, unit: !0, variables: !2)
|
||||
!17 = !DILocalVariable(name: "in", arg: 1, scope: !16, file: !1, line: 1, type: !10)
|
||||
!18 = !DILocation(line: 1, column: 14, scope: !16)
|
||||
@ -1,48 +0,0 @@
|
||||
; RUN: llc -mtriple=aarch64 -global-isel %s -o - -stop-after=irtranslator | FileCheck %s
|
||||
|
||||
; CHECK-LABEL: name: test_simple_alloca
|
||||
; CHECK: [[NUMELTS:%[0-9]+]]:_(s32) = COPY %w0
|
||||
; CHECK: [[TYPE_SIZE:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
|
||||
; CHECK: [[NUMELTS_64:%[0-9]+]]:_(s64) = G_ZEXT [[NUMELTS]](s32)
|
||||
; CHECK: [[NUMBYTES:%[0-9]+]]:_(s64) = G_MUL [[NUMELTS_64]], [[TYPE_SIZE]]
|
||||
; CHECK: [[SP_TMP:%[0-9]+]]:_(p0) = COPY %sp
|
||||
; CHECK: [[ALLOC:%[0-9]+]]:_(p0) = G_GEP [[SP_TMP]], [[NUMBYTES]]
|
||||
; CHECK: [[ALIGNED_ALLOC:%[0-9]+]]:_(p0) = G_PTR_MASK [[ALLOC]], 4
|
||||
; CHECK: %sp = COPY [[ALIGNED_ALLOC]]
|
||||
; CHECK: [[ALLOC:%[0-9]+]]:_(p0) = COPY [[ALIGNED_ALLOC]]
|
||||
; CHECK: %x0 = COPY [[ALLOC]]
|
||||
define i8* @test_simple_alloca(i32 %numelts) {
|
||||
%addr = alloca i8, i32 %numelts
|
||||
ret i8* %addr
|
||||
}
|
||||
|
||||
; CHECK-LABEL: name: test_aligned_alloca
|
||||
; CHECK: [[NUMELTS:%[0-9]+]]:_(s32) = COPY %w0
|
||||
; CHECK: [[TYPE_SIZE:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
|
||||
; CHECK: [[NUMELTS_64:%[0-9]+]]:_(s64) = G_ZEXT [[NUMELTS]](s32)
|
||||
; CHECK: [[NUMBYTES:%[0-9]+]]:_(s64) = G_MUL [[NUMELTS_64]], [[TYPE_SIZE]]
|
||||
; CHECK: [[SP_TMP:%[0-9]+]]:_(p0) = COPY %sp
|
||||
; CHECK: [[ALLOC:%[0-9]+]]:_(p0) = G_GEP [[SP_TMP]], [[NUMBYTES]]
|
||||
; CHECK: [[ALIGNED_ALLOC:%[0-9]+]]:_(p0) = G_PTR_MASK [[ALLOC]], 5
|
||||
; CHECK: %sp = COPY [[ALIGNED_ALLOC]]
|
||||
; CHECK: [[ALLOC:%[0-9]+]]:_(p0) = COPY [[ALIGNED_ALLOC]]
|
||||
; CHECK: %x0 = COPY [[ALLOC]]
|
||||
define i8* @test_aligned_alloca(i32 %numelts) {
|
||||
%addr = alloca i8, i32 %numelts, align 32
|
||||
ret i8* %addr
|
||||
}
|
||||
|
||||
; CHECK-LABEL: name: test_natural_alloca
|
||||
; CHECK: [[NUMELTS:%[0-9]+]]:_(s32) = COPY %w0
|
||||
; CHECK: [[TYPE_SIZE:%[0-9]+]]:_(s64) = G_CONSTANT i64 -16
|
||||
; CHECK: [[NUMELTS_64:%[0-9]+]]:_(s64) = G_ZEXT [[NUMELTS]](s32)
|
||||
; CHECK: [[NUMBYTES:%[0-9]+]]:_(s64) = G_MUL [[NUMELTS_64]], [[TYPE_SIZE]]
|
||||
; CHECK: [[SP_TMP:%[0-9]+]]:_(p0) = COPY %sp
|
||||
; CHECK: [[ALLOC:%[0-9]+]]:_(p0) = G_GEP [[SP_TMP]], [[NUMBYTES]]
|
||||
; CHECK: %sp = COPY [[ALLOC]]
|
||||
; CHECK: [[ALLOC_TMP:%[0-9]+]]:_(p0) = COPY [[ALLOC]]
|
||||
; CHECK: %x0 = COPY [[ALLOC_TMP]]
|
||||
define i128* @test_natural_alloca(i32 %numelts) {
|
||||
%addr = alloca i128, i32 %numelts
|
||||
ret i128* %addr
|
||||
}
|
||||
@ -1,11 +0,0 @@
|
||||
; RUN: llc -mtriple=aarch64_be-- %s -o /dev/null -debug-only=isel -O0 2>&1 | FileCheck %s
|
||||
; REQUIRES: asserts
|
||||
|
||||
; This test uses big endian in order to force an abort since it's not currently supported for GISel.
|
||||
; The purpose is to check that we don't fall back to FastISel. Checking the pass structure is insufficient
|
||||
; because the FastISel is set up in the SelectionDAGISel, so it doesn't appear on the pass structure.
|
||||
|
||||
; CHECK-NOT: Enabling fast-ise
|
||||
define void @empty() {
|
||||
ret void
|
||||
}
|
||||
@ -1,44 +0,0 @@
|
||||
# RUN: llc -O0 -run-pass=legalizer -global-isel -global-isel-abort=0 %s -o - | FileCheck %s
|
||||
--- |
|
||||
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
|
||||
target triple = "aarch64"
|
||||
|
||||
define fp128 @x(fp128 %a) {
|
||||
entry:
|
||||
%a.addr = alloca fp128, align 16
|
||||
store fp128 %a, fp128* %a.addr, align 16
|
||||
%0 = load fp128, fp128* %a.addr, align 16
|
||||
%sub = fsub fp128 0xL00000000000000008000000000000000, %0
|
||||
ret fp128 %sub
|
||||
}
|
||||
|
||||
...
|
||||
---
|
||||
name: x
|
||||
alignment: 2
|
||||
exposesReturnsTwice: false
|
||||
legalized: false
|
||||
regBankSelected: false
|
||||
selected: false
|
||||
tracksRegLiveness: true
|
||||
fixedStack:
|
||||
stack:
|
||||
- { id: 0, name: a.addr, type: default, offset: 0, size: 16, alignment: 16,
|
||||
stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
|
||||
di-variable: '', di-expression: '', di-location: '' }
|
||||
body: |
|
||||
bb.1.entry:
|
||||
liveins: %q0
|
||||
|
||||
; This test just checks we don't crash on G_FNEG of FP128 types. Expect to fall
|
||||
; back until support is added for fp128.
|
||||
; CHECK: ret
|
||||
%0:_(s128) = COPY %q0
|
||||
%1:_(p0) = G_FRAME_INDEX %stack.0.a.addr
|
||||
G_STORE %0(s128), %1(p0) :: (store 16 into %ir.a.addr)
|
||||
%2:_(s128) = G_LOAD %1(p0) :: (load 16 from %ir.a.addr)
|
||||
%3:_(s128) = G_FNEG %2
|
||||
%q0 = COPY %3(s128)
|
||||
RET_ReallyLR implicit %q0
|
||||
|
||||
...
|
||||
@ -1,131 +0,0 @@
|
||||
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
|
||||
# RUN: llc -mtriple=aarch64-unknown-unknown -o - -global-isel -verify-machineinstrs -run-pass=instruction-select %s | FileCheck %s
|
||||
|
||||
# PR36345
|
||||
--- |
|
||||
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
|
||||
target triple = "aarch64-arm-none-eabi"
|
||||
|
||||
; Function Attrs: noinline nounwind optnone
|
||||
define void @fp16_to_gpr([2 x half], [2 x half]* %addr) {
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @gpr_to_fp16() {
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @gpr_to_fp16_physreg() {
|
||||
ret void
|
||||
}
|
||||
...
|
||||
---
|
||||
name: fp16_to_gpr
|
||||
alignment: 2
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
tracksRegLiveness: true
|
||||
registers:
|
||||
- { id: 0, class: gpr }
|
||||
- { id: 1, class: fpr }
|
||||
- { id: 2, class: fpr }
|
||||
- { id: 3, class: gpr }
|
||||
- { id: 4, class: gpr }
|
||||
- { id: 5, class: gpr }
|
||||
- { id: 6, class: gpr }
|
||||
- { id: 7, class: gpr }
|
||||
- { id: 8, class: gpr }
|
||||
- { id: 9, class: gpr }
|
||||
- { id: 10, class: gpr }
|
||||
- { id: 11, class: gpr }
|
||||
- { id: 12, class: gpr }
|
||||
body: |
|
||||
bb.1 (%ir-block.1):
|
||||
liveins: %h0, %h1, %x0
|
||||
|
||||
; CHECK-LABEL: name: fp16_to_gpr
|
||||
; CHECK: liveins: %h0, %h1, %x0
|
||||
; CHECK: [[COPY:%[0-9]+]]:fpr16 = COPY %h0
|
||||
; CHECK: [[COPY1:%[0-9]+]]:fpr16 = COPY %h1
|
||||
; CHECK: [[DEF:%[0-9]+]]:gpr32 = IMPLICIT_DEF
|
||||
; CHECK: [[SUBREG_TO_REG:%[0-9]+]]:fpr32 = SUBREG_TO_REG 0, [[COPY]], %subreg.hsub
|
||||
; CHECK: [[COPY2:%[0-9]+]]:gpr32 = COPY [[SUBREG_TO_REG]]
|
||||
; CHECK: [[BFMWri:%[0-9]+]]:gpr32 = BFMWri [[DEF]], [[COPY2]], 0, 15
|
||||
; CHECK: [[SUBREG_TO_REG1:%[0-9]+]]:fpr32 = SUBREG_TO_REG 0, [[COPY1]], %subreg.hsub
|
||||
; CHECK: [[COPY3:%[0-9]+]]:gpr32 = COPY [[SUBREG_TO_REG1]]
|
||||
; CHECK: [[BFMWri1:%[0-9]+]]:gpr32 = BFMWri [[BFMWri]], [[COPY3]], 16, 15
|
||||
; CHECK: [[COPY4:%[0-9]+]]:gpr32 = COPY [[BFMWri1]]
|
||||
; CHECK: [[COPY5:%[0-9]+]]:gpr64sp = COPY %x0
|
||||
; CHECK: STRWui [[COPY4]], [[COPY5]], 0 :: (store 4 into %ir.addr, align 2)
|
||||
; CHECK: RET_ReallyLR
|
||||
%1:fpr(s16) = COPY %h0
|
||||
%2:fpr(s16) = COPY %h1
|
||||
%3:gpr(s32) = G_IMPLICIT_DEF
|
||||
%11:gpr(s16) = COPY %1(s16)
|
||||
%4:gpr(s32) = G_INSERT %3, %11(s16), 0
|
||||
%12:gpr(s16) = COPY %2(s16)
|
||||
%5:gpr(s32) = G_INSERT %4, %12(s16), 16
|
||||
%0:gpr(s32) = COPY %5(s32)
|
||||
%6:gpr(p0) = COPY %x0
|
||||
G_STORE %0(s32), %6(p0) :: (store 4 into %ir.addr, align 2)
|
||||
RET_ReallyLR
|
||||
|
||||
...
|
||||
|
||||
---
|
||||
name: gpr_to_fp16
|
||||
alignment: 2
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
tracksRegLiveness: true
|
||||
registers:
|
||||
- { id: 0, class: gpr }
|
||||
- { id: 1, class: gpr }
|
||||
- { id: 2, class: fpr }
|
||||
body: |
|
||||
bb.1 (%ir-block.0):
|
||||
liveins: %w0
|
||||
|
||||
; CHECK-LABEL: name: gpr_to_fp16
|
||||
; CHECK: liveins: %w0
|
||||
; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY %w0
|
||||
; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]]
|
||||
; CHECK: [[COPY2:%[0-9]+]]:fpr32 = COPY [[COPY1]]
|
||||
; CHECK: [[COPY3:%[0-9]+]]:fpr16 = COPY [[COPY2]].hsub
|
||||
; CHECK: [[COPY4:%[0-9]+]]:fpr16 = COPY [[COPY3]]
|
||||
; CHECK: %h0 = COPY [[COPY4]]
|
||||
; CHECK: RET_ReallyLR implicit %h0
|
||||
%0:gpr(s32) = COPY %w0
|
||||
%1:gpr(s16) = G_TRUNC %0(s32)
|
||||
%2:fpr(s16) = COPY %1(s16)
|
||||
%h0 = COPY %2(s16)
|
||||
RET_ReallyLR implicit %h0
|
||||
|
||||
...
|
||||
---
|
||||
name: gpr_to_fp16_physreg
|
||||
alignment: 2
|
||||
legalized: true
|
||||
regBankSelected: true
|
||||
tracksRegLiveness: true
|
||||
registers:
|
||||
- { id: 0, class: gpr }
|
||||
- { id: 1, class: gpr }
|
||||
body: |
|
||||
bb.1 (%ir-block.0):
|
||||
liveins: %w0
|
||||
|
||||
; CHECK-LABEL: name: gpr_to_fp16_physreg
|
||||
; CHECK: liveins: %w0
|
||||
; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY %w0
|
||||
; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]]
|
||||
; CHECK: [[COPY2:%[0-9]+]]:fpr32 = COPY [[COPY1]]
|
||||
; CHECK: [[COPY3:%[0-9]+]]:fpr16 = COPY [[COPY2]].hsub
|
||||
; CHECK: %h0 = COPY [[COPY3]]
|
||||
; CHECK: RET_ReallyLR implicit %h0
|
||||
%0:gpr(s32) = COPY %w0
|
||||
%1:gpr(s16) = G_TRUNC %0(s32)
|
||||
%h0 = COPY %1(s16)
|
||||
RET_ReallyLR implicit %h0
|
||||
|
||||
...
|
||||
@ -1,8 +0,0 @@
|
||||
; RUN: llc -mtriple=aarch64-unknown-unknown -global-isel -global-isel-abort=2 -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
|
||||
|
||||
; CHECK-NOT: fallback
|
||||
; CHECK: empty
|
||||
define void @empty() {
|
||||
ret void
|
||||
}
|
||||
|
||||
@ -1,52 +0,0 @@
|
||||
; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
|
||||
; RUN: -O0 | FileCheck %s --check-prefix ENABLED --check-prefix ENABLED-O0 --check-prefix FALLBACK
|
||||
|
||||
; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
|
||||
; RUN: -O0 -aarch64-enable-global-isel-at-O=0 -global-isel-abort=1 \
|
||||
; RUN: | FileCheck %s --check-prefix ENABLED --check-prefix ENABLED-O0 --check-prefix NOFALLBACK
|
||||
|
||||
; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
|
||||
; RUN: -O0 -aarch64-enable-global-isel-at-O=0 -global-isel-abort=2 \
|
||||
; RUN: | FileCheck %s --check-prefix ENABLED --check-prefix ENABLED-O0 --check-prefix FALLBACK
|
||||
|
||||
; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
|
||||
; RUN: -global-isel \
|
||||
; RUN: | FileCheck %s --check-prefix ENABLED --check-prefix NOFALLBACK
|
||||
|
||||
; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
|
||||
; RUN: -global-isel -global-isel-abort=2 \
|
||||
; RUN: | FileCheck %s --check-prefix ENABLED --check-prefix FALLBACK
|
||||
|
||||
; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
|
||||
; RUN: -O1 -aarch64-enable-global-isel-at-O=3 \
|
||||
; RUN: | FileCheck %s --check-prefix ENABLED
|
||||
|
||||
; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
|
||||
; RUN: -O1 -aarch64-enable-global-isel-at-O=0 \
|
||||
; RUN: | FileCheck %s --check-prefix DISABLED
|
||||
|
||||
; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
|
||||
; RUN: -aarch64-enable-global-isel-at-O=-1 \
|
||||
; RUN: | FileCheck %s --check-prefix DISABLED
|
||||
|
||||
; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
|
||||
; RUN: | FileCheck %s --check-prefix DISABLED
|
||||
|
||||
; ENABLED: IRTranslator
|
||||
; ENABLED-NEXT: Legalizer
|
||||
; ENABLED-NEXT: RegBankSelect
|
||||
; ENABLED-O0-NEXT: Localizer
|
||||
; ENABLED-NEXT: InstructionSelect
|
||||
; ENABLED-NEXT: ResetMachineFunction
|
||||
|
||||
; FALLBACK: AArch64 Instruction Selection
|
||||
; NOFALLBACK-NOT: AArch64 Instruction Selection
|
||||
|
||||
; DISABLED-NOT: IRTranslator
|
||||
|
||||
; DISABLED: AArch64 Instruction Selection
|
||||
; DISABLED: Expand ISel Pseudo-instructions
|
||||
|
||||
define void @empty() {
|
||||
ret void
|
||||
}
|
||||
@ -1,8 +0,0 @@
|
||||
;RUN: llc -mtriple=aarch64-unknown-unknown -o - -global-isel -global-isel-abort=2 %s 2>&1 | FileCheck %s
|
||||
; CHECK: fallback
|
||||
; CHECK-LABEL: foo
|
||||
define i16 @foo(half* %p) {
|
||||
%tmp0 = load half, half* %p
|
||||
%tmp1 = fptoui half %tmp0 to i16
|
||||
ret i16 %tmp1
|
||||
}
|
||||
@ -1,10 +0,0 @@
|
||||
; RUN: llc -mtriple=aarch64 -global-isel -global-isel-abort=2 %s -o - | FileCheck %s
|
||||
|
||||
; CHECK-LABEL: test_asm:
|
||||
; CHECK: {{APP|InlineAsm Start}}
|
||||
; CHECK: mov x0, {{x[0-9]+}}
|
||||
; CHECK: {{NO_APP|InlineAsm End}}
|
||||
define void @test_asm() {
|
||||
call void asm sideeffect "mov x0, $0", "r"(i64 42)
|
||||
ret void
|
||||
}
|
||||
@ -1,30 +0,0 @@
|
||||
; RUN: llc -O0 -mtriple=aarch64-apple-ios -global-isel -stop-after=irtranslator %s -o - | FileCheck %s
|
||||
|
||||
; Check that we don't invalidate the vreg map.
|
||||
; This test is brittle: the invalidation only triggers when we grow the map.
|
||||
|
||||
; CHECK-LABEL: name: test_bitcast_invalid_vreg
|
||||
define i32 @test_bitcast_invalid_vreg() {
|
||||
%tmp0 = add i32 1, 2
|
||||
%tmp1 = add i32 3, 4
|
||||
%tmp2 = add i32 5, 6
|
||||
%tmp3 = add i32 7, 8
|
||||
%tmp4 = add i32 9, 10
|
||||
%tmp5 = add i32 11, 12
|
||||
%tmp6 = add i32 13, 14
|
||||
%tmp7 = add i32 15, 16
|
||||
%tmp8 = add i32 17, 18
|
||||
%tmp9 = add i32 19, 20
|
||||
%tmp10 = add i32 21, 22
|
||||
%tmp11 = add i32 23, 24
|
||||
%tmp12 = add i32 25, 26
|
||||
%tmp13 = add i32 27, 28
|
||||
%tmp14 = add i32 29, 30
|
||||
%tmp15 = add i32 30, 30
|
||||
|
||||
; At this point we mapped 46 values. The 'i32 100' constant will grow the map.
|
||||
; CHECK: %46:_(s32) = G_CONSTANT i32 100
|
||||
; CHECK: %w0 = COPY %46(s32)
|
||||
%res = bitcast i32 100 to i32
|
||||
ret i32 %res
|
||||
}
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user