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add_llvm_library(LLVMSystemZAsmPrinter
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SystemZInstPrinter.cpp
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)
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;===- ./lib/Target/SystemZ/InstPrinter/LLVMBuild.txt -----------*- Conf -*--===;
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;
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; The LLVM Compiler Infrastructure
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;
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; This file is distributed under the University of Illinois Open Source
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; License. See LICENSE.TXT for details.
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;
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;===------------------------------------------------------------------------===;
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;
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; This is an LLVMBuild description file for the components in this subdirectory.
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;
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; For more information on the LLVMBuild system, please see:
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;
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; http://llvm.org/docs/LLVMBuild.html
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;
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;===------------------------------------------------------------------------===;
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[component_0]
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type = Library
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name = SystemZAsmPrinter
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parent = SystemZ
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required_libraries = MC Support
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add_to_library_groups = SystemZ
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@ -1,234 +0,0 @@
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//===- SystemZInstPrinter.cpp - Convert SystemZ MCInst to assembly syntax -===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "SystemZInstPrinter.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/Support/Casting.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Support/raw_ostream.h"
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#include <cassert>
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#include <cstdint>
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using namespace llvm;
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#define DEBUG_TYPE "asm-printer"
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#include "SystemZGenAsmWriter.inc"
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void SystemZInstPrinter::printAddress(unsigned Base, int64_t Disp,
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unsigned Index, raw_ostream &O) {
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O << Disp;
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if (Base || Index) {
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O << '(';
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if (Index) {
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O << '%' << getRegisterName(Index);
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if (Base)
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O << ',';
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}
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if (Base)
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O << '%' << getRegisterName(Base);
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O << ')';
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}
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}
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void SystemZInstPrinter::printOperand(const MCOperand &MO, const MCAsmInfo *MAI,
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raw_ostream &O) {
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if (MO.isReg())
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O << '%' << getRegisterName(MO.getReg());
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else if (MO.isImm())
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O << MO.getImm();
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else if (MO.isExpr())
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MO.getExpr()->print(O, MAI);
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else
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llvm_unreachable("Invalid operand");
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}
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void SystemZInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
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StringRef Annot,
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const MCSubtargetInfo &STI) {
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printInstruction(MI, O);
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printAnnotation(O, Annot);
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}
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void SystemZInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const {
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O << '%' << getRegisterName(RegNo);
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}
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template <unsigned N>
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static void printUImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) {
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int64_t Value = MI->getOperand(OpNum).getImm();
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assert(isUInt<N>(Value) && "Invalid uimm argument");
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O << Value;
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}
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template <unsigned N>
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static void printSImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) {
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int64_t Value = MI->getOperand(OpNum).getImm();
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assert(isInt<N>(Value) && "Invalid simm argument");
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O << Value;
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}
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void SystemZInstPrinter::printU1ImmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printUImmOperand<1>(MI, OpNum, O);
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}
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void SystemZInstPrinter::printU2ImmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printUImmOperand<2>(MI, OpNum, O);
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}
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void SystemZInstPrinter::printU3ImmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printUImmOperand<3>(MI, OpNum, O);
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}
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void SystemZInstPrinter::printU4ImmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printUImmOperand<4>(MI, OpNum, O);
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}
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void SystemZInstPrinter::printU6ImmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printUImmOperand<6>(MI, OpNum, O);
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}
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void SystemZInstPrinter::printS8ImmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printSImmOperand<8>(MI, OpNum, O);
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}
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void SystemZInstPrinter::printU8ImmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printUImmOperand<8>(MI, OpNum, O);
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}
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void SystemZInstPrinter::printU12ImmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printUImmOperand<12>(MI, OpNum, O);
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}
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void SystemZInstPrinter::printS16ImmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printSImmOperand<16>(MI, OpNum, O);
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}
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void SystemZInstPrinter::printU16ImmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printUImmOperand<16>(MI, OpNum, O);
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}
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void SystemZInstPrinter::printS32ImmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printSImmOperand<32>(MI, OpNum, O);
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}
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void SystemZInstPrinter::printU32ImmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printUImmOperand<32>(MI, OpNum, O);
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}
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void SystemZInstPrinter::printU48ImmOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printUImmOperand<48>(MI, OpNum, O);
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}
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void SystemZInstPrinter::printPCRelOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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const MCOperand &MO = MI->getOperand(OpNum);
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if (MO.isImm()) {
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O << "0x";
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O.write_hex(MO.getImm());
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} else
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MO.getExpr()->print(O, &MAI);
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}
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void SystemZInstPrinter::printPCRelTLSOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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// Output the PC-relative operand.
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printPCRelOperand(MI, OpNum, O);
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// Output the TLS marker if present.
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if ((unsigned)OpNum + 1 < MI->getNumOperands()) {
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const MCOperand &MO = MI->getOperand(OpNum + 1);
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const MCSymbolRefExpr &refExp = cast<MCSymbolRefExpr>(*MO.getExpr());
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switch (refExp.getKind()) {
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case MCSymbolRefExpr::VK_TLSGD:
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O << ":tls_gdcall:";
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break;
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case MCSymbolRefExpr::VK_TLSLDM:
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O << ":tls_ldcall:";
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break;
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default:
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llvm_unreachable("Unexpected symbol kind");
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}
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O << refExp.getSymbol().getName();
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}
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}
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void SystemZInstPrinter::printOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printOperand(MI->getOperand(OpNum), &MAI, O);
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}
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void SystemZInstPrinter::printBDAddrOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printAddress(MI->getOperand(OpNum).getReg(),
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MI->getOperand(OpNum + 1).getImm(), 0, O);
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}
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void SystemZInstPrinter::printBDXAddrOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printAddress(MI->getOperand(OpNum).getReg(),
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MI->getOperand(OpNum + 1).getImm(),
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MI->getOperand(OpNum + 2).getReg(), O);
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}
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void SystemZInstPrinter::printBDLAddrOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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unsigned Base = MI->getOperand(OpNum).getReg();
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uint64_t Disp = MI->getOperand(OpNum + 1).getImm();
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uint64_t Length = MI->getOperand(OpNum + 2).getImm();
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O << Disp << '(' << Length;
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if (Base)
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O << ",%" << getRegisterName(Base);
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O << ')';
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}
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void SystemZInstPrinter::printBDRAddrOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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unsigned Base = MI->getOperand(OpNum).getReg();
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uint64_t Disp = MI->getOperand(OpNum + 1).getImm();
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unsigned Length = MI->getOperand(OpNum + 2).getReg();
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O << Disp << "(%" << getRegisterName(Length);
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if (Base)
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O << ",%" << getRegisterName(Base);
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O << ')';
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}
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void SystemZInstPrinter::printBDVAddrOperand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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printAddress(MI->getOperand(OpNum).getReg(),
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MI->getOperand(OpNum + 1).getImm(),
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MI->getOperand(OpNum + 2).getReg(), O);
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}
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void SystemZInstPrinter::printCond4Operand(const MCInst *MI, int OpNum,
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raw_ostream &O) {
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static const char *const CondNames[] = {
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"o", "h", "nle", "l", "nhe", "lh", "ne",
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"e", "nlh", "he", "nl", "le", "nh", "no"
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};
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uint64_t Imm = MI->getOperand(OpNum).getImm();
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assert(Imm > 0 && Imm < 15 && "Invalid condition");
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O << CondNames[Imm - 1];
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}
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@ -1,78 +0,0 @@
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//==- SystemZInstPrinter.h - Convert SystemZ MCInst to assembly --*- C++ -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This class prints a SystemZ MCInst to a .s file.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_SYSTEMZ_INSTPRINTER_SYSTEMZINSTPRINTER_H
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#define LLVM_LIB_TARGET_SYSTEMZ_INSTPRINTER_SYSTEMZINSTPRINTER_H
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#include "llvm/MC/MCInstPrinter.h"
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#include <cstdint>
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namespace llvm {
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class MCOperand;
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class SystemZInstPrinter : public MCInstPrinter {
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public:
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SystemZInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
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const MCRegisterInfo &MRI)
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: MCInstPrinter(MAI, MII, MRI) {}
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// Automatically generated by tblgen.
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void printInstruction(const MCInst *MI, raw_ostream &O);
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static const char *getRegisterName(unsigned RegNo);
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// Print an address with the given base, displacement and index.
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static void printAddress(unsigned Base, int64_t Disp, unsigned Index,
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raw_ostream &O);
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// Print the given operand.
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static void printOperand(const MCOperand &MO, const MCAsmInfo *MAI,
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raw_ostream &O);
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// Override MCInstPrinter.
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void printRegName(raw_ostream &O, unsigned RegNo) const override;
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void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
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const MCSubtargetInfo &STI) override;
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private:
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// Print various types of operand.
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void printOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printBDAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printBDXAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printBDLAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printBDRAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printBDVAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU1ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU2ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU3ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU4ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU6ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printS8ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU8ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU12ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printS16ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU16ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printS32ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU32ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printU48ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printPCRelOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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void printPCRelTLSOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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// Print the mnemonic for a condition-code mask ("ne", "lh", etc.)
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// This forms part of the instruction name rather than the operand list.
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void printCond4Operand(const MCInst *MI, int OpNum, raw_ostream &O);
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_SYSTEMZ_INSTPRINTER_SYSTEMZINSTPRINTER_H
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