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//===- HexagonInstPrinter.cpp - Convert Hexagon MCInst to assembly syntax -===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This class prints an Hexagon MCInst to a .s file.
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//
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//===----------------------------------------------------------------------===//
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#include "HexagonInstPrinter.h"
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#include "HexagonAsmPrinter.h"
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#include "MCTargetDesc/HexagonBaseInfo.h"
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#include "MCTargetDesc/HexagonMCInstrInfo.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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#define DEBUG_TYPE "asm-printer"
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#define GET_INSTRUCTION_NAME
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#include "HexagonGenAsmWriter.inc"
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HexagonInstPrinter::HexagonInstPrinter(MCAsmInfo const &MAI,
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MCInstrInfo const &MII,
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MCRegisterInfo const &MRI)
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: MCInstPrinter(MAI, MII, MRI), MII(MII), HasExtender(false) {
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}
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StringRef HexagonInstPrinter::getOpcodeName(unsigned Opcode) const {
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return MII.getName(Opcode);
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}
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void HexagonInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const {
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O << getRegName(RegNo);
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}
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StringRef HexagonInstPrinter::getRegName(unsigned RegNo) const {
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return getRegisterName(RegNo);
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}
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void HexagonInstPrinter::setExtender(MCInst const &MCI) {
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HasExtender = HexagonMCInstrInfo::isImmext(MCI);
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}
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void HexagonInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
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StringRef Annot, const MCSubtargetInfo &STI) {
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assert(HexagonMCInstrInfo::isBundle(*MI));
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assert(HexagonMCInstrInfo::bundleSize(*MI) <= HEXAGON_PACKET_SIZE);
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assert(HexagonMCInstrInfo::bundleSize(*MI) > 0);
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HasExtender = false;
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for (auto const &I : HexagonMCInstrInfo::bundleInstructions(*MI)) {
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MCInst const &MCI = *I.getInst();
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if (HexagonMCInstrInfo::isDuplex(MII, MCI)) {
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printInstruction(MCI.getOperand(1).getInst(), OS);
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OS << '\v';
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HasExtender = false;
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printInstruction(MCI.getOperand(0).getInst(), OS);
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} else
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printInstruction(&MCI, OS);
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setExtender(MCI);
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OS << "\n";
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}
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auto Separator = "";
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if (HexagonMCInstrInfo::isInnerLoop(*MI)) {
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OS << Separator;
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Separator = " ";
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MCInst ME;
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ME.setOpcode(Hexagon::ENDLOOP0);
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printInstruction(&ME, OS);
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}
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if (HexagonMCInstrInfo::isOuterLoop(*MI)) {
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OS << Separator;
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MCInst ME;
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ME.setOpcode(Hexagon::ENDLOOP1);
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printInstruction(&ME, OS);
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}
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}
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void HexagonInstPrinter::printOperand(MCInst const *MI, unsigned OpNo,
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raw_ostream &O) const {
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if (HexagonMCInstrInfo::getExtendableOp(MII, *MI) == OpNo &&
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(HasExtender || HexagonMCInstrInfo::isConstExtended(MII, *MI)))
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O << "#";
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MCOperand const &MO = MI->getOperand(OpNo);
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if (MO.isReg()) {
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O << getRegisterName(MO.getReg());
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} else if (MO.isExpr()) {
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int64_t Value;
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if (MO.getExpr()->evaluateAsAbsolute(Value))
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O << formatImm(Value);
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else
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O << *MO.getExpr();
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} else {
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llvm_unreachable("Unknown operand");
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}
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}
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void HexagonInstPrinter::printExtOperand(MCInst const *MI, unsigned OpNo,
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raw_ostream &O) const {
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printOperand(MI, OpNo, O);
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}
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void HexagonInstPrinter::printUnsignedImmOperand(MCInst const *MI,
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unsigned OpNo,
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raw_ostream &O) const {
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O << MI->getOperand(OpNo).getImm();
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}
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void HexagonInstPrinter::printNegImmOperand(MCInst const *MI, unsigned OpNo,
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raw_ostream &O) const {
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O << -MI->getOperand(OpNo).getImm();
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}
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void HexagonInstPrinter::printNOneImmOperand(MCInst const *MI, unsigned OpNo,
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raw_ostream &O) const {
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O << -1;
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}
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void HexagonInstPrinter::printGlobalOperand(MCInst const *MI, unsigned OpNo,
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raw_ostream &O) const {
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printOperand(MI, OpNo, O);
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}
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void HexagonInstPrinter::printJumpTable(MCInst const *MI, unsigned OpNo,
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raw_ostream &O) const {
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assert(MI->getOperand(OpNo).isExpr() && "Expecting expression");
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printOperand(MI, OpNo, O);
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}
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void HexagonInstPrinter::printConstantPool(MCInst const *MI, unsigned OpNo,
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raw_ostream &O) const {
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assert(MI->getOperand(OpNo).isExpr() && "Expecting expression");
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printOperand(MI, OpNo, O);
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}
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void HexagonInstPrinter::printBranchOperand(MCInst const *MI, unsigned OpNo,
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raw_ostream &O) const {
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// Branches can take an immediate operand. This is used by the branch
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// selection pass to print $+8, an eight byte displacement from the PC.
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llvm_unreachable("Unknown branch operand.");
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}
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void HexagonInstPrinter::printCallOperand(MCInst const *MI, unsigned OpNo,
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raw_ostream &O) const {}
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void HexagonInstPrinter::printAbsAddrOperand(MCInst const *MI, unsigned OpNo,
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raw_ostream &O) const {}
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void HexagonInstPrinter::printPredicateOperand(MCInst const *MI, unsigned OpNo,
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raw_ostream &O) const {}
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void HexagonInstPrinter::printSymbol(MCInst const *MI, unsigned OpNo,
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raw_ostream &O, bool hi) const {
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assert(MI->getOperand(OpNo).isImm() && "Unknown symbol operand");
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O << '#' << (hi ? "HI" : "LO") << '(';
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O << '#';
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printOperand(MI, OpNo, O);
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O << ')';
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}
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void HexagonInstPrinter::printBrtarget(MCInst const *MI, unsigned OpNo,
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raw_ostream &O) const {
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MCOperand const &MO = MI->getOperand(OpNo);
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assert (MO.isExpr());
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MCExpr const &Expr = *MO.getExpr();
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int64_t Value;
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if (Expr.evaluateAsAbsolute(Value))
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O << format("0x%" PRIx64, Value);
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else {
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if (HasExtender || HexagonMCInstrInfo::isConstExtended(MII, *MI))
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if (HexagonMCInstrInfo::getExtendableOp(MII, *MI) == OpNo)
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O << "##";
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O << Expr;
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}
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}
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