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//===---- HexagonFixupHwLoops.cpp - Fixup HW loops too far from LOOPn. ----===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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// The loop start address in the LOOPn instruction is encoded as a distance
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// from the LOOPn instruction itself. If the start address is too far from
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// the LOOPn instruction, the instruction needs to use a constant extender.
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// This pass will identify and convert such LOOPn instructions to a proper
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// form.
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//===----------------------------------------------------------------------===//
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#include "Hexagon.h"
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#include "HexagonTargetMachine.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/TargetInstrInfo.h"
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#include "llvm/PassSupport.h"
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using namespace llvm;
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static cl::opt<unsigned> MaxLoopRange(
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"hexagon-loop-range", cl::Hidden, cl::init(200),
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cl::desc("Restrict range of loopN instructions (testing only)"));
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namespace llvm {
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FunctionPass *createHexagonFixupHwLoops();
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void initializeHexagonFixupHwLoopsPass(PassRegistry&);
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}
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namespace {
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struct HexagonFixupHwLoops : public MachineFunctionPass {
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public:
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static char ID;
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HexagonFixupHwLoops() : MachineFunctionPass(ID) {
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initializeHexagonFixupHwLoopsPass(*PassRegistry::getPassRegistry());
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}
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bool runOnMachineFunction(MachineFunction &MF) override;
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MachineFunctionProperties getRequiredProperties() const override {
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return MachineFunctionProperties().set(
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MachineFunctionProperties::Property::NoVRegs);
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}
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StringRef getPassName() const override {
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return "Hexagon Hardware Loop Fixup";
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}
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.setPreservesCFG();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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private:
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/// \brief Check the offset between each loop instruction and
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/// the loop basic block to determine if we can use the LOOP instruction
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/// or if we need to set the LC/SA registers explicitly.
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bool fixupLoopInstrs(MachineFunction &MF);
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/// \brief Replace loop instruction with the constant extended
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/// version if the loop label is too far from the loop instruction.
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void useExtLoopInstr(MachineFunction &MF,
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MachineBasicBlock::iterator &MII);
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};
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char HexagonFixupHwLoops::ID = 0;
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}
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INITIALIZE_PASS(HexagonFixupHwLoops, "hwloopsfixup",
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"Hexagon Hardware Loops Fixup", false, false)
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FunctionPass *llvm::createHexagonFixupHwLoops() {
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return new HexagonFixupHwLoops();
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}
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/// \brief Returns true if the instruction is a hardware loop instruction.
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static bool isHardwareLoop(const MachineInstr &MI) {
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return MI.getOpcode() == Hexagon::J2_loop0r ||
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MI.getOpcode() == Hexagon::J2_loop0i ||
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MI.getOpcode() == Hexagon::J2_loop1r ||
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MI.getOpcode() == Hexagon::J2_loop1i;
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}
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bool HexagonFixupHwLoops::runOnMachineFunction(MachineFunction &MF) {
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if (skipFunction(MF.getFunction()))
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return false;
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return fixupLoopInstrs(MF);
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}
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/// \brief For Hexagon, if the loop label is to far from the
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/// loop instruction then we need to set the LC0 and SA0 registers
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/// explicitly instead of using LOOP(start,count). This function
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/// checks the distance, and generates register assignments if needed.
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///
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/// This function makes two passes over the basic blocks. The first
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/// pass computes the offset of the basic block from the start.
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/// The second pass checks all the loop instructions.
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bool HexagonFixupHwLoops::fixupLoopInstrs(MachineFunction &MF) {
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// Offset of the current instruction from the start.
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unsigned InstOffset = 0;
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// Map for each basic block to it's first instruction.
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DenseMap<const MachineBasicBlock *, unsigned> BlockToInstOffset;
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const HexagonInstrInfo *HII =
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static_cast<const HexagonInstrInfo *>(MF.getSubtarget().getInstrInfo());
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// First pass - compute the offset of each basic block.
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for (const MachineBasicBlock &MBB : MF) {
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if (MBB.getAlignment()) {
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// Although we don't know the exact layout of the final code, we need
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// to account for alignment padding somehow. This heuristic pads each
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// aligned basic block according to the alignment value.
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int ByteAlign = (1u << MBB.getAlignment()) - 1;
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InstOffset = (InstOffset + ByteAlign) & ~(ByteAlign);
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}
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BlockToInstOffset[&MBB] = InstOffset;
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for (const MachineInstr &MI : MBB)
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InstOffset += HII->getSize(MI);
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}
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// Second pass - check each loop instruction to see if it needs to be
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// converted.
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bool Changed = false;
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for (MachineBasicBlock &MBB : MF) {
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InstOffset = BlockToInstOffset[&MBB];
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// Loop over all the instructions.
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MachineBasicBlock::iterator MII = MBB.begin();
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MachineBasicBlock::iterator MIE = MBB.end();
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while (MII != MIE) {
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InstOffset += HII->getSize(*MII);
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if (MII->isMetaInstruction()) {
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++MII;
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continue;
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}
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if (isHardwareLoop(*MII)) {
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assert(MII->getOperand(0).isMBB() &&
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"Expect a basic block as loop operand");
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int diff = InstOffset - BlockToInstOffset[MII->getOperand(0).getMBB()];
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if ((unsigned)abs(diff) > MaxLoopRange) {
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useExtLoopInstr(MF, MII);
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MII = MBB.erase(MII);
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Changed = true;
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} else {
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++MII;
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}
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} else {
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++MII;
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}
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}
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}
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return Changed;
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}
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/// \brief Replace loop instructions with the constant extended version.
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void HexagonFixupHwLoops::useExtLoopInstr(MachineFunction &MF,
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MachineBasicBlock::iterator &MII) {
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const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
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MachineBasicBlock *MBB = MII->getParent();
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DebugLoc DL = MII->getDebugLoc();
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MachineInstrBuilder MIB;
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unsigned newOp;
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switch (MII->getOpcode()) {
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case Hexagon::J2_loop0r:
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newOp = Hexagon::J2_loop0rext;
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break;
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case Hexagon::J2_loop0i:
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newOp = Hexagon::J2_loop0iext;
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break;
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case Hexagon::J2_loop1r:
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newOp = Hexagon::J2_loop1rext;
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break;
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case Hexagon::J2_loop1i:
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newOp = Hexagon::J2_loop1iext;
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break;
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default:
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llvm_unreachable("Invalid Hardware Loop Instruction.");
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}
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MIB = BuildMI(*MBB, MII, DL, TII->get(newOp));
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for (unsigned i = 0; i < MII->getNumOperands(); ++i)
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MIB.add(MII->getOperand(i));
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}
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