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//===--- HexagonBranchRelaxation.cpp - Identify and relax long jumps ------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "hexagon-brelax"
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#include "Hexagon.h"
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#include "HexagonInstrInfo.h"
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#include "HexagonSubtarget.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/StringRef.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineOperand.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/Pass.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include <cassert>
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#include <cstdint>
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#include <cstdlib>
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#include <iterator>
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using namespace llvm;
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// Since we have no exact knowledge of code layout, allow some safety buffer
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// for jump target. This is measured in bytes.
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static cl::opt<uint32_t> BranchRelaxSafetyBuffer("branch-relax-safety-buffer",
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cl::init(200), cl::Hidden, cl::ZeroOrMore, cl::desc("safety buffer size"));
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namespace llvm {
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FunctionPass *createHexagonBranchRelaxation();
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void initializeHexagonBranchRelaxationPass(PassRegistry&);
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} // end namespace llvm
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namespace {
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struct HexagonBranchRelaxation : public MachineFunctionPass {
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public:
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static char ID;
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HexagonBranchRelaxation() : MachineFunctionPass(ID) {
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initializeHexagonBranchRelaxationPass(*PassRegistry::getPassRegistry());
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}
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bool runOnMachineFunction(MachineFunction &MF) override;
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StringRef getPassName() const override {
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return "Hexagon Branch Relaxation";
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}
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.setPreservesCFG();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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private:
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const HexagonInstrInfo *HII;
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const HexagonRegisterInfo *HRI;
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bool relaxBranches(MachineFunction &MF);
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void computeOffset(MachineFunction &MF,
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DenseMap<MachineBasicBlock*, unsigned> &BlockToInstOffset);
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bool reGenerateBranch(MachineFunction &MF,
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DenseMap<MachineBasicBlock*, unsigned> &BlockToInstOffset);
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bool isJumpOutOfRange(MachineInstr &MI,
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DenseMap<MachineBasicBlock*, unsigned> &BlockToInstOffset);
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};
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char HexagonBranchRelaxation::ID = 0;
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} // end anonymous namespace
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INITIALIZE_PASS(HexagonBranchRelaxation, "hexagon-brelax",
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"Hexagon Branch Relaxation", false, false)
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FunctionPass *llvm::createHexagonBranchRelaxation() {
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return new HexagonBranchRelaxation();
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}
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bool HexagonBranchRelaxation::runOnMachineFunction(MachineFunction &MF) {
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DEBUG(dbgs() << "****** Hexagon Branch Relaxation ******\n");
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auto &HST = MF.getSubtarget<HexagonSubtarget>();
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HII = HST.getInstrInfo();
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HRI = HST.getRegisterInfo();
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bool Changed = false;
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Changed = relaxBranches(MF);
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return Changed;
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}
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void HexagonBranchRelaxation::computeOffset(MachineFunction &MF,
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DenseMap<MachineBasicBlock*, unsigned> &OffsetMap) {
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// offset of the current instruction from the start.
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unsigned InstOffset = 0;
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for (auto &B : MF) {
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if (B.getAlignment()) {
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// Although we don't know the exact layout of the final code, we need
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// to account for alignment padding somehow. This heuristic pads each
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// aligned basic block according to the alignment value.
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int ByteAlign = (1u << B.getAlignment()) - 1;
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InstOffset = (InstOffset + ByteAlign) & ~(ByteAlign);
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}
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OffsetMap[&B] = InstOffset;
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for (auto &MI : B.instrs())
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InstOffset += HII->getSize(MI);
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}
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}
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/// relaxBranches - For Hexagon, if the jump target/loop label is too far from
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/// the jump/loop instruction then, we need to make sure that we have constant
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/// extenders set for jumps and loops.
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/// There are six iterations in this phase. It's self explanatory below.
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bool HexagonBranchRelaxation::relaxBranches(MachineFunction &MF) {
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// Compute the offset of each basic block
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// offset of the current instruction from the start.
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// map for each instruction to the beginning of the function
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DenseMap<MachineBasicBlock*, unsigned> BlockToInstOffset;
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computeOffset(MF, BlockToInstOffset);
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return reGenerateBranch(MF, BlockToInstOffset);
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}
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/// Check if a given instruction is:
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/// - a jump to a distant target
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/// - that exceeds its immediate range
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/// If both conditions are true, it requires constant extension.
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bool HexagonBranchRelaxation::isJumpOutOfRange(MachineInstr &MI,
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DenseMap<MachineBasicBlock*, unsigned> &BlockToInstOffset) {
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MachineBasicBlock &B = *MI.getParent();
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auto FirstTerm = B.getFirstInstrTerminator();
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if (FirstTerm == B.instr_end())
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return false;
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unsigned InstOffset = BlockToInstOffset[&B];
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unsigned Distance = 0;
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// To save time, estimate exact position of a branch instruction
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// as one at the end of the MBB.
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// Number of instructions times typical instruction size.
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InstOffset += HII->nonDbgBBSize(&B) * HEXAGON_INSTR_SIZE;
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MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
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SmallVector<MachineOperand, 4> Cond;
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// Try to analyze this branch.
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if (HII->analyzeBranch(B, TBB, FBB, Cond, false)) {
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// Could not analyze it. See if this is something we can recognize.
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// If it is a NVJ, it should always have its target in
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// a fixed location.
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if (HII->isNewValueJump(*FirstTerm))
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TBB = FirstTerm->getOperand(HII->getCExtOpNum(*FirstTerm)).getMBB();
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}
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if (TBB && &MI == &*FirstTerm) {
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Distance = std::abs((long long)InstOffset - BlockToInstOffset[TBB])
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+ BranchRelaxSafetyBuffer;
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return !HII->isJumpWithinBranchRange(*FirstTerm, Distance);
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}
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if (FBB) {
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// Look for second terminator.
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auto SecondTerm = std::next(FirstTerm);
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assert(SecondTerm != B.instr_end() &&
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(SecondTerm->isBranch() || SecondTerm->isCall()) &&
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"Bad second terminator");
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if (&MI != &*SecondTerm)
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return false;
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// Analyze the second branch in the BB.
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Distance = std::abs((long long)InstOffset - BlockToInstOffset[FBB])
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+ BranchRelaxSafetyBuffer;
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return !HII->isJumpWithinBranchRange(*SecondTerm, Distance);
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}
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return false;
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}
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bool HexagonBranchRelaxation::reGenerateBranch(MachineFunction &MF,
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DenseMap<MachineBasicBlock*, unsigned> &BlockToInstOffset) {
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bool Changed = false;
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for (auto &B : MF) {
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for (auto &MI : B) {
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if (!MI.isBranch() || !isJumpOutOfRange(MI, BlockToInstOffset))
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continue;
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DEBUG(dbgs() << "Long distance jump. isExtendable("
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<< HII->isExtendable(MI) << ") isConstExtended("
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<< HII->isConstExtended(MI) << ") " << MI);
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// Since we have not merged HW loops relaxation into
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// this code (yet), soften our approach for the moment.
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if (!HII->isExtendable(MI) && !HII->isExtended(MI)) {
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DEBUG(dbgs() << "\tUnderimplemented relax branch instruction.\n");
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} else {
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// Find which operand is expandable.
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int ExtOpNum = HII->getCExtOpNum(MI);
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MachineOperand &MO = MI.getOperand(ExtOpNum);
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// This need to be something we understand. So far we assume all
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// branches have only MBB address as expandable field.
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// If it changes, this will need to be expanded.
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assert(MO.isMBB() && "Branch with unknown expandable field type");
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// Mark given operand as extended.
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MO.addTargetFlag(HexagonII::HMOTF_ConstExtended);
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Changed = true;
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}
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}
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}
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return Changed;
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}
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