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Imported Upstream version 5.18.0.167

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Former-commit-id: 289509151e0fee68a1b591a20c9f109c3c789d3a
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Xamarin Public Jenkins (auto-signing)
2018-10-20 08:25:10 +00:00
parent e19d552987
commit b084638f15
28489 changed files with 184 additions and 3866856 deletions
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77
external/llvm/lib/Target/Hexagon/HexagonBitTracker.h vendored
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@ -1,77 +0,0 @@
//===- HexagonBitTracker.h --------------------------------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONBITTRACKER_H
#define LLVM_LIB_TARGET_HEXAGON_HEXAGONBITTRACKER_H
#include "BitTracker.h"
#include "llvm/ADT/DenseMap.h"
#include <cstdint>
namespace llvm {
class HexagonInstrInfo;
class HexagonRegisterInfo;
class MachineFrameInfo;
class MachineFunction;
class MachineInstr;
class MachineRegisterInfo;
struct HexagonEvaluator : public BitTracker::MachineEvaluator {
using CellMapType = BitTracker::CellMapType;
using RegisterRef = BitTracker::RegisterRef;
using RegisterCell = BitTracker::RegisterCell;
using BranchTargetList = BitTracker::BranchTargetList;
HexagonEvaluator(const HexagonRegisterInfo &tri, MachineRegisterInfo &mri,
const HexagonInstrInfo &tii, MachineFunction &mf);
bool evaluate(const MachineInstr &MI, const CellMapType &Inputs,
CellMapType &Outputs) const override;
bool evaluate(const MachineInstr &BI, const CellMapType &Inputs,
BranchTargetList &Targets, bool &FallsThru) const override;
BitTracker::BitMask mask(unsigned Reg, unsigned Sub) const override;
uint16_t getPhysRegBitWidth(unsigned Reg) const override;
const TargetRegisterClass &composeWithSubRegIndex(
const TargetRegisterClass &RC, unsigned Idx) const override;
MachineFunction &MF;
MachineFrameInfo &MFI;
const HexagonInstrInfo &TII;
private:
bool evaluateLoad(const MachineInstr &MI, const CellMapType &Inputs,
CellMapType &Outputs) const;
bool evaluateFormalCopy(const MachineInstr &MI, const CellMapType &Inputs,
CellMapType &Outputs) const;
unsigned getNextPhysReg(unsigned PReg, unsigned Width) const;
unsigned getVirtRegFor(unsigned PReg) const;
// Type of formal parameter extension.
struct ExtType {
enum { SExt, ZExt };
ExtType() = default;
ExtType(char t, uint16_t w) : Type(t), Width(w) {}
char Type = 0;
uint16_t Width = 0;
};
// Map VR -> extension type.
using RegExtMap = DenseMap<unsigned, ExtType>;
RegExtMap VRX;
};
} // end namespace llvm
#endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONBITTRACKER_H