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external/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
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external/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
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//===-- AMDGPUAsmPrinter.h - Print AMDGPU assembly code ---------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// \brief AMDGPU Assembly printer class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUASMPRINTER_H
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#define LLVM_LIB_TARGET_AMDGPU_AMDGPUASMPRINTER_H
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#include "AMDGPU.h"
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#include "AMDKernelCodeT.h"
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#include "MCTargetDesc/AMDGPUHSAMetadataStreamer.h"
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#include "llvm/ADT/StringRef.h"
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#include "llvm/CodeGen/AsmPrinter.h"
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#include <cstddef>
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#include <cstdint>
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#include <limits>
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#include <memory>
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#include <string>
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#include <vector>
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namespace llvm {
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class AMDGPUTargetStreamer;
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class MCOperand;
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class SISubtarget;
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class AMDGPUAsmPrinter final : public AsmPrinter {
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private:
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// Track resource usage for callee functions.
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struct SIFunctionResourceInfo {
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// Track the number of explicitly used VGPRs. Special registers reserved at
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// the end are tracked separately.
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int32_t NumVGPR = 0;
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int32_t NumExplicitSGPR = 0;
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uint64_t PrivateSegmentSize = 0;
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bool UsesVCC = false;
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bool UsesFlatScratch = false;
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bool HasDynamicallySizedStack = false;
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bool HasRecursion = false;
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int32_t getTotalNumSGPRs(const SISubtarget &ST) const;
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};
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// Track resource usage for kernels / entry functions.
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struct SIProgramInfo {
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// Fields set in PGM_RSRC1 pm4 packet.
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uint32_t VGPRBlocks = 0;
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uint32_t SGPRBlocks = 0;
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uint32_t Priority = 0;
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uint32_t FloatMode = 0;
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uint32_t Priv = 0;
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uint32_t DX10Clamp = 0;
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uint32_t DebugMode = 0;
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uint32_t IEEEMode = 0;
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uint64_t ScratchSize = 0;
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uint64_t ComputePGMRSrc1 = 0;
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// Fields set in PGM_RSRC2 pm4 packet.
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uint32_t LDSBlocks = 0;
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uint32_t ScratchBlocks = 0;
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uint64_t ComputePGMRSrc2 = 0;
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uint32_t NumVGPR = 0;
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uint32_t NumSGPR = 0;
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uint32_t LDSSize = 0;
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bool FlatUsed = false;
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// Number of SGPRs that meets number of waves per execution unit request.
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uint32_t NumSGPRsForWavesPerEU = 0;
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// Number of VGPRs that meets number of waves per execution unit request.
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uint32_t NumVGPRsForWavesPerEU = 0;
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// If ReservedVGPRCount is 0 then must be 0. Otherwise, this is the first
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// fixed VGPR number reserved.
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uint16_t ReservedVGPRFirst = 0;
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// The number of consecutive VGPRs reserved.
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uint16_t ReservedVGPRCount = 0;
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// Fixed SGPR number used to hold wave scratch offset for entire kernel
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// execution, or std::numeric_limits<uint16_t>::max() if the register is not
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// used or not known.
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uint16_t DebuggerWavefrontPrivateSegmentOffsetSGPR =
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std::numeric_limits<uint16_t>::max();
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// Fixed SGPR number of the first 4 SGPRs used to hold scratch V# for entire
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// kernel execution, or std::numeric_limits<uint16_t>::max() if the register
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// is not used or not known.
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uint16_t DebuggerPrivateSegmentBufferSGPR =
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std::numeric_limits<uint16_t>::max();
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// Whether there is recursion, dynamic allocas, indirect calls or some other
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// reason there may be statically unknown stack usage.
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bool DynamicCallStack = false;
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// Bonus information for debugging.
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bool VCCUsed = false;
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SIProgramInfo() = default;
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};
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SIProgramInfo CurrentProgramInfo;
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DenseMap<const Function *, SIFunctionResourceInfo> CallGraphResourceInfo;
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AMDGPU::HSAMD::MetadataStreamer HSAMetadataStream;
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std::map<uint32_t, uint32_t> PALMetadataMap;
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uint64_t getFunctionCodeSize(const MachineFunction &MF) const;
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SIFunctionResourceInfo analyzeResourceUsage(const MachineFunction &MF) const;
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void readPALMetadata(Module &M);
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void getSIProgramInfo(SIProgramInfo &Out, const MachineFunction &MF);
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void getAmdKernelCode(amd_kernel_code_t &Out, const SIProgramInfo &KernelInfo,
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const MachineFunction &MF) const;
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void findNumUsedRegistersSI(const MachineFunction &MF,
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unsigned &NumSGPR,
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unsigned &NumVGPR) const;
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AMDGPU::HSAMD::Kernel::CodeProps::Metadata getHSACodeProps(
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const MachineFunction &MF,
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const SIProgramInfo &ProgramInfo) const;
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AMDGPU::HSAMD::Kernel::DebugProps::Metadata getHSADebugProps(
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const MachineFunction &MF,
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const SIProgramInfo &ProgramInfo) const;
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/// \brief Emit register usage information so that the GPU driver
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/// can correctly setup the GPU state.
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void EmitProgramInfoR600(const MachineFunction &MF);
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void EmitProgramInfoSI(const MachineFunction &MF,
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const SIProgramInfo &KernelInfo);
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void EmitPALMetadata(const MachineFunction &MF,
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const SIProgramInfo &KernelInfo);
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void emitCommonFunctionComments(uint32_t NumVGPR,
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uint32_t NumSGPR,
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uint64_t ScratchSize,
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uint64_t CodeSize);
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public:
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explicit AMDGPUAsmPrinter(TargetMachine &TM,
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std::unique_ptr<MCStreamer> Streamer);
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StringRef getPassName() const override;
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const MCSubtargetInfo* getSTI() const;
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AMDGPUTargetStreamer* getTargetStreamer() const;
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bool doFinalization(Module &M) override;
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bool runOnMachineFunction(MachineFunction &MF) override;
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/// \brief Wrapper for MCInstLowering.lowerOperand() for the tblgen'erated
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/// pseudo lowering.
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bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp) const;
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/// \brief Lower the specified LLVM Constant to an MCExpr.
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/// The AsmPrinter::lowerConstantof does not know how to lower
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/// addrspacecast, therefore they should be lowered by this function.
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const MCExpr *lowerConstant(const Constant *CV) override;
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/// \brief tblgen'erated driver function for lowering simple MI->MC pseudo
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/// instructions.
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bool emitPseudoExpansionLowering(MCStreamer &OutStreamer,
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const MachineInstr *MI);
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/// Implemented in AMDGPUMCInstLower.cpp
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void EmitInstruction(const MachineInstr *MI) override;
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void EmitFunctionBodyStart() override;
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void EmitFunctionEntryLabel() override;
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void EmitBasicBlockStart(const MachineBasicBlock &MBB) const override;
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void EmitGlobalVariable(const GlobalVariable *GV) override;
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void EmitStartOfAsmFile(Module &M) override;
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void EmitEndOfAsmFile(Module &M) override;
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bool isBlockOnlyReachableByFallthrough(
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const MachineBasicBlock *MBB) const override;
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bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant, const char *ExtraCode,
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raw_ostream &O) override;
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protected:
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mutable std::vector<std::string> DisasmLines, HexLines;
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mutable size_t DisasmLineMaxLen;
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AMDGPUAS AMDGPUASI;
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUASMPRINTER_H
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