Imported Upstream version 5.18.0.167

Former-commit-id: 289509151e0fee68a1b591a20c9f109c3c789d3a

external/llvm/lib/CodeGen/SelectionDAG/CMakeLists.txt

@@ -1,30 +0,0 @@
-add_llvm_library(LLVMSelectionDAG
-  DAGCombiner.cpp
-  FastISel.cpp
-  FunctionLoweringInfo.cpp
-  InstrEmitter.cpp
-  LegalizeDAG.cpp
-  LegalizeFloatTypes.cpp
-  LegalizeIntegerTypes.cpp
-  LegalizeTypes.cpp
-  LegalizeTypesGeneric.cpp
-  LegalizeVectorOps.cpp
-  LegalizeVectorTypes.cpp
-  ResourcePriorityQueue.cpp
-  ScheduleDAGFast.cpp
-  ScheduleDAGRRList.cpp
-  ScheduleDAGSDNodes.cpp
-  ScheduleDAGVLIW.cpp
-  SelectionDAGBuilder.cpp
-  SelectionDAG.cpp
-  SelectionDAGAddressAnalysis.cpp
-  SelectionDAGDumper.cpp
-  SelectionDAGISel.cpp
-  SelectionDAGPrinter.cpp
-  SelectionDAGTargetInfo.cpp
-  StatepointLowering.cpp
-  TargetLowering.cpp
-
-  DEPENDS
-  intrinsics_gen
-  )

external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp.REMOVED.git-id

@@ -1 +0,0 @@
-03cb2e310c7eac488cfa8bfbc1d4ea2ef0836cd4

external/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h

@@ -1,145 +0,0 @@
-//===- InstrEmitter.h - Emit MachineInstrs for the SelectionDAG -*- C++ -*--==//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This declares the Emit routines for the SelectionDAG class, which creates
-// MachineInstrs based on the decisions of the SelectionDAG instruction
-// selection.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_LIB_CODEGEN_SELECTIONDAG_INSTREMITTER_H
-#define LLVM_LIB_CODEGEN_SELECTIONDAG_INSTREMITTER_H
-
-#include "llvm/ADT/DenseMap.h"
-#include "llvm/CodeGen/MachineBasicBlock.h"
-#include "llvm/CodeGen/SelectionDAG.h"
-
-namespace llvm {
-
-class MachineInstrBuilder;
-class MCInstrDesc;
-class SDDbgValue;
-
-class LLVM_LIBRARY_VISIBILITY InstrEmitter {
-  MachineFunction *MF;
-  MachineRegisterInfo *MRI;
-  const TargetInstrInfo *TII;
-  const TargetRegisterInfo *TRI;
-  const TargetLowering *TLI;
-
-  MachineBasicBlock *MBB;
-  MachineBasicBlock::iterator InsertPos;
-
-  /// EmitCopyFromReg - Generate machine code for an CopyFromReg node or an
-  /// implicit physical register output.
-  void EmitCopyFromReg(SDNode *Node, unsigned ResNo,
-                       bool IsClone, bool IsCloned,
-                       unsigned SrcReg,
-                       DenseMap<SDValue, unsigned> &VRBaseMap);
-
-  /// getDstOfCopyToRegUse - If the only use of the specified result number of
-  /// node is a CopyToReg, return its destination register. Return 0 otherwise.
-  unsigned getDstOfOnlyCopyToRegUse(SDNode *Node,
-                                    unsigned ResNo) const;
-
-  void CreateVirtualRegisters(SDNode *Node,
-                              MachineInstrBuilder &MIB,
-                              const MCInstrDesc &II,
-                              bool IsClone, bool IsCloned,
-                              DenseMap<SDValue, unsigned> &VRBaseMap);
-
-  /// getVR - Return the virtual register corresponding to the specified result
-  /// of the specified node.
-  unsigned getVR(SDValue Op,
-                 DenseMap<SDValue, unsigned> &VRBaseMap);
-
-  /// AddRegisterOperand - Add the specified register as an operand to the
-  /// specified machine instr. Insert register copies if the register is
-  /// not in the required register class.
-  void AddRegisterOperand(MachineInstrBuilder &MIB,
-                          SDValue Op,
-                          unsigned IIOpNum,
-                          const MCInstrDesc *II,
-                          DenseMap<SDValue, unsigned> &VRBaseMap,
-                          bool IsDebug, bool IsClone, bool IsCloned);
-
-  /// AddOperand - Add the specified operand to the specified machine instr.  II
-  /// specifies the instruction information for the node, and IIOpNum is the
-  /// operand number (in the II) that we are adding. IIOpNum and II are used for
-  /// assertions only.
-  void AddOperand(MachineInstrBuilder &MIB,
-                  SDValue Op,
-                  unsigned IIOpNum,
-                  const MCInstrDesc *II,
-                  DenseMap<SDValue, unsigned> &VRBaseMap,
-                  bool IsDebug, bool IsClone, bool IsCloned);
-
-  /// ConstrainForSubReg - Try to constrain VReg to a register class that
-  /// supports SubIdx sub-registers.  Emit a copy if that isn't possible.
-  /// Return the virtual register to use.
-  unsigned ConstrainForSubReg(unsigned VReg, unsigned SubIdx, MVT VT,
-                              const DebugLoc &DL);
-
-  /// EmitSubregNode - Generate machine code for subreg nodes.
-  ///
-  void EmitSubregNode(SDNode *Node, DenseMap<SDValue, unsigned> &VRBaseMap,
-                      bool IsClone, bool IsCloned);
-
-  /// EmitCopyToRegClassNode - Generate machine code for COPY_TO_REGCLASS nodes.
-  /// COPY_TO_REGCLASS is just a normal copy, except that the destination
-  /// register is constrained to be in a particular register class.
-  ///
-  void EmitCopyToRegClassNode(SDNode *Node,
-                              DenseMap<SDValue, unsigned> &VRBaseMap);
-
-  /// EmitRegSequence - Generate machine code for REG_SEQUENCE nodes.
-  ///
-  void EmitRegSequence(SDNode *Node, DenseMap<SDValue, unsigned> &VRBaseMap,
-                       bool IsClone, bool IsCloned);
-public:
-  /// CountResults - The results of target nodes have register or immediate
-  /// operands first, then an optional chain, and optional flag operands
-  /// (which do not go into the machine instrs.)
-  static unsigned CountResults(SDNode *Node);
-
-  /// EmitDbgValue - Generate machine instruction for a dbg_value node.
-  ///
-  MachineInstr *EmitDbgValue(SDDbgValue *SD,
-                             DenseMap<SDValue, unsigned> &VRBaseMap);
-
-  /// EmitNode - Generate machine code for a node and needed dependencies.
-  ///
-  void EmitNode(SDNode *Node, bool IsClone, bool IsCloned,
-                DenseMap<SDValue, unsigned> &VRBaseMap) {
-    if (Node->isMachineOpcode())
-      EmitMachineNode(Node, IsClone, IsCloned, VRBaseMap);
-    else
-      EmitSpecialNode(Node, IsClone, IsCloned, VRBaseMap);
-  }
-
-  /// getBlock - Return the current basic block.
-  MachineBasicBlock *getBlock() { return MBB; }
-
-  /// getInsertPos - Return the current insertion position.
-  MachineBasicBlock::iterator getInsertPos() { return InsertPos; }
-
-  /// InstrEmitter - Construct an InstrEmitter and set it to start inserting
-  /// at the given position in the given block.
-  InstrEmitter(MachineBasicBlock *mbb, MachineBasicBlock::iterator insertpos);
-
-private:
-  void EmitMachineNode(SDNode *Node, bool IsClone, bool IsCloned,
-                       DenseMap<SDValue, unsigned> &VRBaseMap);
-  void EmitSpecialNode(SDNode *Node, bool IsClone, bool IsCloned,
-                       DenseMap<SDValue, unsigned> &VRBaseMap);
-};
-
-}
-
-#endif

external/llvm/lib/CodeGen/SelectionDAG/LLVMBuild.txt

@@ -1,22 +0,0 @@
-;===- ./lib/CodeGen/SelectionDAG/LLVMBuild.txt -----------------*- Conf -*--===;
-;
-;                     The LLVM Compiler Infrastructure
-;
-; This file is distributed under the University of Illinois Open Source
-; License. See LICENSE.TXT for details.
-;
-;===------------------------------------------------------------------------===;
-;
-; This is an LLVMBuild description file for the components in this subdirectory.
-;
-; For more information on the LLVMBuild system, please see:
-;
-;   http://llvm.org/docs/LLVMBuild.html
-;
-;===------------------------------------------------------------------------===;
-
-[component_0]
-type = Library
-name = SelectionDAG
-parent = CodeGen
-required_libraries = Analysis CodeGen Core MC Support Target TransformUtils

external/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp.REMOVED.git-id

@@ -1 +0,0 @@
-3a2fb0c0a8369f5a163b28c977528570c5467e34

external/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp.REMOVED.git-id

@@ -1 +0,0 @@
-29f0bb475b083ff71bd3e411e84b5d93aaa15e67

external/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp.REMOVED.git-id

@@ -1 +0,0 @@
-df1cbeb927409d58a81aec3d8ca7b0522046c203

external/llvm/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h

@@ -1,120 +0,0 @@
-//===-- llvm/CodeGen/SDNodeDbgValue.h - SelectionDAG dbg_value --*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file declares the SDDbgValue class.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_LIB_CODEGEN_SELECTIONDAG_SDNODEDBGVALUE_H
-#define LLVM_LIB_CODEGEN_SELECTIONDAG_SDNODEDBGVALUE_H
-
-#include "llvm/IR/DebugLoc.h"
-#include "llvm/Support/DataTypes.h"
-#include <utility>
-
-namespace llvm {
-
-class DIVariable;
-class DIExpression;
-class SDNode;
-class Value;
-
-/// Holds the information from a dbg_value node through SDISel.
-/// We do not use SDValue here to avoid including its header.
-class SDDbgValue {
-public:
-  enum DbgValueKind {
-    SDNODE = 0,             ///< Value is the result of an expression.
-    CONST = 1,              ///< Value is a constant.
-    FRAMEIX = 2             ///< Value is contents of a stack location.
-  };
-private:
-  union {
-    struct {
-      SDNode *Node;         ///< Valid for expressions.
-      unsigned ResNo;       ///< Valid for expressions.
-    } s;
-    const Value *Const;     ///< Valid for constants.
-    unsigned FrameIx;       ///< Valid for stack objects.
-  } u;
-  DIVariable *Var;
-  DIExpression *Expr;
-  DebugLoc DL;
-  unsigned Order;
-  enum DbgValueKind kind;
-  bool IsIndirect;
-  bool Invalid = false;
-
-public:
-  /// Constructor for non-constants.
-  SDDbgValue(DIVariable *Var, DIExpression *Expr, SDNode *N, unsigned R,
-             bool indir, DebugLoc dl, unsigned O)
-      : Var(Var), Expr(Expr), DL(std::move(dl)), Order(O), IsIndirect(indir) {
-    kind = SDNODE;
-    u.s.Node = N;
-    u.s.ResNo = R;
-  }
-
-  /// Constructor for constants.
-  SDDbgValue(DIVariable *Var, DIExpression *Expr, const Value *C, DebugLoc dl,
-             unsigned O)
-      : Var(Var), Expr(Expr), DL(std::move(dl)), Order(O), IsIndirect(false) {
-    kind = CONST;
-    u.Const = C;
-  }
-
-  /// Constructor for frame indices.
-  SDDbgValue(DIVariable *Var, DIExpression *Expr, unsigned FI, DebugLoc dl,
-             unsigned O)
-      : Var(Var), Expr(Expr), DL(std::move(dl)), Order(O), IsIndirect(false) {
-    kind = FRAMEIX;
-    u.FrameIx = FI;
-  }
-
-  /// Returns the kind.
-  DbgValueKind getKind() const { return kind; }
-
-  /// Returns the DIVariable pointer for the variable.
-  DIVariable *getVariable() const { return Var; }
-
-  /// Returns the DIExpression pointer for the expression.
-  DIExpression *getExpression() const { return Expr; }
-
-  /// Returns the SDNode* for a register ref
-  SDNode *getSDNode() const { assert (kind==SDNODE); return u.s.Node; }
-
-  /// Returns the ResNo for a register ref
-  unsigned getResNo() const { assert (kind==SDNODE); return u.s.ResNo; }
-
-  /// Returns the Value* for a constant
-  const Value *getConst() const { assert (kind==CONST); return u.Const; }
-
-  /// Returns the FrameIx for a stack object
-  unsigned getFrameIx() const { assert (kind==FRAMEIX); return u.FrameIx; }
-
-  /// Returns whether this is an indirect value.
-  bool isIndirect() const { return IsIndirect; }
-
-  /// Returns the DebugLoc.
-  DebugLoc getDebugLoc() const { return DL; }
-
-  /// Returns the SDNodeOrder.  This is the order of the preceding node in the
-  /// input.
-  unsigned getOrder() const { return Order; }
-
-  /// setIsInvalidated / isInvalidated - Setter / getter of the "Invalidated"
-  /// property. A SDDbgValue is invalid if the SDNode that produces the value is
-  /// deleted.
-  void setIsInvalidated() { Invalid = true; }
-  bool isInvalidated() const { return Invalid; }
-};
-
-} // end llvm namespace
-
-#endif

external/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp.REMOVED.git-id

@@ -1 +0,0 @@
-82337d43c5c9e873183c846ca8ca4bfe79550f3f