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Imported Upstream version 5.18.0.205
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27
external/llvm/test/Transforms/LoadStoreVectorizer/X86/correct-order.ll
vendored
Normal file
27
external/llvm/test/Transforms/LoadStoreVectorizer/X86/correct-order.ll
vendored
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@ -0,0 +1,27 @@
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; RUN: opt -mtriple=x86_64-unknown-linux-gnu -load-store-vectorizer -S -o - %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
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; CHECK-LABEL: @correct_order(
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; CHECK: [[LOAD_PTR:%[0-9]+]] = bitcast i32* %next.gep1
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; CHECK: load <2 x i32>, <2 x i32>* [[LOAD_PTR]]
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; CHECK: load i32, i32* %next.gep
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; CHECK: [[STORE_PTR:%[0-9]+]] = bitcast i32* %next.gep
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; CHECK: store <2 x i32>
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; CHECK-SAME: <2 x i32>* [[STORE_PTR]]
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; CHECK: load i32, i32* %next.gep1
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define void @correct_order(i32* noalias %ptr) {
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%next.gep = getelementptr i32, i32* %ptr, i64 0
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%next.gep1 = getelementptr i32, i32* %ptr, i64 1
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%next.gep2 = getelementptr i32, i32* %ptr, i64 2
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%l1 = load i32, i32* %next.gep1, align 4
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%l2 = load i32, i32* %next.gep, align 4
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store i32 0, i32* %next.gep1, align 4
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store i32 0, i32* %next.gep, align 4
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%l3 = load i32, i32* %next.gep1, align 4
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%l4 = load i32, i32* %next.gep2, align 4
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ret void
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}
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3
external/llvm/test/Transforms/LoadStoreVectorizer/X86/lit.local.cfg
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Normal file
3
external/llvm/test/Transforms/LoadStoreVectorizer/X86/lit.local.cfg
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@ -0,0 +1,3 @@
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if not 'X86' in config.root.targets:
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config.unsupported = True
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38
external/llvm/test/Transforms/LoadStoreVectorizer/X86/load-width.ll
vendored
Normal file
38
external/llvm/test/Transforms/LoadStoreVectorizer/X86/load-width.ll
vendored
Normal file
@ -0,0 +1,38 @@
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; RUN: opt -mtriple=x86_64-unknown-linux-gnu -load-store-vectorizer -mcpu haswell -S -o - %s | FileCheck --check-prefix=CHECK-HSW %s
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; RUN: opt -mtriple=x86_64-unknown-linux-gnu -load-store-vectorizer -mcpu knl -S -o - %s | FileCheck --check-prefix=CHECK-KNL %s
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define <8 x double> @loadwidth_insert_extract(double* %ptr) {
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%a = bitcast double* %ptr to <2 x double> *
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%b = getelementptr <2 x double>, <2 x double>* %a, i32 1
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%c = getelementptr <2 x double>, <2 x double>* %a, i32 2
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%d = getelementptr <2 x double>, <2 x double>* %a, i32 3
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; CHECK-HSW: load <4 x double>
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; CHECK-HSW: load <4 x double>
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; CHECK-HSW-NOT: load
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; CHECK-KNL: load <8 x double>
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; CHECK-KNL-NOT: load
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%la = load <2 x double>, <2 x double> *%a
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%lb = load <2 x double>, <2 x double> *%b
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%lc = load <2 x double>, <2 x double> *%c
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%ld = load <2 x double>, <2 x double> *%d
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; Scalarize everything - Explicitly not a shufflevector to test this code
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; path in the LSV
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%v1 = extractelement <2 x double> %la, i32 0
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%v2 = extractelement <2 x double> %la, i32 1
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%v3 = extractelement <2 x double> %lb, i32 0
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%v4 = extractelement <2 x double> %lb, i32 1
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%v5 = extractelement <2 x double> %lc, i32 0
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%v6 = extractelement <2 x double> %lc, i32 1
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%v7 = extractelement <2 x double> %ld, i32 0
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%v8 = extractelement <2 x double> %ld, i32 1
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; Make a vector again
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%i1 = insertelement <8 x double> undef, double %v1, i32 0
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%i2 = insertelement <8 x double> %i1, double %v2, i32 1
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%i3 = insertelement <8 x double> %i2, double %v3, i32 2
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%i4 = insertelement <8 x double> %i3, double %v4, i32 3
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%i5 = insertelement <8 x double> %i4, double %v5, i32 4
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%i6 = insertelement <8 x double> %i5, double %v6, i32 5
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%i7 = insertelement <8 x double> %i6, double %v7, i32 6
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%i8 = insertelement <8 x double> %i7, double %v8, i32 7
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ret <8 x double> %i8
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}
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46
external/llvm/test/Transforms/LoadStoreVectorizer/X86/merge-tbaa.ll
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Normal file
46
external/llvm/test/Transforms/LoadStoreVectorizer/X86/merge-tbaa.ll
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@ -0,0 +1,46 @@
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; RUN: opt -mtriple=x86_64-unknown-linux-gnu -load-store-vectorizer -S < %s | \
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; RUN: FileCheck %s
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;
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; The GPU Load & Store Vectorizer may merge differently-typed accesses into a
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; single instruction. This test checks that we merge TBAA tags for such
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; accesses correctly.
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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; struct S {
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; float f;
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; int i;
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; };
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%struct.S = type { float, i32 }
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; float foo(S *p) {
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; p->f -= 1;
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; p->i -= 1;
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; return p->f;
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; }
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define float @foo(%struct.S* %p) {
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entry:
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; CHECK-LABEL: foo
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; CHECK: load <2 x i32>, {{.*}}, !tbaa [[TAG_char:!.*]]
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; CHECK: store <2 x i32> {{.*}}, !tbaa [[TAG_char]]
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%f = getelementptr inbounds %struct.S, %struct.S* %p, i64 0, i32 0
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%0 = load float, float* %f, align 4, !tbaa !2
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%sub = fadd float %0, -1.000000e+00
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store float %sub, float* %f, align 4, !tbaa !2
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%i = getelementptr inbounds %struct.S, %struct.S* %p, i64 0, i32 1
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%1 = load i32, i32* %i, align 4, !tbaa !8
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%sub1 = add nsw i32 %1, -1
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store i32 %sub1, i32* %i, align 4, !tbaa !8
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ret float %sub
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}
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!2 = !{!3, !4, i64 0}
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!3 = !{!"_ZTS1S", !4, i64 0, !7, i64 4}
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!4 = !{!"float", !5, i64 0}
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!5 = !{!"omnipotent char", !6, i64 0}
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!6 = !{!"Simple C++ TBAA"}
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!7 = !{!"int", !5, i64 0}
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!8 = !{!3, !7, i64 4}
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; CHECK-DAG: [[TYPE_char:!.*]] = !{!"omnipotent char", {{.*}}, i64 0}
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; CHECK-FAG: [[TAG_char]] = !{[[TYPE_char]], [[TYPE_char]], i64 0}
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30
external/llvm/test/Transforms/LoadStoreVectorizer/X86/non-byte-size.ll
vendored
Normal file
30
external/llvm/test/Transforms/LoadStoreVectorizer/X86/non-byte-size.ll
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@ -0,0 +1,30 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -load-store-vectorizer -S -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
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%rec = type { i32, i28 }
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; We currently do not optimize this scenario.
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; But we verify that we no longer crash when compiling this.
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define void @test1(%rec* %out, %rec* %in) {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: [[IN1:%.*]] = getelementptr [[REC:%.*]], %rec* [[IN:%.*]], i16 0, i32 0
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; CHECK-NEXT: [[IN2:%.*]] = getelementptr [[REC]], %rec* [[IN]], i16 0, i32 1
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; CHECK-NEXT: [[VAL1:%.*]] = load i32, i32* [[IN1]], align 8
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; CHECK-NEXT: [[VAL2:%.*]] = load i28, i28* [[IN2]]
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; CHECK-NEXT: [[OUT1:%.*]] = getelementptr [[REC]], %rec* [[OUT:%.*]], i16 0, i32 0
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; CHECK-NEXT: [[OUT2:%.*]] = getelementptr [[REC]], %rec* [[OUT]], i16 0, i32 1
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; CHECK-NEXT: store i32 [[VAL1]], i32* [[OUT1]], align 8
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; CHECK-NEXT: store i28 [[VAL2]], i28* [[OUT2]]
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; CHECK-NEXT: ret void
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;
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%in1 = getelementptr %rec, %rec* %in, i16 0, i32 0
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%in2 = getelementptr %rec, %rec* %in, i16 0, i32 1
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%val1 = load i32, i32* %in1, align 8
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%val2 = load i28, i28* %in2
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%out1 = getelementptr %rec, %rec* %out, i16 0, i32 0
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%out2 = getelementptr %rec, %rec* %out, i16 0, i32 1
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store i32 %val1, i32* %out1, align 8
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store i28 %val2, i28* %out2
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ret void
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}
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28
external/llvm/test/Transforms/LoadStoreVectorizer/X86/preserve-order32.ll
vendored
Normal file
28
external/llvm/test/Transforms/LoadStoreVectorizer/X86/preserve-order32.ll
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@ -0,0 +1,28 @@
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; RUN: opt -mtriple=x86-linux -load-store-vectorizer -S -o - %s | FileCheck %s
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target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-p24:64:64-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
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%struct.buffer_t = type { i32, i8* }
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; Check an i32 and i8* get vectorized, and that the two accesses
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; (load into buff.val and store to buff.p) preserve their order.
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; Vectorized loads should be inserted at the position of the first load,
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; and instructions which were between the first and last load should be
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; reordered preserving their relative order inasmuch as possible.
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; CHECK-LABEL: @preserve_order_32(
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; CHECK: load <2 x i32>
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; CHECK: %buff.val = load i8
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; CHECK: store i8 0
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define void @preserve_order_32(%struct.buffer_t* noalias %buff) #0 {
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entry:
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%tmp1 = getelementptr inbounds %struct.buffer_t, %struct.buffer_t* %buff, i32 0, i32 1
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%buff.p = load i8*, i8** %tmp1
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%buff.val = load i8, i8* %buff.p
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store i8 0, i8* %buff.p, align 8
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%tmp0 = getelementptr inbounds %struct.buffer_t, %struct.buffer_t* %buff, i32 0, i32 0
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%buff.int = load i32, i32* %tmp0, align 8
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ret void
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}
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attributes #0 = { nounwind }
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77
external/llvm/test/Transforms/LoadStoreVectorizer/X86/preserve-order64.ll
vendored
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77
external/llvm/test/Transforms/LoadStoreVectorizer/X86/preserve-order64.ll
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@ -0,0 +1,77 @@
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; RUN: opt -mtriple=x86_64-unknown-linux-gnu -load-store-vectorizer -S -o - %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
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%struct.buffer_t = type { i64, i8* }
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%struct.nested.buffer = type { %struct.buffer_t, %struct.buffer_t }
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; Check an i64 and i8* get vectorized, and that the two accesses
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; (load into buff.val and store to buff.p) preserve their order.
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; Vectorized loads should be inserted at the position of the first load,
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; and instructions which were between the first and last load should be
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; reordered preserving their relative order inasmuch as possible.
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; CHECK-LABEL: @preserve_order_64(
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; CHECK: load <2 x i64>
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; CHECK: %buff.val = load i8
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; CHECK: store i8 0
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define void @preserve_order_64(%struct.buffer_t* noalias %buff) #0 {
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entry:
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%tmp1 = getelementptr inbounds %struct.buffer_t, %struct.buffer_t* %buff, i64 0, i32 1
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%buff.p = load i8*, i8** %tmp1
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%buff.val = load i8, i8* %buff.p
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store i8 0, i8* %buff.p, align 8
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%tmp0 = getelementptr inbounds %struct.buffer_t, %struct.buffer_t* %buff, i64 0, i32 0
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%buff.int = load i64, i64* %tmp0, align 16
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ret void
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}
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; Check reordering recurses correctly.
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; CHECK-LABEL: @transitive_reorder(
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; CHECK: load <2 x i64>
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; CHECK: %buff.val = load i8
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; CHECK: store i8 0
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define void @transitive_reorder(%struct.buffer_t* noalias %buff, %struct.nested.buffer* noalias %nest) #0 {
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entry:
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%nest0_0 = getelementptr inbounds %struct.nested.buffer, %struct.nested.buffer* %nest, i64 0, i32 0
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%tmp1 = getelementptr inbounds %struct.buffer_t, %struct.buffer_t* %nest0_0, i64 0, i32 1
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%buff.p = load i8*, i8** %tmp1
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%buff.val = load i8, i8* %buff.p
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store i8 0, i8* %buff.p, align 8
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%nest1_0 = getelementptr inbounds %struct.nested.buffer, %struct.nested.buffer* %nest, i64 0, i32 0
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%tmp0 = getelementptr inbounds %struct.buffer_t, %struct.buffer_t* %nest1_0, i64 0, i32 0
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%buff.int = load i64, i64* %tmp0, align 16
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ret void
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}
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; Check for no vectorization over phi node
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; CHECK-LABEL: @no_vect_phi(
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; CHECK: load i8*
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; CHECK: load i8
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; CHECK: store i8 0
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; CHECK: load i64
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define void @no_vect_phi(i32* noalias %ptr, %struct.buffer_t* noalias %buff) {
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entry:
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%tmp1 = getelementptr inbounds %struct.buffer_t, %struct.buffer_t* %buff, i64 0, i32 1
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%buff.p = load i8*, i8** %tmp1
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%buff.val = load i8, i8* %buff.p
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store i8 0, i8* %buff.p, align 8
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br label %"for something"
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"for something":
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%index = phi i64 [ 0, %entry ], [ %index.next, %"for something" ]
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%tmp0 = getelementptr inbounds %struct.buffer_t, %struct.buffer_t* %buff, i64 0, i32 0
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%buff.int = load i64, i64* %tmp0, align 16
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%index.next = add i64 %index, 8
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%cmp_res = icmp eq i64 %index.next, 8
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br i1 %cmp_res, label %ending, label %"for something"
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ending:
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ret void
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}
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attributes #0 = { nounwind }
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117
external/llvm/test/Transforms/LoadStoreVectorizer/X86/subchain-interleaved.ll
vendored
Normal file
117
external/llvm/test/Transforms/LoadStoreVectorizer/X86/subchain-interleaved.ll
vendored
Normal file
@ -0,0 +1,117 @@
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; RUN: opt -mtriple=x86_64-unknown-linux-gnu -load-store-vectorizer -S -o - %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
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; Vectorized subsets of the load/store chains in the presence of
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; interleaved loads/stores
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; CHECK-LABEL: @interleave_2L_2S(
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; CHECK: load <2 x i32>
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; CHECK: load i32
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; CHECK: store <2 x i32>
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; CHECK: load i32
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define void @interleave_2L_2S(i32* noalias %ptr) {
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%next.gep = getelementptr i32, i32* %ptr, i64 0
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%next.gep1 = getelementptr i32, i32* %ptr, i64 1
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%next.gep2 = getelementptr i32, i32* %ptr, i64 2
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%l1 = load i32, i32* %next.gep1, align 4
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%l2 = load i32, i32* %next.gep, align 4
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store i32 0, i32* %next.gep1, align 4
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store i32 0, i32* %next.gep, align 4
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%l3 = load i32, i32* %next.gep1, align 4
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%l4 = load i32, i32* %next.gep2, align 4
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ret void
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}
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; CHECK-LABEL: @interleave_3L_2S_1L(
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; CHECK: load <3 x i32>
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; CHECK: store <2 x i32>
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; CHECK: load i32
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define void @interleave_3L_2S_1L(i32* noalias %ptr) {
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%next.gep = getelementptr i32, i32* %ptr, i64 0
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%next.gep1 = getelementptr i32, i32* %ptr, i64 1
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%next.gep2 = getelementptr i32, i32* %ptr, i64 2
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%l2 = load i32, i32* %next.gep, align 4
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%l1 = load i32, i32* %next.gep1, align 4
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store i32 0, i32* %next.gep1, align 4
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store i32 0, i32* %next.gep, align 4
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%l3 = load i32, i32* %next.gep1, align 4
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%l4 = load i32, i32* %next.gep2, align 4
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ret void
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}
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; CHECK-LABEL: @chain_suffix(
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; CHECK: load i32
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; CHECK: store <2 x i32>
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; CHECK: load <2 x i32>
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define void @chain_suffix(i32* noalias %ptr) {
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%next.gep = getelementptr i32, i32* %ptr, i64 0
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%next.gep1 = getelementptr i32, i32* %ptr, i64 1
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%next.gep2 = getelementptr i32, i32* %ptr, i64 2
|
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%l2 = load i32, i32* %next.gep, align 4
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store i32 0, i32* %next.gep1, align 4
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store i32 0, i32* %next.gep, align 4
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%l3 = load i32, i32* %next.gep1, align 4
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%l4 = load i32, i32* %next.gep2, align 4
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ret void
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}
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; CHECK-LABEL: @chain_prefix_suffix(
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; CHECK: load <2 x i32>
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; CHECK: store <2 x i32>
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; CHECK: load <3 x i32>
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define void @chain_prefix_suffix(i32* noalias %ptr) {
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%next.gep = getelementptr i32, i32* %ptr, i64 0
|
||||
%next.gep1 = getelementptr i32, i32* %ptr, i64 1
|
||||
%next.gep2 = getelementptr i32, i32* %ptr, i64 2
|
||||
%next.gep3 = getelementptr i32, i32* %ptr, i64 3
|
||||
|
||||
%l1 = load i32, i32* %next.gep, align 4
|
||||
%l2 = load i32, i32* %next.gep1, align 4
|
||||
store i32 0, i32* %next.gep1, align 4
|
||||
store i32 0, i32* %next.gep2, align 4
|
||||
%l3 = load i32, i32* %next.gep1, align 4
|
||||
%l4 = load i32, i32* %next.gep2, align 4
|
||||
%l5 = load i32, i32* %next.gep3, align 4
|
||||
|
||||
ret void
|
||||
}
|
||||
|
||||
; FIXME: If the chain is too long and TLI says misaligned is not fast,
|
||||
; then LSV fails to vectorize anything in that chain.
|
||||
; To reproduce below, add a tmp5 (ptr+4) and load tmp5 into l6 and l7.
|
||||
|
||||
; CHECK-LABEL: @interleave_get_longest
|
||||
; CHECK: load <3 x i32>
|
||||
; CHECK: load i32
|
||||
; CHECK: store <2 x i32> zeroinitializer
|
||||
; CHECK: load i32
|
||||
; CHECK: load i32
|
||||
; CHECK: load i32
|
||||
|
||||
define void @interleave_get_longest(i32* noalias %ptr) {
|
||||
%tmp1 = getelementptr i32, i32* %ptr, i64 0
|
||||
%tmp2 = getelementptr i32, i32* %ptr, i64 1
|
||||
%tmp3 = getelementptr i32, i32* %ptr, i64 2
|
||||
%tmp4 = getelementptr i32, i32* %ptr, i64 3
|
||||
|
||||
%l1 = load i32, i32* %tmp2, align 4
|
||||
%l2 = load i32, i32* %tmp1, align 4
|
||||
store i32 0, i32* %tmp2, align 4
|
||||
store i32 0, i32* %tmp1, align 4
|
||||
%l3 = load i32, i32* %tmp2, align 4
|
||||
%l4 = load i32, i32* %tmp3, align 4
|
||||
%l5 = load i32, i32* %tmp4, align 4
|
||||
%l6 = load i32, i32* %tmp4, align 4
|
||||
%l7 = load i32, i32* %tmp4, align 4
|
||||
|
||||
ret void
|
||||
}
|
||||
Reference in New Issue
Block a user