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Imported Upstream version 5.18.0.205

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Former-commit-id: 7f59f7e792705db773f1caecdaa823092f4e2927
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Xamarin Public Jenkins (auto-signing)
2018-11-16 08:20:38 +00:00
parent 5cd5df71cc
commit 8e12397d70
28486 changed files with 3867013 additions and 66 deletions
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26
external/llvm/test/MC/ARM/d16.s vendored Normal file
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@ RUN: llvm-mc < %s -triple thumbv7-unknown-unknown -show-encoding -mattr=+vfp4,-d16 2>&1 | FileCheck %s --check-prefix=D32
@ RUN: not llvm-mc < %s -triple thumbv7-unknown-unknown -show-encoding -mattr=+vfp4,+d16 2>&1 | FileCheck %s --check-prefix=D16
@ D32-NOT: error:
@ D16: error: invalid instruction, any one of the following would fix this:
@ D16-NEXT: vadd.f64 d1, d2, d16
@ D16: note: operand must be a register in range [d0, d15]
@ D16: note: too many operands for instruction
vadd.f64 d1, d2, d16
@ D16: error: operand must be a register in range [d0, d15]
@ D16-NEXT: vadd.f64 d1, d17, d6
vadd.f64 d1, d17, d6
@ D16: error: operand must be a register in range [d0, d15]
@ D16-NEXT: vadd.f64 d19, d7, d6
vadd.f64 d19, d7, d6
@ D16: error: operand must be a register in range [d0, d15]
@ D16-NEXT: vcvt.f64.f32 d22, s4
vcvt.f64.f32 d22, s4
@ D16: error: operand must be a register in range [d0, d15]
@ D16-NEXT: vcvt.f32.f64 s26, d30
vcvt.f32.f64 s26, d30