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external/llvm/lib/CodeGen/GlobalISel/Legalizer.cpp
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186
external/llvm/lib/CodeGen/GlobalISel/Legalizer.cpp
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//===-- llvm/CodeGen/GlobalISel/Legalizer.cpp -----------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file This file implements the LegalizerHelper class to legalize individual
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/// instructions and the LegalizePass wrapper pass for the primary
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/// legalization.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/GlobalISel/Legalizer.h"
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#include "llvm/ADT/PostOrderIterator.h"
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#include "llvm/ADT/SetVector.h"
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#include "llvm/CodeGen/GlobalISel/GISelWorkList.h"
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#include "llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h"
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#include "llvm/CodeGen/GlobalISel/LegalizerHelper.h"
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#include "llvm/CodeGen/GlobalISel/Utils.h"
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#include "llvm/CodeGen/MachineOptimizationRemarkEmitter.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/TargetPassConfig.h"
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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#include "llvm/Support/Debug.h"
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#include <iterator>
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#define DEBUG_TYPE "legalizer"
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using namespace llvm;
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char Legalizer::ID = 0;
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INITIALIZE_PASS_BEGIN(Legalizer, DEBUG_TYPE,
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"Legalize the Machine IR a function's Machine IR", false,
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false)
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INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
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INITIALIZE_PASS_END(Legalizer, DEBUG_TYPE,
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"Legalize the Machine IR a function's Machine IR", false,
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false)
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Legalizer::Legalizer() : MachineFunctionPass(ID) {
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initializeLegalizerPass(*PassRegistry::getPassRegistry());
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}
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void Legalizer::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addRequired<TargetPassConfig>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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void Legalizer::init(MachineFunction &MF) {
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}
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static bool isArtifact(const MachineInstr &MI) {
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switch (MI.getOpcode()) {
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default:
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return false;
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case TargetOpcode::G_TRUNC:
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case TargetOpcode::G_ZEXT:
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case TargetOpcode::G_ANYEXT:
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case TargetOpcode::G_SEXT:
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case TargetOpcode::G_MERGE_VALUES:
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case TargetOpcode::G_UNMERGE_VALUES:
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return true;
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}
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}
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bool Legalizer::runOnMachineFunction(MachineFunction &MF) {
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// If the ISel pipeline failed, do not bother running that pass.
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if (MF.getProperties().hasProperty(
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MachineFunctionProperties::Property::FailedISel))
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return false;
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DEBUG(dbgs() << "Legalize Machine IR for: " << MF.getName() << '\n');
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init(MF);
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const TargetPassConfig &TPC = getAnalysis<TargetPassConfig>();
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MachineOptimizationRemarkEmitter MORE(MF, /*MBFI=*/nullptr);
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LegalizerHelper Helper(MF);
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const size_t NumBlocks = MF.size();
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MachineRegisterInfo &MRI = MF.getRegInfo();
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// Populate Insts
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GISelWorkList<256> InstList;
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GISelWorkList<128> ArtifactList;
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ReversePostOrderTraversal<MachineFunction *> RPOT(&MF);
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// Perform legalization bottom up so we can DCE as we legalize.
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// Traverse BB in RPOT and within each basic block, add insts top down,
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// so when we pop_back_val in the legalization process, we traverse bottom-up.
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for (auto *MBB : RPOT) {
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if (MBB->empty())
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continue;
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for (MachineInstr &MI : *MBB) {
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// Only legalize pre-isel generic instructions: others don't have types
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// and are assumed to be legal.
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if (!isPreISelGenericOpcode(MI.getOpcode()))
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continue;
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if (isArtifact(MI))
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ArtifactList.insert(&MI);
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else
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InstList.insert(&MI);
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}
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}
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Helper.MIRBuilder.recordInsertions([&](MachineInstr *MI) {
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// Only legalize pre-isel generic instructions.
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// Legalization process could generate Target specific pseudo
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// instructions with generic types. Don't record them
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if (isPreISelGenericOpcode(MI->getOpcode())) {
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if (isArtifact(*MI))
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ArtifactList.insert(MI);
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else
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InstList.insert(MI);
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}
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DEBUG(dbgs() << ".. .. New MI: " << *MI;);
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});
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const LegalizerInfo &LInfo(Helper.getLegalizerInfo());
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LegalizationArtifactCombiner ArtCombiner(Helper.MIRBuilder, MF.getRegInfo(), LInfo);
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auto RemoveDeadInstFromLists = [&InstList,
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&ArtifactList](MachineInstr *DeadMI) {
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InstList.remove(DeadMI);
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ArtifactList.remove(DeadMI);
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};
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bool Changed = false;
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do {
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while (!InstList.empty()) {
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MachineInstr &MI = *InstList.pop_back_val();
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assert(isPreISelGenericOpcode(MI.getOpcode()) && "Expecting generic opcode");
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if (isTriviallyDead(MI, MRI)) {
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DEBUG(dbgs() << MI << "Is dead; erasing.\n");
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MI.eraseFromParentAndMarkDBGValuesForRemoval();
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continue;
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}
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// Do the legalization for this instruction.
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auto Res = Helper.legalizeInstrStep(MI);
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// Error out if we couldn't legalize this instruction. We may want to
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// fall back to DAG ISel instead in the future.
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if (Res == LegalizerHelper::UnableToLegalize) {
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Helper.MIRBuilder.stopRecordingInsertions();
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reportGISelFailure(MF, TPC, MORE, "gisel-legalize",
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"unable to legalize instruction", MI);
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return false;
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}
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Changed |= Res == LegalizerHelper::Legalized;
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}
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while (!ArtifactList.empty()) {
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MachineInstr &MI = *ArtifactList.pop_back_val();
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assert(isPreISelGenericOpcode(MI.getOpcode()) && "Expecting generic opcode");
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if (isTriviallyDead(MI, MRI)) {
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DEBUG(dbgs() << MI << "Is dead; erasing.\n");
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RemoveDeadInstFromLists(&MI);
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MI.eraseFromParentAndMarkDBGValuesForRemoval();
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continue;
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}
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SmallVector<MachineInstr *, 4> DeadInstructions;
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if (ArtCombiner.tryCombineInstruction(MI, DeadInstructions)) {
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for (auto *DeadMI : DeadInstructions) {
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DEBUG(dbgs() << ".. Erasing Dead Instruction " << *DeadMI);
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RemoveDeadInstFromLists(DeadMI);
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DeadMI->eraseFromParentAndMarkDBGValuesForRemoval();
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}
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Changed = true;
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continue;
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}
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// If this was not an artifact (that could be combined away), this might
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// need special handling. Add it to InstList, so when it's processed
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// there, it has to be legal or specially handled.
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else
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InstList.insert(&MI);
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}
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} while (!InstList.empty());
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// For now don't support if new blocks are inserted - we would need to fix the
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// outerloop for that.
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if (MF.size() != NumBlocks) {
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MachineOptimizationRemarkMissed R("gisel-legalize", "GISelFailure",
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MF.getFunction().getSubprogram(),
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/*MBB=*/nullptr);
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R << "inserting blocks is not supported yet";
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reportGISelFailure(MF, TPC, MORE, R);
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return false;
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}
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return Changed;
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}
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