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Imported Upstream version 6.0.0.172
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external/llvm/test/CodeGen/Mips/mirparser/target-flags-static-tls.mir
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236
external/llvm/test/CodeGen/Mips/mirparser/target-flags-static-tls.mir
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# RUN: llc -march=mips64 -target-abi n64 -start-before=expand-isel-pseudos \
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# RUN: -stop-after=expand-isel-pseudos -relocation-model=static -o /dev/null %s
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# A simple test to show that we can parse the target specific flags: highest,
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# higher, hi, lo, tprel-lo, tprel-hi, gpoff-hi, gpoff-lo, gottprel.
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--- |
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@v = global i32 0, align 4
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@k = thread_local global i32 0, align 4
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@j = external thread_local global i32, align 4
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@__tls_guard = internal thread_local global i1 false, align 1
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declare i32 @_Z1gi(i32 signext)
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declare extern_weak void @_ZTH1j()
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define i32 @_Z2k1i(i32 signext %asd) {
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entry:
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%call = tail call i32 @_Z1gi(i32 signext %asd)
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%add = add nsw i32 %call, %asd
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%0 = load i32, i32* @v, align 4
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%add1 = add nsw i32 %add, %0
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%.b.i.i = load i1, i1* @__tls_guard, align 1
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br i1 %.b.i.i, label %entry._ZTW1k.exit_crit_edge, label %init.i.i
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entry._ZTW1k.exit_crit_edge:
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%.pre = load i32, i32* @k, align 4
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br label %_ZTW1k.exit
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init.i.i:
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store i1 true, i1* @__tls_guard, align 1
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%call.i.i.i = tail call i32 @_Z1gi(i32 signext 3)
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store i32 %call.i.i.i, i32* @k, align 4
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br label %_ZTW1k.exit
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_ZTW1k.exit:
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%1 = phi i32 [ %.pre, %entry._ZTW1k.exit_crit_edge ], [ %call.i.i.i, %init.i.i ]
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%add2 = add nsw i32 %add1, %1
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br i1 icmp ne (void ()* @_ZTH1j, void ()* null), label %2, label %_ZTW1j.exit
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; <label>:2:
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tail call void @_ZTH1j()
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br label %_ZTW1j.exit
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_ZTW1j.exit:
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%3 = load i32, i32* @j, align 4
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%add3 = add nsw i32 %add2, %3
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ret i32 %add3
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}
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...
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---
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name: _Z2k1i
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alignment: 3
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gpr32, preferred-register: '' }
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- { id: 1, class: gpr32, preferred-register: '' }
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- { id: 2, class: gpr32, preferred-register: '' }
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- { id: 3, class: gpr32, preferred-register: '' }
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- { id: 4, class: gpr32, preferred-register: '' }
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- { id: 5, class: gpr64, preferred-register: '' }
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- { id: 6, class: gpr32, preferred-register: '' }
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- { id: 7, class: gpr32, preferred-register: '' }
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- { id: 8, class: gpr32, preferred-register: '' }
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- { id: 9, class: gpr64, preferred-register: '' }
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- { id: 10, class: gpr64, preferred-register: '' }
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- { id: 11, class: gpr64, preferred-register: '' }
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- { id: 12, class: gpr64, preferred-register: '' }
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- { id: 13, class: gpr64, preferred-register: '' }
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- { id: 14, class: gpr32, preferred-register: '' }
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- { id: 15, class: gpr64, preferred-register: '' }
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- { id: 16, class: gpr64, preferred-register: '' }
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- { id: 17, class: gpr64, preferred-register: '' }
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- { id: 18, class: gpr64, preferred-register: '' }
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- { id: 19, class: gpr64, preferred-register: '' }
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- { id: 20, class: gpr32, preferred-register: '' }
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- { id: 21, class: gpr64, preferred-register: '' }
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- { id: 22, class: gpr64, preferred-register: '' }
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- { id: 23, class: gpr64, preferred-register: '' }
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- { id: 24, class: gpr64, preferred-register: '' }
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- { id: 25, class: gpr64, preferred-register: '' }
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- { id: 26, class: gpr32, preferred-register: '' }
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- { id: 27, class: gpr64, preferred-register: '' }
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- { id: 28, class: gpr64, preferred-register: '' }
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- { id: 29, class: gpr64, preferred-register: '' }
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- { id: 30, class: gpr64, preferred-register: '' }
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- { id: 31, class: gpr32, preferred-register: '' }
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- { id: 32, class: gpr64, preferred-register: '' }
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- { id: 33, class: gpr64, preferred-register: '' }
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- { id: 34, class: gpr64, preferred-register: '' }
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- { id: 35, class: gpr64, preferred-register: '' }
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- { id: 36, class: gpr64, preferred-register: '' }
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- { id: 37, class: gpr64, preferred-register: '' }
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- { id: 38, class: gpr64, preferred-register: '' }
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- { id: 39, class: gpr64, preferred-register: '' }
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- { id: 40, class: gpr64, preferred-register: '' }
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- { id: 41, class: gpr64, preferred-register: '' }
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- { id: 42, class: gpr64, preferred-register: '' }
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- { id: 43, class: gpr64, preferred-register: '' }
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- { id: 44, class: gpr64, preferred-register: '' }
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- { id: 45, class: gpr64, preferred-register: '' }
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- { id: 46, class: gpr64, preferred-register: '' }
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- { id: 47, class: gpr64, preferred-register: '' }
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- { id: 48, class: gpr32, preferred-register: '' }
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- { id: 49, class: gpr32, preferred-register: '' }
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- { id: 50, class: gpr64, preferred-register: '' }
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- { id: 51, class: gpr64, preferred-register: '' }
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liveins:
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- { reg: '%a0_64', virtual-reg: '%5' }
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- { reg: '%t9_64', virtual-reg: '' }
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 1
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adjustsStack: false
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hasCalls: true
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stackProtector: ''
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maxCallFrameSize: 4294967295
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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savePoint: ''
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restorePoint: ''
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fixedStack:
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stack:
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constants:
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body: |
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bb.0.entry:
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successors: %bb.1.entry._ZTW1k.exit_crit_edge(0x7fe00000), %bb.2.init.i.i(0x00200000)
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liveins: %a0_64, %t9_64
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%50 = LUi64 target-flags(mips-gpoff-hi) @_Z2k1i
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%51 = DADDu %50, %t9_64
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%43 = DADDiu %51, target-flags(mips-gpoff-lo) @_Z2k1i
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%5 = COPY %a0_64
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ADJCALLSTACKDOWN 0, 0, implicit-def dead %sp, implicit %sp
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%6 = COPY %5.sub_32
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%a0_64 = COPY %5
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JAL @_Z1gi, csr_n64, implicit-def dead %ra, implicit %a0_64, implicit-def %sp, implicit-def %v0
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ADJCALLSTACKUP 0, 0, implicit-def dead %sp, implicit %sp
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%7 = COPY %v0
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%8 = ADDu %7, killed %6
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%9 = LUi64 target-flags(mips-highest) @v
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%10 = DADDiu killed %9, target-flags(mips-higher) @v
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%11 = DSLL killed %10, 16
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%12 = DADDiu killed %11, target-flags(mips-abs-hi) @v
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%13 = DSLL killed %12, 16
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%14 = LW killed %13, target-flags(mips-abs-lo) @v :: (dereferenceable load 4 from @v)
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%0 = ADDu killed %8, killed %14
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%15 = LUi64 target-flags(mips-tprel-hi) @__tls_guard
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%16 = DADDiu killed %15, target-flags(mips-tprel-lo) @__tls_guard
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%17 = RDHWR64 %hwr29
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%v1_64 = COPY %17
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%18 = COPY %v1_64
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%19 = DADDu %18, killed %16
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%20 = LBu killed %19, 0 :: (dereferenceable load 1 from @__tls_guard)
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BEQ killed %20, %zero, %bb.2.init.i.i, implicit-def dead %at
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J %bb.1.entry._ZTW1k.exit_crit_edge, implicit-def dead %at
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bb.1.entry._ZTW1k.exit_crit_edge:
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successors: %bb.3._ZTW1k.exit(0x80000000)
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%32 = LUi64 target-flags(mips-tprel-hi) @k
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%33 = DADDiu killed %32, target-flags(mips-tprel-lo) @k
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%34 = RDHWR64 %hwr29
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%v1_64 = COPY %34
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%35 = COPY %v1_64
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%36 = DADDu %35, killed %33
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%1 = LW killed %36, 0 :: (dereferenceable load 4 from @k)
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J %bb.3._ZTW1k.exit, implicit-def dead %at
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bb.2.init.i.i:
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successors: %bb.3._ZTW1k.exit(0x80000000)
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%21 = LUi64 target-flags(mips-tprel-hi) @__tls_guard
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%22 = DADDiu killed %21, target-flags(mips-tprel-lo) @__tls_guard
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%23 = RDHWR64 %hwr29
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%v1_64 = COPY %23
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%24 = COPY %v1_64
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%25 = DADDu %24, killed %22
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%26 = ADDiu %zero, 1
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SB killed %26, killed %25, 0 :: (store 1 into @__tls_guard)
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%27 = LUi64 target-flags(mips-tprel-hi) @k
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%28 = DADDiu killed %27, target-flags(mips-tprel-lo) @k
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%29 = DADDu %24, killed %28
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ADJCALLSTACKDOWN 0, 0, implicit-def dead %sp, implicit %sp
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%30 = DADDiu %zero_64, 3
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%a0_64 = COPY %30
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JAL @_Z1gi, csr_n64, implicit-def dead %ra, implicit %a0_64, implicit-def %sp, implicit-def %v0
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ADJCALLSTACKUP 0, 0, implicit-def dead %sp, implicit %sp
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%31 = COPY %v0
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SW %31, killed %29, 0 :: (store 4 into @k)
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%2 = COPY %31
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bb.3._ZTW1k.exit:
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successors: %bb.4(0x40000000), %bb.5._ZTW1j.exit(0x40000000)
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%3 = PHI %2, %bb.2.init.i.i, %1, %bb.1.entry._ZTW1k.exit_crit_edge
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%4 = ADDu %0, %3
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%37 = LUi64 target-flags(mips-highest) @_ZTH1j
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%38 = DADDiu killed %37, target-flags(mips-higher) @_ZTH1j
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%39 = DSLL killed %38, 16
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%40 = DADDiu killed %39, target-flags(mips-abs-hi) @_ZTH1j
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%41 = DSLL killed %40, 16
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%42 = DADDiu killed %41, target-flags(mips-abs-lo) @_ZTH1j
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BEQ64 killed %42, %zero_64, %bb.5._ZTW1j.exit, implicit-def dead %at
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J %bb.4, implicit-def dead %at
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bb.4 (%ir-block.2):
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successors: %bb.5._ZTW1j.exit(0x80000000)
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ADJCALLSTACKDOWN 0, 0, implicit-def dead %sp, implicit %sp
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JAL @_ZTH1j, csr_n64, implicit-def dead %ra, implicit-def %sp
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ADJCALLSTACKUP 0, 0, implicit-def dead %sp, implicit %sp
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bb.5._ZTW1j.exit:
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%44 = RDHWR64 %hwr29
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%v1_64 = COPY %44
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%45 = LD %43, target-flags(mips-gottprel) @j :: (load 8)
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%46 = COPY %v1_64
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%47 = DADDu %46, killed %45
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%48 = LW killed %47, 0 :: (dereferenceable load 4 from @j)
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%49 = ADDu %4, killed %48
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%v0 = COPY %49
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RetRA implicit %v0
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...
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